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Journal Articles

Mapping of CMOS FET degradation in bias space—Application to dram peripheral devices

B. Kaczer, J. Franco, S. Tyaginov, M. Jech, G. Rzepa, T. Grasser, B. J. O'Sullivan, R. Ritzenhaler, T. Schram, A. Spessot, D. Linten, N. Horiguchi

J. Vac. Sci. Technol. B 35, 01A109 (2017)

https://doi.org/10.1116/1.4972872

Published: December 2016

View articletitled, Mapping of CMOS FET degradation in bias space—Application to dram peripheral devices

Journal Articles

Analysis of the effect of germanium preamorphization on interface defects and leakage current for high- k metal-oxide-semiconductor field-effect transistor

G. Roll, S. Jakschik, M. Goldbach, A. Wachowiak, T. Mikolajick, L. Frey

J. Vac. Sci. Technol. B 29, 01AA05 (2011)

https://doi.org/10.1116/1.3521479

Published: January 2011

View articletitled, Analysis of the effect of germanium preamorphization on interface defects and leakage current for high- k metal-oxide-semiconductor field-effect transistor

Journal Articles

Atomic layer deposition grown metal-insulator-metal capacitors with RuO 2 electrodes and Al-doped rutile TiO 2 dielectric layer

B. Hudec, K. Hušeková, E. Dobročka, J. Aarik, R. Rammula, A. Kasikov, A. Tarre, A. Vincze, K. Fröhlich

J. Vac. Sci. Technol. B 29, 01AC09 (2011)

https://doi.org/10.1116/1.3534023

Published: January 2011

View articletitled, Atomic layer deposition grown metal-insulator-metal capacitors with RuO 2 electrodes and Al-doped rutile TiO 2 dielectric layer

Journal Articles

Chemical vapor deposition and characterization of high- k BaHf 1 − x Ti x O 3 dielectric layers for microelectronic applications

A. Abrutis, T. Katkus, S. Stanionyte, V. Kubilius, G. Lupina, Ch. Wenger, M. Lukosius

J. Vac. Sci. Technol. B 29, 01A303 (2011)

https://doi.org/10.1116/1.3521386

Published: January 2011

View articletitled, Chemical vapor deposition and characterization of high- k BaHf 1 − x Ti x O 3 dielectric layers for microelectronic applications

Journal Articles

Trap related dielectric absorption of HfSiO films in metal-insulator-semiconductor structures

M. Kerber, C. Fachmann, J. Heitmann, S. Kudelka, U. Schröder, H. Reisinger

J. Vac. Sci. Technol. B 27, 321–324 (2009)

https://doi.org/10.1116/1.3043532

Published: February 2009

View articletitled, Trap related dielectric absorption of HfSiO films in metal-insulator-semiconductor structures

Journal Articles

Alternative high- k dielectrics for semiconductor applications

J. Vac. Sci. Technol. B 27, 209–213 (2009)

https://doi.org/10.1116/1.3025855

Published: February 2009

View articletitled, Alternative high- k dielectrics for semiconductor applications

Journal Articles

Resist charging effect in photomask: Its impact on pattern placement error and critical dimension

Jin Choi, Dong Seok Nam, Byung Gook Kim, Sang-Gyun Woo, Han Ku Cho

J. Vac. Sci. Technol. B 26, 2345–2350 (2008)

https://doi.org/10.1116/1.2978406

Published: December 2008

View articletitled, Resist charging effect in photomask: Its impact on pattern placement error and critical dimension

Journal Articles

Are extreme ultraviolet resists ready for the 32 nm node?

Karen Petrillo, Yayi Wei, R. Brainard, G. Denbeaux, Dario Goldfarb, C.-S. Koay, J. Mackey, Warren Montgomery, W. Pierson, T. Wallow, Obert Wood

J. Vac. Sci. Technol. B 25, 2490–2495 (2007)

https://doi.org/10.1116/1.2787815

Published: December 2007

View articletitled, Are extreme ultraviolet resists ready for the 32 nm node?

Journal Articles

Study of process contributions to total overlay error budget for sub- 60 - nm memory devices

Jangho Shin, Hyunjae Kang, SungWon Choi, Seoukhoon Woo, Hochul Kim, SukJoo Lee, Junghyeon Lee, Chang-Jin Kang

J. Vac. Sci. Technol. B 25, 2444–2446 (2007)

https://doi.org/10.1116/1.2787772

Published: December 2007

View articletitled, Study of process contributions to total overlay error budget for sub- 60 - nm memory devices

Journal Articles

On-wafer monitoring of charge accumulation and sidewall conductivity in high-aspect-ratio contact holes during Si O 2 etching process

Butsurin Jinnai, Toshiyuki Orita, Mamoru Konishi, Jun Hashimoto, Yoshinari Ichihashi, Akito Nishitani, Shingo Kadomura, Hiroto Ohtake, Seiji Samukawa

J. Vac. Sci. Technol. B 25, 1808–1813 (2007)

https://doi.org/10.1116/1.2794050

Published: October 2007

View articletitled, On-wafer monitoring of charge accumulation and sidewall conductivity in high-aspect-ratio contact holes during Si O 2 etching process

Journal Articles

Effects of phase of underlying W film on chemical vapor deposited-W film growth and applications to contact-plug and bit line processes for memory devices

Soo-Hyun Kim, Jeong-Tae Kim, Nohjung Kwak, Jinwoong Kim, Tae-Sik Yoon, Hyunchul Sohn

J. Vac. Sci. Technol. B 25, 1574–1580 (2007)

https://doi.org/10.1116/1.2770739

Published: August 2007

View articletitled, Effects of phase of underlying W film on chemical vapor deposited-W film growth and applications to contact-plug and bit line processes for memory devices

Journal Articles

Effect of gate hard mask and sidewall spacer structures on the gate oxide reliability of W ∕ W N x ∕ poly ‐ Si gate MOSFET for high density DRAM applications

Kwan-Yong Lim, Heung-Jae Cho, Se-Aug Jang, Yong Soo Kim, Jae-Geun Oh, Jung-Ho Lee, Hong-Seon Yang, Hyun-Chul Sohn, Jin-Woong Kim

J. Vac. Sci. Technol. B 23, 1036–1040 (2005)

https://doi.org/10.1116/1.1897708

Published: May 2005

View articletitled, Effect of gate hard mask and sidewall spacer structures on the gate oxide reliability of W ∕ W N x ∕ poly ‐ Si gate MOSFET for high density DRAM applications

Journal Articles

Dielectric properties enhancement of ZrO 2 thin films induced by substrate biasing

A. P. Huang, Paul K. Chu, H. Yan, M. K. Zhu

J. Vac. Sci. Technol. B 23, 566–569 (2005)

https://doi.org/10.1116/1.1885011

Published: March 2005

View articletitled, Dielectric properties enhancement of ZrO 2 thin films induced by substrate biasing

Journal Articles

Chemical vapor deposition–physical vapor deposition aluminum plug process for dynamic random-access memory applications

Won-Jun Lee, Sa-Kyun Rha

J. Vac. Sci. Technol. B 22, 1931–1934 (2004)

https://doi.org/10.1116/1.1775005

Published: August 2004

View articletitled, Chemical vapor deposition–physical vapor deposition aluminum plug process for dynamic random-access memory applications

Journal Articles

Simulations and experiments of etching of silicon in HBr plasmas for high aspect ratio features

Helen H. Hwang, M. Meyyappan, G. S. Mathad, R. Ranade

J. Vac. Sci. Technol. B 20, 2199–2205 (2002)

https://doi.org/10.1116/1.1513621

Published: December 2002

View articletitled, Simulations and experiments of etching of silicon in HBr plasmas for high aspect ratio features

Journal Articles

Recent progress in 1× x-ray mask technology: Feasibility study using ASET-NIST format TaXN x-ray masks with 100 nm rule 4 Gbit dynamic random access memory test patterns

Shinji Tsuboi, Yuusuke Tanaka, Toshiyuki Iwamoto, Hiroaki Sumitani, Yoshinori Nakayama

J. Vac. Sci. Technol. B 19, 2416–2422 (2001)

https://doi.org/10.1116/1.1408952

Published: November 2001

View articletitled, Recent progress in 1× x-ray mask technology: Feasibility study using ASET-NIST format TaXN x-ray masks with 100 nm rule 4 Gbit dynamic random access memory test patterns

Journal Articles

Highly accurate x-ray masks with 100-nm-class high-density device patterns

Shingo Uchiyama, Masaru Shimada, Tai Tsuchizawa, Takashi Ohkubo, Masatoshi Oda, Hideo Yoshihara

J. Vac. Sci. Technol. B 18, 2990–2994 (2000)

https://doi.org/10.1116/1.1321763

Published: November 2000

View articletitled, Highly accurate x-ray masks with 100-nm-class high-density device patterns

Journal Articles

Low resistance small metal contact for high temperature application

J. S. Kim, W. T. Kang, W. S. Lee, B. Y. Yoo, Y. C. Shin, T. H. Kim, K. Y. Lee, Y. J. Park, J. W. Park

J. Vac. Sci. Technol. B 17, 2559–2564 (1999)

https://doi.org/10.1116/1.591127

Published: November 1999

View articletitled, Low resistance small metal contact for high temperature application

Journal Articles

High contrast chemically amplified 193 nm resist for gigabit dynamic random access memory generation

Toshiro Itani, Hiroshi Yoshino, Mitsuharu Yamana, Michiya Takimoto, Hiroyoshi Tanabe

J. Vac. Sci. Technol. B 17, 3322–3325 (1999)

https://doi.org/10.1116/1.591004

Published: November 1999

View articletitled, High contrast chemically amplified 193 nm resist for gigabit dynamic random access memory generation

Journal Articles

Investigation of Pt/Ta diffusion barrier using hybrid conductive oxide ( RuO 2 ) for high dielectric applications

Dong-Soo Yoon, Hong Koo Baik, Sung-Man Lee, Sang-In Lee, Hyun Ryu, Hwack Joo Lee

J. Vac. Sci. Technol. B 16, 1137–1141 (1998)

https://doi.org/10.1116/1.590022

Published: May 1998

View articletitled, Investigation of Pt/Ta diffusion barrier using hybrid conductive oxide ( RuO 2 ) for high dielectric applications

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Mapping of CMOS FET degradation in bias space—Application to dram peripheral devices

Analysis of the effect of germanium preamorphization on interface defects and leakage current for high- k metal-oxide-semiconductor field-effect transistor

Atomic layer deposition grown metal-insulator-metal capacitors with RuO 2 electrodes and Al-doped rutile TiO 2 dielectric layer

Chemical vapor deposition and characterization of high- k BaHf 1 − x Ti x O 3 dielectric layers for microelectronic applications

Trap related dielectric absorption of HfSiO films in metal-insulator-semiconductor structures

Alternative high- k dielectrics for semiconductor applications

Resist charging effect in photomask: Its impact on pattern placement error and critical dimension

Are extreme ultraviolet resists ready for the 32 nm node?

Study of process contributions to total overlay error budget for sub- 60 - nm memory devices

On-wafer monitoring of charge accumulation and sidewall conductivity in high-aspect-ratio contact holes during Si O 2 etching process

Effects of phase of underlying W film on chemical vapor deposited-W film growth and applications to contact-plug and bit line processes for memory devices

Effect of gate hard mask and sidewall spacer structures on the gate oxide reliability of W ∕ W N x ∕ poly ‐ Si gate MOSFET for high density DRAM applications

Dielectric properties enhancement of ZrO 2 thin films induced by substrate biasing

Chemical vapor deposition–physical vapor deposition aluminum plug process for dynamic random-access memory applications

Simulations and experiments of etching of silicon in HBr plasmas for high aspect ratio features

Recent progress in 1× x-ray mask technology: Feasibility study using ASET-NIST format TaXN x-ray masks with 100 nm rule 4 Gbit dynamic random access memory test patterns

Highly accurate x-ray masks with 100-nm-class high-density device patterns

Low resistance small metal contact for high temperature application

High contrast chemically amplified 193 nm resist for gigabit dynamic random access memory generation

Investigation of Pt/Ta diffusion barrier using hybrid conductive oxide ( RuO 2 ) for high dielectric applications

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