Sub-micrometer-thick lithium niobate on an insulator is a promising integrated photonic platform that provides optical field confinement and optical nonlinearity useful for state-of-the-art electro-optic modulators and wavelength converters. The fabrication of lithium niobate on insulator on a silicon substrate through ion slicing is advantageous for electronic-photonic integration but is challenging because of debonding and cracking due to the thermal expansion coefficient mismatch between silicon and lithium niobate. In this work, the fabrication of thin film lithium niobate on insulator on a silicon handle wafer is achieved, informed by structural modeling, and facilitated by accommodating for dissimilar wafer bows using a bonding apparatus. Structural finite element analysis of strain energy and stress, due to thermal expansion coefficient mismatch at elevated temperatures, is conducted. High strain energies and stresses that result in debonding and cracking, respectively, are studied through modeling and reduced by selecting optimized substrate thicknesses followed by an experimental technique to bond substrates with dissimilar bows. A lithium niobate thin film with a thickness of 800 nm is successfully transferred to an oxidized silicon wafer with a root mean square surface roughness of 5.6 nm.
I. INTRODUCTION
Lithium niobate (LiNbO3 or LN) is a widely known and extensively studied optical material finding use in wavelength convertors, telecommunication modulators, and acousto-optical devices.1–3 Transparent at UV, visible, and IR wavelengths, LN is an excellent nonlinear media possessing a large electro-optic coefficient, in addition to being ferroelectric, piezoelectric, and pyroelectric.4,5 With advances in nanofabrication technology, sub-micrometer-thick single crystal thin films of LN can be utilized to fabricate on-chip waveguides, resonators, gratings, and other photonic structures that have reduced size, weight, and power requirements when compared with their bulk counterparts.6–8 Photonic integrated circuits utilizing the lithium niobate on insulator (LNOI) platform benefit from high index contrast waveguides and enhanced optical nonlinearity due to compact field confinement.9 Film growth techniques such as radio frequency magnetron sputtering, chemical vapor deposition, and liquid phase epitaxy have been employed to produce LN thin films; however, stoichiometric, structural, and optical properties of such films have been suboptimal when compared with bulk single crystal lithium niobate grown using the Czochralski method.10–13 Thin films have also been prepared by polishing down thick LN wafers to micrometer thicknesses; however, polishing can lead to thickness nonuniformity while sacrificing the entire wafer, leading to a yield of only one thin film per wafer.14 Therefore, researchers and commercial manufacturers have employed ion slicing in conjunction with wafer bonding to exfoliate LN thin films from bulk crystals.15–20 Optical properties of LN thin films prepared by ion slicing and high-temperature annealing at greater than 400 °C have been shown to be comparable to bulk crystals.16,19–21
Ion slicing involves implanting a donor wafer with a high dose of light ions such as H+ or He+ to create a subsurface damage region, followed by bonding to a handle substrate. The bonded pair is annealed at elevated temperatures to induce expansion and blistering in the damage region and detach a thin film from the donor onto the handle substrate. The donor substrate can be recycled to repeat the process. The fabrication of LNOI on Si substrates, however, is difficult owing to the large thermal expansion coefficient (TEC) mismatch of the Si and LN, which results in debonding and cracking of bonded substrates before thermal exfoliation and film transfer can be achieved. Moreover, thin LN substrates experience bowing after implantation, which hampers direct bonding.
The fabrication of LNOI on a Si handle through ion slicing and direct wafer bonding has been reported18 and is available for purchase commercially; however, the literature is sparse on fabrication process details and experimentation. Related studies have investigated the thermal stress experienced by dissimilar bonded wafer pairs through modeling, including LN and Si, and have found the thicknesses of the bonded wafers to play an important role in reducing debonding.22,23 To facilitate direct bonding, a study has shown that the bow experienced after ion implantation on a donor wafer can be mitigated by ion implanting the other side of the wafer as well.24 Other methods such as etching relief patterns on the back of the wafer or depositing films to counteract the bow have been demonstrated but require additional processing and fabrication steps.25,26 To prevent debonding, methods to bond LN and oxidized Si with the use of intermediate layers such as iron, amorphous silicon, and gold microbumps have been shown to achieve high bond strengths at room temperatures; however, the use of intermediate layers may lead to optical propagation loss in devices.27–29
In this research, we fabricate single crystal thin film LNOI on oxidized silicon handle substrates using ion slicing and direct bonding. Structural finite element analysis is conducted to study the stresses and strain energies experienced by the bonded pair at elevated temperatures (up to 200 °C), which are required for ion-slicing. At high temperatures, the LN and oxidized Si bonded at room temperature experience thermally induced stress and strain energy accumulation due to the large difference in TECs. Experimentally, elevated stress introduces cracks or shatters entire substrates, and high strain energy causes the bond between the substrates to fail by slippage or complete debonding.23,30 Computational modeling shows, however, that the reduction of substrate thickness results in lower stress and strain energy, which allows for annealing of the bonded substrates to exfoliation temperatures. To further facilitate direct bonding in experiments, the handle substrate is mechanically deformed to match the bow of the implanted LN substrate. Successful centimeter-scale film transfer is demonstrated for LNOI on Si with 800 nm LN layer thickness.
II. MODELING
To study and mitigate bonding failure due to cracking or debonding at high temperatures required for exfoliation, structural simulations are conducted using a mechanical finite element solver. Thermally induced stress and strain energy are the key parameters considered in this study.
A. Structural model
To compute the structural effects of temperature on the bonded pair, a dual-layer model is created in Ansys Mechanical. A 4 in. (100) Si wafer is bonded to a 3 in. x-cut LN wafer [Fig. 1(a)]. Major and minor crystal flats are included in the wafers. Through initial computations, it is observed that the oxide layer that covers the Si wafer on both sides induces negligible change in computed values of stress and strain energy. The oxide layer is thin compared with the bulk wafers and covers both sides of the Si wafer, resulting in net zero deflection when thermal conditions are varied. Henceforth, due to the constraints required to finely mesh the oxide film and increased computational complexity, the oxide layer is omitted in the modeling.
(a) Model of x-cut LN bonded to Si. (b) Deformation of substrates along the x-direction at 190 °C. The Si handle is 0.525 mm thick and the LN substrate is 0.250 mm thick. Saddle-shape warpage is observed with large bowing along the z axis.
(a) Model of x-cut LN bonded to Si. (b) Deformation of substrates along the x-direction at 190 °C. The Si handle is 0.525 mm thick and the LN substrate is 0.250 mm thick. Saddle-shape warpage is observed with large bowing along the z axis.
Table I summarizes the material parameters used in this study. In the Si layer, stiffness constants, calculated from orthotropic elastic coefficients, and isotropic TECs are used (αx = αy = αz = 2.6 × 10−6 °C−1),31 where αi is the TEC in the i-direction (i = x, y, or z). In the LN layer, stiffness constants and anisotropic TECs are used (αx = αy = 7.5 × 10−6 °C−1 and αz = 1.5 × 10−5 °C−1).32 During the computations, the temperature is varied from 20 °C to 200 °C. Normal principal stress (σ1) and in-plane principal stress (σ3), experienced by the LN substrate, and total strain energy are studied for combinations of commonly available Si and LN wafer thicknesses. The total strain energy U is calculated using
where the computed stress () and strain () for each finite element are integrated over the entire volume () of the bonded stack. Parameters and are vectors with six elements and T in Eq. (1) represents the transpose operation.33
Stiffness constants for LN and Si used for structural modeling.
Lithium niobate stiffness constants (GPa) . |
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Silicon stiffness constants (GPa) . |
Lithium niobate stiffness constants (GPa) . |
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Silicon stiffness constants (GPa) . |
Figures 2(a)–2(c) show the computed total strain energy of the bonded wafers, maximum normal stress, and maximum in-plane principal stress encountered in the LN substrate, respectively, for substrate thicknesses ranging from 0.1 to 1 mm at 190 °C, which is the desired exfoliation temperature. The absolute value for in-plane principal stress is plotted since it is compressive, i.e., negative in magnitude. Middle principal stress (σ2) is not used in the analysis since its magnitude is much lower than σ1 and σ3. The substrate diameter is found to have little effect on the principal stresses. In similar analyses conducted in the literature, the strain energy of the bonded stack is divided by the bonded area to obtain the result in terms of strain energy per unit area which is compared with the bond energy of the interface.30
Computed (a) total strain energy U, (b) maximum normal principal stress σ1, and (c) maximum in-plane principal stress |σ3| on the LN substrate plotted as a function of substrate thicknesses at 190 °C.
Computed (a) total strain energy U, (b) maximum normal principal stress σ1, and (c) maximum in-plane principal stress |σ3| on the LN substrate plotted as a function of substrate thicknesses at 190 °C.
B. Calculations and observations
The modeling shows that the bonded substrates are warped into a saddle-shape geometry at high temperatures [Fig. 1(b)]. The result is a consequence of the anisotropy of thermal expansion of X-cut LN wafers, which prevents spherical deflection. According to Fig. 2(a), strain energy is minimum when the total thickness of the bonded pair is low. Strain energy is a measure of elastic deformational energy stored in the bonded stack because of thermal expansion and warpage at elevated temperatures.34 High strain energies indicate large splitting forces at the interface, which can cause cleavage along the bonded interface and lead to sliding or complete debonding.
Normal and in-plane principal stresses in Figs. 2(b) and 2(c) tend to increase for LN to Si thickness ratios above unity. Principal stress exceeding the failure stress of LN will cause crack formation in the substrates.35 Principal stresses are maximum near the edges of the substrate. LN is known to fracture along the {01.2} family of cleavage planes. In the case of X-cut wafers, these cracks are observed to extend along the surface at an angle of 32.75 degrees from the z axis (or c axis).36 Fracture toughness of LN is dependent on surface finish and initial crack geometry. The fracture toughness reduces with an increase in the initial crack length and depth. Dicing introduces microcracks at the edges of the sample, which act as starting points for larger cracks. In a study, a failure stress of 550 MPa and fracture toughness of 1.3 MPa m1/2 was measured for LN when initial 0.1 mm long cracks were present on the surface of the sample.35 In the context of splitting forces and failure strength, the combined results in Fig. 2 indicate that the total thickness of the bonded stack should be small to mitigate the effects of thermal strain energy and the Si substrate thickness should be greater than the LN to reduce principal stress.
Commercially available common LN wafer thicknesses are 0.25, 0.5, 0.75, and 1 mm. Figure 3 plots the evolution of strain energy and stresses with temperature for these thicknesses of LN bonded to 0.525 mm-thick Si. The 0.25 mm-thick LN experiences the lowest strain energy and stresses, which indicates a lower probability of debonding and cracking at elevated temperatures, respectively. LN thicknesses of 0.25 and 1 mm, for contrast, are, therefore, used for the experiments.
(a) Strain energy U and (b) maximum normal and in-plane principal stresses (σ1 and |σ3|, respectively) vs temperature with LN thickness as the parameter. The Si wafer is 0.525 mm thick.
(a) Strain energy U and (b) maximum normal and in-plane principal stresses (σ1 and |σ3|, respectively) vs temperature with LN thickness as the parameter. The Si wafer is 0.525 mm thick.
III. EXPERIMENT
X-cut 3 in. LN wafers (5% MgO doped) with 0.25 and 1 mm thicknesses and double-side polished (100) oxidized Si wafers with 0.525 mm thickness are obtained commercially. The Si wafers are wet-oxidized by the vendor to achieve 4 μm-thick oxide on both sides. Double-side polished Si wafers are used to mitigate bow after oxidation since oxide films with equal stress are formed on both sides of the wafer, keeping the resultant wafer flat.
For direct wafer bonding, surfaces with root mean square (RMS) roughness below approximately 0.5 nm are required.37 Figure 4 shows atomic force microscopy (AFM) scans on the oxidized Si and LN wafer surfaces. RMS surface roughness of the oxidized Si and LN wafers are measured to be 0.2 and 0.15 nm, respectively, which is within the acceptable tolerance for direct bonding. Surface roughness should also be low to mitigate bottom wall scattering losses in future optical waveguide devices fabricated on this platform.38
AFM scans of (a) oxidized Si and (b) LN wafers with measured RMS surface roughness of 0.20 and 0.15 nm, respectively.
AFM scans of (a) oxidized Si and (b) LN wafers with measured RMS surface roughness of 0.20 and 0.15 nm, respectively.
The experimental process flow is shown in Fig. 5. For exfoliation, the LN wafer is implanted with He+ ions at a fluence of 3.5 × 1016 cm−2 and an acceleration energy of 225 keV.15 Implantation is conducted at a pressure of 5 × 10−6 Torr with the substrate tilted 7° to prevent channeling. Figure 6 shows the ion distribution of the He+ ions for the implanted LN wafer computed using transport of ions in matter (TRIM) computations.39 The longitudinal range of the ion distribution is 807 nm, which is also the predicted film thickness after exfoliation. The longitudinal straggle of the ion distribution is 128 nm, which is an approximate measure of the thickness of the damage region. Selecting a longitudinal range larger than the desired final film thickness is beneficial since chemical mechanical polishing (CMP), which is often the final fabrication step, may remove up to 200 nm of film.
Process flow for the fabrication of LNOI on Si substrates. (a) Implantation of He+ ions into LN substrate followed by dicing. (b) Wet chemical activation of implanted LN die and oxidized Si handle wafer. (c) Bonding and annealing using a custom wafer holding jig. (d) Thermal exfoliation resulting in LN film transfer.
Process flow for the fabrication of LNOI on Si substrates. (a) Implantation of He+ ions into LN substrate followed by dicing. (b) Wet chemical activation of implanted LN die and oxidized Si handle wafer. (c) Bonding and annealing using a custom wafer holding jig. (d) Thermal exfoliation resulting in LN film transfer.
Computed He+ ion implantation depth profile at 225 keV accelerating voltage. The ion range is 807 nm.
Computed He+ ion implantation depth profile at 225 keV accelerating voltage. The ion range is 807 nm.
Implantation also introduces a compressive subsurface stress layer.40 This causes the wafer to bow, which can prevent direct bonding. In our experiment, negligible bowing in the case of the 1 mm-thick LN is observed; however, the 0.25 mm-thick LN wafer exhibited a bow of 0.73 mm. The bow is observed to be uniaxial and is found to be along the z axis of the wafer. Negligible bow is measured along the y axis.
To accommodate the LN wafer bow, a custom wafer holding jig is utilized. The apparatus mechanically deforms the Si handle wafer to match the bow of the LN, which facilitates direct bonding. The jig, schematically depicted in Fig. 5(c), anchors the Si wafer on one end. The opposite end of the wafer is lifted by a movable support that allows the bow to be precisely controlled by moving the support toward or away from the center of the jig. The arrangement allows a uniaxial bow to be obtained on the Si handle substrate.
Bonding is conducted in a class 100 cleanroom. The LN die (approximately 2 × 2 cm2 square) and Si handle are cleaned, and their surfaces are activated chemically. The LN and Si are cleaned with acetone and isopropyl alcohol followed by a deionized (DI) water rinse and an RCA clean (SC-1 and SC-2). The substrates are then immersed in Piranha solution to increase the hydrophilicity of the surfaces before being rinsed with DI water.41 The substrates are then dried with N2.
The oxidized Si is placed in the holding jig to deform the wafer and achieve the same bow as the LN. The Si wafer is placed with the major flat 45° to the anchor so that the resultant bow is along the direction. The wafer is susceptible to cleavage if the bow is along the or directions (parallel and perpendicular to Si wafer flat, respectively). Handle and donor bow measured before the cleaning process is shown in Fig. 7 using surface profilometry. During bonding, the LN die is placed on the oxidized Si wafer implanted side down. Upon contact, a bond wave propagates from the center toward the edges of the substrate completing the bonding process. At this point, the bond is weak since it is being held together only by van der Waals forces.37
Surface profiles of virgin LN, implanted LN die, and deformed Si measured prior to bonding. A close match between the bow of LN and Si is obtained to facilitate direct bonding.
Surface profiles of virgin LN, implanted LN die, and deformed Si measured prior to bonding. A close match between the bow of LN and Si is obtained to facilitate direct bonding.
Subsequently, the bonded pair along with the wafer holding jig are moved to an oven. The anneal is conducted with a staircase profile in an air atmosphere with forced convection. The substrates are initially annealed at a temperature of 170 °C for 164 h to strengthen the interfacial bond, resulting in the conversion of the van der Waals bonds to covalent bonds by diffusion of water molecules out from the interface.42 At 170 °C, the exfoliation process is slow and does not result in layer transfer. Increasing the temperature to 188 °C and further annealing for 19 h accelerates the exfoliation process and results in layer transfer. Temperature ramping and cooling rates are kept at slower than 0.5 °C per min to avoid cracking due to thermal shock. Upon exfoliation, the donor substrate is detached from the bonded thin film and layer transfer takes place. The wafer is removed from the holding apparatus and the thin film is subjected to imaging and metrology.
IV. RESULTS AND DISCUSSION
The results of the structural simulations in Fig. 2 point toward the use of thinner substrates for increased thermal budget of the bonded pair. Thinner substrates accumulate less strain energies on annealing, which reduces debonding. Calculations of principal stresses show that LN to Si thickness ratios below unity can significantly reduce the in-plane and normal stresses experienced by the substrates. At very low ratios (<0.1), however, the in-plane stresses increase, although normal stress is reduced.
Experimentally, 1 mm-thick LN cracks and debonds during the process at lower temperatures than 0.25 mm-thick LN. Debonding and edge cracking of 1 mm-thick LN is observed at 160 °C, while 0.25 mm-thick LN survives temperatures up to 188 °C. These observations are consistent with the results of the modeling in Fig. 3, which predict similar strain energies and in-plane principal stresses experienced by the 1 mm-thick LN at 160 °C and 0.25 mm-thick LN at 200 °C.
Due to the difficulty of measuring the bond strength of submicrometer thin films after exfoliation, a direct measurement of bond strength is not reported here. Annealing at 170 °C for 164 h followed by exfoliation at 188 °C, however, resulted in the successful transfer of the LN film indicating sufficiency of bond strength for exfoliation and transfer. A bond strength of around 1.2 J m−2 is reported in the literature when annealing at 200 °C after bonding two hydrophilic oxidized silicon wafers.36 A similar bonding strength may be reached between thin film LN and SiO2 but has not been verified.
Implanting thin LN wafers increases the bow due to the introduction of a compressively stressed subsurface damage layer. Bow due to implantation has also been reported in thin substrates of GaN, Ge, and SiC.43–45 In the case of an X-cut LN wafer, the bow observed is uniaxial due to the anisotropy of in-plane elastic coefficients of X-cut LN. Z-cut LN wafers may also be used; however, implantation may cause biaxial bowing of the wafer requiring modification to the wafer holding jig.
The use of the wafer holding jig demonstrates that Si wafers may be mechanically deformed to match the bow with a donor substrate, eliminating the need for double-sided implantation of the donor, film deposition, or etching relief patterns on either the donor or the handle to match the bow. Uniaxial bows of up to 1 mm are obtained on the 4 in. Si wafer without breakage. Thick LN substrates (∼1 mm) do not require deformation of the handle for bonding due to negligible bow. In contrast, only partial bonding is observed for 0.25 mm-thick substrates without deforming the handle, and the substrates experience complete debonding during annealing. Deforming the Si handle results in nearly complete bonding and successful film transfer with 0.25 mm- thick LN.
The thin film is further inspected using AFM and scanning electron microscopy (SEM) imaging. Figure 8 shows the AFM scan of the surface and edge of the transferred LN film. A film thickness of 817 nm is measured by the AFM, which agrees with the expected value of 807 nm computed via TRIM calculations. The measured RMS surface roughness, obtained by AFM, is 5.6 nm. The surface roughness can be reduced by CMP to less than 0.5 nm, which has been demonstrated by our group previously.15
AFM scan of (a) surface and (b) edge of ion-sliced LN bonded to oxidized silicon wafer. Measured thickness agrees with TRIM calculations.
AFM scan of (a) surface and (b) edge of ion-sliced LN bonded to oxidized silicon wafer. Measured thickness agrees with TRIM calculations.
An SEM image of the cross section of the film is shown in Fig. 9. To reveal the cross section, a focused ion beam (FIB) is used to pattern a trench on the surface of the film followed by imaging at an angle. The LN thin film is visible on top of the 4 μm-thick oxide layer on the Si substrate. On the surface of the film, He+ blistering is observed as expected.46 The tip of the grounding probe, visible in the figure, is needed for FIB milling. The probe also reduces charging when imaging.
Cross-sectional SEM of LNOI on Si. Helium blisters are visible on the surface.
V. SUMMARY AND CONCLUSIONS
We report the dependence of strain energy and stress on bonded substrate thicknesses at elevated temperature through structural computations and demonstrate the fabrication of LNOI on Si, which can be used to fabricate nonlinear integrated photonic circuits. Substrate thicknesses are chosen based on the results of the modeling to reduce the strain energy and principal stresses. It is also shown that mechanical deformation of one substrate using a wafer holding apparatus can assist in direct bonding by matching substrate bows. Ion slicing is successfully carried out with 0.25 mm-thick LN and 0.525 mm-thick Si substrates. Measured LN film thickness of 817 nm agrees with a predicted thickness of 807 nm from TRIM modeling. An RMS roughness of 5.6 nm is measured using AFM on the surface of the exfoliated film.
Silicon handle substrates are advantageous for heterogeneous devices and may allow the integration of electronics and lithium niobate photonics on the same chip. Moreover, silicon substrates allow for efficient velocity matching between microwave and optical modes for telecommunication modulators.2 The process described in this work may also be extended to other materials, which may benefit from ion-sliced thin films such as GaN, Ge, InP, and SiC.
ACKNOWLEDGMENTS
The authors acknowledge support from the National Science Foundation Award No. 1809894.
DATA AVAILABILITY
The data that support the findings of this study are available from the corresponding author upon reasonable request.