Selective release of InP heterostructures from InP substrates

Crystalline semiconductor nanomembranes (NMs) have great potentials when integrated with optic and electronic applications due to their flexibility, thinness, and transferability.¹ Traditionally, they are fabricated via wafer bonding or direct growth. Wafer bonding as the most prevailing approach requires extrinsic force and excessively high temperature in order to achieve the surface bonding energy. On the other hand, lattice mismatch and incompatibility have limited the application of the direct growth method. Moreover, both wafer bonding and direct growth techniques face challenges such as scaling the wafer size and inefficient use of the substrate.

In the past decade, the epitaxial lift-off method has attracted great attention to facilitate the formation of single-crystal, defect-free high-quality semiconductor NMs.² In this approach, epitaxial thin film NMs are lifted off from the lattice-matched growth substrates by taking advantage of the high etching selectivity between the sacrificial layer and the functional membrane structure. In 1987, Yablonovitch et al. has successfully released AlGaAs film with AlAs as the sacrificial layer from lattice-matched GaAs substrates by using Apiezon black wax to protect the AlGaAs film and to facilitate peeling of the film after release from the substrate.^3,4 However, black wax is not applicable in the photolithography process because of limited flexibility. On the other hand, the transparent Mylar diaphragm as an intermediate transfer medium must be used for alignment, which further complicates the process.

An alternative approach is performed through the post-transfer process using standard lithography and etching technology. Recently, the utility of polydimethylsiloxane (PDMS) as the transfer medium was reported,⁵ including demonstrations of flexible photodetectors, and high speed thin-film transistors and biosensors.^6–9 Significant progress has been made by our previous work on transfer printed membrane lasers, consisting of a transferred InGaAsP QW heterostructure membrane, sandwiched in between two single-layer crystalline silicon photonic crystal Fano resonance membrane reflectors on an SOI substrate.¹⁰ The incorporation of InGaAsP QW membrane broadens the application of transferrable optical electronics that features a working wavelength at 1550 nm. However, InGaAsP QWs that are vulnerable to hydrofluoride solution can only be protected with black wax and transferred locally in a small area.

In this paper, we report experimental demonstration of sidewall protection processes for the selective release of InGaAsP QW heterostructures from InP substrates. The design protection structures were compatible with the standard PDMS printing process, and the large area of InGaAsP QW nanomembranes was successfully printed to the Si substrate.

The standard InGaAsP QW heterostructure wafers were grown on (001) n-InP substrate by metal organic chemical vapor deposition. Table I shows the description of the InGaAsP QW structure and current existing etching tables of the relative etchant and protection layer. A 500 nm-thick InGaAs layer was first grown on an InP substrate followed by another 500 nm InP layer. The intrinsic active region consisting of eight strain-compensated InGaAsP quantum-wells (QWs) is sandwiched in between doped p- and n-InP claddings. Besides the economic consideration of reusable substrates, the undercut etch rate of InP is very small except for the (001) planes.¹¹ InGaAs with a less rigid requirement for the structural orientation and a high selectivity to InP is thus used as the sacrificial layer in this heterostructure. Layer 2 of InP is used as a stop-and-protect layer during removal of the InGaAs sacrificial layer.

The process required to release and transfer InGaAsP QW nanomembranes is different from the current prevailing HF-based wet etching and releasing methods, which have been applied in releasing IV- and GaAs-based nanomembranes. For releasing IV group materials, such as Si, Ge, or SiGe, on SiO₂ as shown in Table II, no protection material is required during sacrificial layer etching due to the extremely high selectivity in HF solution. As for the GaAs-based nanomembrane release, photoresist has been used as a sidewall protection material to secure the AlInGaAs QW heterostructures during removal of the underlying Al_0.95Ga_0.05As sacrificial layer from the GaAs substrate in HF solution.¹² AlInGaAs QW heterostructures are released from GaAs substrates and transferred to Si substrate with precise lithographic alignment and a low thermal budget, while also making efficient use of the III–V epitaxial material.¹² Different from releasing the AlInGaAs QWs, the InGaAsP QW structure has lower chemical resistivity to HF. Figure 1 demonstrates the etching results of the designed InGaAsP QW structures targeting at 1550 nm wavelength in HF:H₂O₂:H₂O etch solution with a volume ratio of 1:1:10. As shown in Fig. 1(a), the high HF permeability bypasses the photoresist protection and attacks the vulnerable QW structures underneath. Also, the n contact InGaAs (layer 3) is also etched as seen in Fig. 1(b). So, it is concluded for the protection of the photoresist, the etch rate of each designed functional layer cannot be ignored and could significantly jeopardize the performance after transfer.

To solve the strong infiltration issue of the HF wet etching method, we proposed a non-HF etching system using H₃PO₄:H₂O₂. By using a weaker acid like phosphoric acid, the protection layer could be introduced to protect the QWs. In Fig. 2, the transfer procedure of InGaAsP QW membranes with SiO₂ sidewall protection is demonstrated. SiO₂ is resistant to the H₃PO₄:H₂O₂ etching system and can be easily removed by CF₄ plasma etching or short time buffered oxide etchant (BOE) wet etching without attacking the InGaAsP QW heterostructures. The SiO₂ films grown by thermal oxidation, plasma-enhanced chemical vapor deposition (PECVD), and sputtering have been widely used in semiconductor device technology. The high temperature during the thermal oxidation process could damage the InGaAsP based QW structures. For PECVD SiO₂ deposition, temperature is within the acceptable range for III–V material around 200–400 °C. However, the temperature difference between deposition and cooldown causes the internal stress and the pinholes in the deposited film.¹³ Consequently, the built-up stress will result in curving up of the released InGaAsP QWs membrane and the pinholes in the PECVD oxide create paths for the acid to penetrate into covered area during the long time undercut etching process. To avoid the high processing temperature, built-in strain, and pinhole problems from thermal oxidation and PECVD process, the sputtering process is thus chosen for our purpose due to the advantages of low-temperature, uniform and conformal coating, and good adhesion between the film and the substrate.

It is the first time that SiO₂ is used as a sidewall protection material in the InGaAsP epitaxial membrane lift-off process. The thickness of the SiO₂ has been optimized to secure the sidewall of the InGaAsP epitaxial membrane in a non-HF etching system. By properly controlling the volume ratio of H₃PO₄:H₂O₂, the InGaAs sacrificial layer can be selectively removed. Based on the transfer printing process, the suspended InGaAsP epitaxial membrane is lifted off from the InP substrate. The strategy not only avoids the lattice mismatch and stringent surface requirement but also improves the reproducibility of III–V materials.

The SiO₂ films were deposited by Denton Discovery 24 sputtering system, using a 3-in. diameter SiO₂ target in argon atmosphere at 20 mTorr with RF power of 540 W. The deposition was under vacuum of 2 × 10⁻⁶ mTorr with a deposition rate of 0.8 Å/s. As shown in Fig. 3(a), the SiO₂ film is uniformly coated on the edge of the heterostructure. Note that the steps were caused by underetching during the first release-hole structure wet etching. After coating the heterostructures with SiO₂, a second release-hole is patterned using optical lithography followed by reactive-ion etching to open the release holes. To generate membranes, the heterostructures were immersed in H₃PO₄:H₂O₂ (2:1) solution for 2 h, with its cross-sectional SEM image shown in Fig. 3(b). The InGaAs sacrificial layer is etched laterally under constant potential conditions, resulting in suspended InGaAsP QW membranes. Figures 3(c) and 3(d) show the zoomed-in optical images of the sidewall edge and center area between the release holes after undercut etching and printing on Si substrate, respectively. After release of the InGaAs sacrificial layer, SiO₂ can be easily etched away in BOE solution without attacking the III–V materials, leaving behind a high-quality, multilayer, and reusable InP substrate.

To verify the quality of the InGaAsP QW membranes, we fabricated InGaAsP QWs photodiodes transferred on top of the Si substrate, as shown in Fig. 4(a), and compared the QWs membrane by both the PL and electroluminescence (EL). The PL results in Fig. 4(b) give the comparison between InP substrate (before transfer), InGaAsP QWs transferred on Si substrate with sidewall protection, and the one using the photoresist and HF transfer method. It is clearly seen that with SiO₂ protection transfer, the PL peak wavelength and intensity shows negligible differences with the epilayer structure, which indicates no degradation of the QWs. Instead, the PL of the QWs using the photoresist as a protection methods and HF as the etching acid shows degradation after the QWs membrane is transferred. As the permeability of HF solutions is significant, the QWs are partially etched during the releasing process.

Whereas the PL of the membrane with HF transfer methods showed a red-shift and reduction in intensity. To further compare the QW performance, Ohmic contact metal is placed on both sides of the contact layer. The DC and EL results are measured in Figs. 4(c) and 4(d). The diode shows a good static curve at DC bias from −2 to +2 V. No significant degrading of the QWs has been identified. The EL curve is measured under a forward current of 5 mA. The light emitting from the QW membrane on the Si substrate remains similar to the results on the InP substrate but slightly stronger. This may be due to the increased upward reflection from the Si substrate (refractive index n: 3.47) compared with the original InP substrate (n: 3.17). Overall, the performance of the InGaAsP QW is well-maintained in the proposed transfer method.

In conclusion, InGaAsP QWs heterostructures have been successfully released by SiO₂ sidewall protection in H₃PO₄:H₂O₂ solution. The technological processes are applicable in more material systems, which can open new possibilities for integrating III–V technology with arbitrary substrates, such as vertically stacked high-density photonic/electronic integration and high-performance flexible/conformal photonics.

This work was supported by U.S. AFOSR (FA9550-11-C-0026, PM: G. Pomrenke), by ARO (W911NF-09-1-0505, PM: M. Gerhold), and by NSF (ECCS-1308520).