GaAs metal–semiconductor field‐effect transistors (MESFET’s) and modulation‐doped field‐effect transistors (MODFET’s) with recessed gates ≤100 nm long have been fabricated by incorporating a custom ultrahigh‐resolution electron‐beam lithography tool for gate fabrication with molecular‐beam epitaxy grown wafers and a standard high‐performance GaAs FET process. To the author’s knowledge, the MODFET’s have the smallest gate lengths reported to date. The electron‐beam (e‐beam) column was modified to hold 2‐ and 3‐in. wafers within the final lens to maintain low aberration coefficients and facilitate device processing. 70‐nm‐thick polymethylmethacrylate (PMMA) was used for the gate definition. The gate recess was accomplished with a citric acid etch that did not attack the PMMA. Liftoff of e‐beam evaporated TiAlAu completed the gate fabrication. DC IV characteristics were obtained for all the devices. The MODFET’s demonstrated dc transconductances as high as 400 S/m at 300 K. DC transconductances varied between 230 and 250 S/m for the MESFET’s. The MESFET’s have the desirable properties of low source resistance 0.3–0.5 Ω mm and low output conductance 8 S/m. It is shown that the drain–source saturation current for an arbitrary MESFET can be predicted to within±10% by an examination of the gate recess with a high‐performance scanning electron microscope.
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January 1988
This content was originally published in
Journal of Vacuum Science & Technology B: Microelectronics Processing and Phenomena
Research Article|
January 01 1988
Sub‐100‐nm gate length GaAs metal–semiconductor field‐effect transistors and modulation‐doped field‐effect transistors fabricated by a combination of molecular‐beam epitaxy and electron‐beam lithography
D. R. Allee;
D. R. Allee
Stanford Solid State Laboratories, Stanford, California 94305
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P. R. de la Houssaye;
P. R. de la Houssaye
Stanford Solid State Laboratories, Stanford, California 94305
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D. G. Schlom;
D. G. Schlom
Stanford Solid State Laboratories, Stanford, California 94305
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J. S. Harris;
J. S. Harris
Stanford Solid State Laboratories, Stanford, California 94305
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R. F. W. Pease
R. F. W. Pease
Stanford Solid State Laboratories, Stanford, California 94305
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J. Vac. Sci. Technol. B 6, 328–332 (1988)
Article history
Received:
May 26 1987
Accepted:
August 26 1987
Citation
D. R. Allee, P. R. de la Houssaye, D. G. Schlom, J. S. Harris, R. F. W. Pease; Sub‐100‐nm gate length GaAs metal–semiconductor field‐effect transistors and modulation‐doped field‐effect transistors fabricated by a combination of molecular‐beam epitaxy and electron‐beam lithography. J. Vac. Sci. Technol. B 1 January 1988; 6 (1): 328–332. https://doi.org/10.1116/1.583990
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