Defect engineering: An approach on ultrashallow junction in silicon

Fabrication of sub-100 nm junctions in ultralarge scale integration becomes extremely difficult due to anomalous diffusion of B in Si. By judiciously placing vacancy and interstitial defects at different depths by implantation of Si ions with different incident energies and dosages in Si, B diffusion can be enhanced or retarded. After preimplantation with 50 or 500 keV $Si+$ ions to produce surface vacancy-rich regions, Si samples were B deposited and annealed at various temperatures between 900 and $1010 °C.$ B diffusion retardation was observed in both implantation conditions after low temperature annealing, while B diffusion enhancement occurred in 50 keV implanted samples after annealing at a high temperature. Choosing high energy implantation to separate vacancies and interstitials can reduce the boron diffusion significantly. Such suppression became more obvious with higher implant dose. Junctions less than 10 nm deep (at $1×1014 cm−3$ by carrier concentration profiles) can be formed.