Cavities, formed by helium implantation and subsequent annealing, have proved to be effective at trapping metal impurities within silicon. This has led to interest in their use as proximity gettering sites. In this investigation, cavity populations were formed by helium implants of energy 40 keV and dose 5×1016cm−2 followed by annealing at 900 °C. This regime produces cavities with a mean void radius of 20 nm, located between 100 and 350 nm below the silicon surface. The effect of the presence of such cavities near the active areas of 1.2 μm p-type metal–oxide–semiconductor field-effect transistor devices is described. Electrical characterization of wafers, which have been implanted with helium on the front or rear silicon surface, has been carried out to determine whether the inclusion of void populations near the active regions of silicon devices is detrimental. These measurements found no evidence of any detrimental effect on the performance of working devices.

1.
The National Technology Roadmap for Semiconductors (Semiconductor Industry Association, San Jose, CA, 1999).
2.
K. Graff, Metal Impurities in Silicon-Device Fabrication (Springer, Berlin, 1994).
3.
S. Wolf and R. N. Tauber, Silicon Processing for the VLSI Era: Process Technology (Lattice Press, California, 1986), Vol. 1.
4.
K. V. Ravi, Imperfections and Impurities in Semiconductor Silicon (Wiley, New York, 1981)
5.
C. C.
Griffioen
,
J. H.
Evans
,
P. C.
De Jong
, and
A.
van Veen
,
Nucl. Instrum. Methods Phys. Res. B
27
,
417
(
1987
).
6.
V.
Raineri
,
P. G.
Fallica
,
G.
Percolla
,
A.
Battaglia
,
M.
Barbagallo
, and
S. U.
Campisano
,
J. Appl. Phys.
78
,
3727
(
1995
).
7.
S. M.
Myers
,
G. A.
Petersen
, and
C. H.
Seager
,
J. Appl. Phys.
80
,
3717
(
1996
).
8.
G. A.
Petersen
,
S. M.
Myers
, and
D. M.
Follstaedt
,
Nucl. Instrum. Methods Phys. Res. B
127
,
301
(
1997
).
9.
F.
Roqueta
,
A.
Grob
,
J. J.
Grob
,
C.
Dubois
,
J.
Faurte
, and
L.
Ventura
,
Solid State Phenom.
69
,
241
(
1999
).
10.
S.
Martinuzzi
,
N.
Gay Henquinet
,
I.
Perichaud
,
G.
Mathieu
, and
F.
Torregrossa
,
Mater. Sci. Eng., B
71
,
219
(
2000
).
11.
F.
Schiettekatte
,
C.
Wintgens
, and
S.
Roorda
,
Appl. Phys. Lett.
74
,
1857
(
1999
).
12.
V. M. Vishnyakov, S. E. Donnelly, G. Carter, P. Walker, and L. I. Haworth, in Proceedings of the Second Summer School and International Workshop on Defect Engineering of Advanced Semiconductor Devices Stockholm, Sweden, 24–29 June 2000.
13.
S. E.
Donnelly
,
V. M.
Vishnyakov
,
R. C.
Birtcher
, and
G.
Carter
,
Nucl. Instrum. Methods Phys. Res. B
175
,
132
(
2001
).
14.
V. M. Vishnyakov, S. E. Donnelly, G. Carter, R. C. Birtcher, and L.I. Haworth, Proceedings of the Ninth Autumn Meeting on Gettering and Defect Engineering in Semiconductor Technology (2001).
15.
F.
Roqueta
,
A.
Grob
,
J. J.
Grob
,
R.
Jérisian
,
J. P.
Stoquert
, and
L.
Ventura
,
Nucl. Instrum. Methods Phys. Res. B
147
,
298
(
1999
).
16.
J. H.
Evans
,
A.
van Veen
, and
C. C.
Griffioen
,
Nucl. Instrum. Methods Phys. Res. B
28
,
360
(
1987
).
17.
J. W.
Medernach
,
T. A.
Hill
,
S. M.
Myers
, and
T. J.
Headley
,
J. Electrochem. Soc.
143
,
725
(
1996
).
18.
S. Wolf, Silicon Processing for the VLSI Era: Process Integration (Lattice Press, California, 1990), Vol. 2.
19.
C. H.
Seager
,
S. M.
Myers
,
R. A.
Anderson
,
W. L.
Warren
, and
D. M.
Follstaedt
,
Phys. Rev. B
50
,
2458
(
1994
).
This content is only available via PDF.
You do not currently have access to this content.