We report on the use of scanned probes to define nanolithographic features in the controlling gate structures of silicon metal‐oxide‐semiconductor field‐effect transistors (MOSFETs). By using an atomic force microscope (AFM) with conducting tips (either Ti coated Si3N4 or heavily doped Si cantilevers) in conjunction with surface adsorbed water, we define oxide structures by anodization which are used as masks for subsequent etching. These patterns consist of such things as constrictions and gratings in the gate. When combined with thin oxides, the pattern of the gate is mirrored in the higher mobility MOSFET inversion layer. Pattern transfer into the gate is accomplished by either direct anodization of the gate material (titanium) or by anodization of sacrificial resists consisting of plasma‐deposited organosilicon polymers from methylsilane precursors. The AFM anodization of titanium has been thoroughly described in the literature, and the AFM anodization of the plasma‐deposited organosilicon is thought to be a similar mechanism but the organosilicon is also photo‐oxidizable when exposed to deep‐UV radiation in the presence of oxygen. Using these two methods (direct anodization of gate material and anodization of sacrificial resists) enables AFM lithography to be carried at virtually any step in the process flow. In this way, nanostructure definition can be carried out as a last step in a standard process or may be inserted earlier. Completed devices and their characteristics will be shown.
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November 1996
This content was originally published in
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena
The 40th international conference on electron, ion, and photon beam technology and nanofabrication
28−31 May 1996
Atlanta, Georgia (USA)
Research Article|
November 01 1996
Silicon metal‐oxide‐semiconductor field‐effect transistor with gate structures defined by scanned probe lithography
M. S. Hagedorn;
M. S. Hagedorn
Department of Electrical Engineering, University of Minnesota, Minneapolis, Minnesota 55455
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D. D. Litfin;
D. D. Litfin
Department of Electrical Engineering, University of Minnesota, Minneapolis, Minnesota 55455
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G. M. Price;
G. M. Price
Department of Electrical Engineering, University of Minnesota, Minneapolis, Minnesota 55455
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A. E. Gordon;
A. E. Gordon
Department of Electrical Engineering, University of Minnesota, Minneapolis, Minnesota 55455
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T. K. Higman
T. K. Higman
Department of Electrical Engineering, University of Minnesota, Minneapolis, Minnesota 55455
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J. Vac. Sci. Technol. B 14, 4153–4156 (1996)
Article history
Received:
June 13 1996
Accepted:
August 12 1996
Citation
M. S. Hagedorn, D. D. Litfin, G. M. Price, A. E. Gordon, T. K. Higman; Silicon metal‐oxide‐semiconductor field‐effect transistor with gate structures defined by scanned probe lithography. J. Vac. Sci. Technol. B 1 November 1996; 14 (6): 4153–4156. https://doi.org/10.1116/1.588610
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