Ultrathin stable Ohmic contacts for high-temperature operation of β-Ga₂O₃ devices

β-Ga₂O₃ is a strong candidate for next-generation high-temperature electronic device manufacturing for both power and sensing applications. As a material, it shows excellent figures of merit for high-voltage operation and high frequency switching, due to its large bandgap and high theoretical breakdown field.^1–3 Additionally, β-Ga₂O₃ is readily n-type dopable at shallow levels, with Si and Sn being the most common dopants.¹ From a manufacturing perspective, single-crystal Ga₂O₃ substrates can be grown by both Czochralski (CZ) and edge-defined film-fed growth, which allows for potential industrial scaling. Projective cost modeling suggests that as the technology develops, the economic viability and technological value of Ga₂O₃-based devices will continue to improve and be competitive with existing SiC and GaN technologies.^4,5

Reliable and stable Ohmic contacts are necessary for all types of Ga₂O₃-based devices. Currently, many groups use some variation of the commonplace Ti/Au metallization scheme, where most frequently a Ti layer of at least 20 nm is applied, followed by a chemically protective and electrically conductive Au layer.^6–18 Variations that include additional diffusion barrier layers are also common.^19–24 This contact scheme is most frequently annealed at $470 ° C$ for 90 s in nitrogen. Titanium is chosen as an interlayer due to its good adhesion to both semiconductors/oxides and other metals, as well as its desirable electrical properties—Ohmic contacts of this design regularly demonstrate minimal degradation at or around room temperature operation. For Ga₂O₃-based devices, this contact scheme has demonstrated low specific contact resistances, on the order of $10 − 3 Ω c m 2$ for traditional n-type substrates,^16,17 and between $10 − 5 and 10 − 6 Ω c m 2$ for surface treated substrates (e.g., ion implantation).^12,13

While these contacts demonstrate acceptable stability at room temperature, few studies have examined the effects of long-term, high-temperature operation on their performance; to date, the few studies done reveal significant problems with rapid contact degradation even at relatively modest temperatures (300–400 °C). One group showed that a Si-implanted substrate treated with a reactive ion etch demonstrated stability with this metallization scheme over the course a 100+ h thermal aging procedure at 300 °C. Compared to this treated substrate, the contact resistance of an untreated metal-semiconductor junction increased by almost 40% over the same period.¹⁷ Previously, we subjected a vertical Schottky device with a 20 nm Ti/100 nm Au Ohmic contact to repeated thermal cycling, up to 410 °C, and found that the series resistance of the device increased by several orders of magnitude.¹⁸ This is problematic for applications where operation to 600 °C is desired.

Degradation of this standard Ohmic contact design is hypothesized to be due primarily to the formation of a 3–5 nm Ti/TiO_x “defective” interfacial layer between the Ga₂O₃ and the Ti contact. This is supported by thermodynamic analysis, as annealing can provide conditions that are favorable for the formation of several different titanium oxides, resulting in redox reactions between titanium and gallium oxide. This is thought to result in a gallium-rich suboxide layer in contact with a TiO_x suboxide layer. In addition, the remainder of the unreacted Ti either forms nanocrystals within Au¹⁶ or migrates through Au to the outer surface over time, likely due to favorable thermodynamic driving factors (i.e., gradients in oxygen chemical potential), as well as facile Ti-diffusion kinetics that increases with temperature.^18,25 As such, electrical performance can be marred by the high Ti mobility and its redistribution during device operation. Both the formation of an oxide layer on top of the gold contact layer and the formation of nanocrystalline scattering sites are thought to reduce the performance and reliability of the Ohmic contact.

While Ti migration is thought to be detrimental to contact stability, the thin Ti/TiO_x “defective” interfacial layer that forms between the Ga₂O₃ and the Ti contact can potentially be beneficial. Several studies of the oxidation state of Ti at the Ti/Ga₂O₃ interface suggest the presence of various Ti_xO_(2x−1) Magnéli phases, which have been shown to be highly conductive and stable in oxidizing environments.^26–29 These findings suggest that leveraging and controlling the interfacial reaction while minimizing excess mobile Ti can potentially be used to improve contact stability.

Here, we show that an ultrathin titanium interlayer maximizes the completion of the reaction with the Ga₂O₃ substrate while minimizing subsequent Ti diffusion. We first compare the performance of a Ti/Au contact to $(001)$ Sn:Ga₂O₃ with 5 and 10 nm of titanium through repeated thermal cycling (15 times) in a N₂ atmosphere. We find that the 5 nm thick Ti contact shows excellent stability and performance under long-term temperature cycling, whereas the 10 nm thick Ti contact shows both greater series resistance and inconsistent thermal and temporal behavior (Fig. 1).

We then further validate both 5 and 10 nm Ti contact designs by fabricating a pair of 12 double-Ohmic vertical devices which we subject to extended high-temperature thermal treatment (600 °C) in a vacuum chamber $(≤ 10 − 4 Torr)$ for an extended period of time (i.e., >500 h for 5 nm; >300 h for 10 nm). We find that for the 5 nm sample, all 12 devices show excellent performance, stability, and repeatability during this extended high-temperature exposure. All 12 devices on the 10 nm sample also demonstrate Ohmic behavior, albeit with both greater variability between devices and overall higher resistances when compared to the 5 nm sample.

Through TEM analysis of the thermally cycled samples, we find that high-temperature operation of the 5 nm samples results in the formation of a highly crystalline, epitaxial titanium oxide interfacial layer which we hypothesize contributes to the reliable, conductive Ohmic contact behavior. Conversely, TEM investigation reveals incomplete oxidation of the thicker 10 nm Ti-based contacts, which correlates with the unstable thermal and temporal behavior of these devices. This also likely explains the thermal instability of the even thicker 20 nm Ti-based contact scheme commonly adopted in the field. We find that diffusion of Ti to the outer surface occurs in both 5 and 10 nm Ti samples, suggesting that its effects are secondary to those of the interfacial contact layer quality.

To test the Ohmic contacts, we employ both thermal cycling (“cycle”) and long-term thermal holds at static temperature (“soaking”) under an inert, flowing atmosphere (N₂) and vacuum $(≤ 10 − 4 Torr)$⁠, respectively.

Devices were fabricated using $(001)$ Sn-doped Ga₂O₃ from Novel Crystal Technologies. Photoresist was removed from the as-delivered substrate via an organic wash, followed by a sulfuric acid/peroxide rinse. The bi-metal deposition of Ti/Au via e-beam was performed with a Temescal FC2000 Evaporation System in high vacuum $(≤2× 10 − 6 Torr)$ without venting between layers. Contacts fabricated for thermal cycling consist of two large-area pads (average area of each $≅0.13 c m 2$⁠) deposited on a 5 × 10 mm² piece of Ga₂O₃ substrate in a lateral configuration. Contacts fabricated for thermal soaking consist of a monolithic large-area back contact, and a 3 × 5 matrix of 500 μm square pads (area of each pad $=2.5× 10 − 3 c m 2$⁠) in a linear transmission line method configuration as a front contact.

The difference in device design between the thermal cycling and thermal soaking experiments had multiple intentions. First, the instrument in which the thermal cycling was performed has stationary probe tips. Given the wide temperature range, we chose a large area to help alleviate any thermal expansion that might cause the probes to slip off. Second, the large area aided in the post-mortem analysis by ensuring the presence of regions that were unaffected by mechanical damage from the probe tips. Finally, the variation in contact size allows evaluation of performance for both large- and small-area pads.

Following contact deposition, samples were annealed via rapid thermal processing (ULVAC-RIKO MILA-3000 Rapid Thermal Processing Unit) at 550 °C for 90 s in flowing N₂. On separate $10×10 mm$ substrates with metallized corners, the carrier concentration was determined via high-temperature Hall measurement from $50 to400 ° C$ via a custom instrument.³⁰ Values were approximately constant in this temperature range at $∼4× 10 18 c m − 3$⁠. See supplementary material³³ for a more detailed depiction of these results, including resistivity and mobility.

For thermal cycling, two-probe measurements (source I, measure V) were performed by a Keithley 236 SMU in an Instec HCP621G-PMH probe station under flowing nitrogen at 40 SCCM. A single thermal cycle consisted of ramping from 25 to 550 °C and back down to 25 °C in 75 °C increments. Each temperature increment was allowed to equilibrate for 15 min before electrical measurements were performed.

Thermal soaking experiments were performed in a custom McAllister vacuum probe station with two probe arms, each equipped with three-axis stepper motors. The stepper motor and temperature could be controlled externally, enabling sequential measurement of multiple devices without breaking vacuum. A vacuum level of $≤ 10 − 4 Torr$ was maintained by an Agilent TPS-compact vacuum pump. Electrical measurements were performed with the same Keithley 236 SMU. To initiate the long-duration thermal soak, the probe station was first ramped from room temperature to $600 ° C$ at approximately $50 ° C$ per hour, with electrical measurements collected after each $75−90 ° C$ increment.

Both probe stations utilized a silver stage with embedded thermocouples for a temperature feedback loop via the temperature control software. It was assumed that hold times (15 min for cycling, 1–2 h for soaking) were long enough for thermal equilibration to occur between the stage and the device. Device design and testing configurations for both cycling and soaking are shown in Fig. 2.

Figure 3 summarizes the results of electrical measurements for 5 and 10 nm Ti contact architectures subject to extended thermal cycling. For both samples, the temperature was ramped from $25$ to $550 ° C$ and back down to $25 ° C$ in increments of $75 ° C$⁠. Electrical measurements were performed during each temperature increment after a 15-min equilibration period, and a total of 15 cycles were performed, as was summarized in Fig. 1. Total testing time was approximately 90 h for each of the contact architectures.

The 5 nm sample exhibited extremely stable and consistent behavior. Averaged over all cycles, the series resistance increased very slightly with increasing temperature (e.g., from $≈0.31±0.035 Ω c m 2$ at room temperature to $≈0.32±0.032 Ω c m 2$ at $550 ° C$⁠), as well as with increasing cycle number. After 15 cycles, the room temperature series resistance increased from $≈0.26 Ω c m 2$ (cycle 1) to $≈0.37 Ω c m 2$ (cycle 15), a change of 44% or $0.11 Ω c m 2$⁠.

In contrast, significant variability in the measured series resistance was observed for the 10 nm sample, especially with increasing cycle number. The first eight cycles produced relatively consistent resistance values that gradually increased from $≈0.6 Ω c m 2$ (cycle 1) to $≈1.4 Ω c m 2$ (cycle 8). Series resistance was highest at room temperature and trended toward a minimum at $325 ° C$ before gradually increasing again at still higher temperatures. After the first eight cycles, the series resistance behavior became less consistent, particularly at lower temperatures, with values ranging between $≈1.5 and5 Ω c m 2$⁠, representing an increase of 250%–900% compared to the initial cycle behavior.

After reaching $600 ° C$⁠, the series resistance of the 12 devices was periodically measured every 1–3 days. The 5 and 10 nm samples were soaked separately under the same conditions and testing procedures. An alumina platform with the 5 nm Ti/100 nm Au metallization scheme was utilized to access the back Ohmic contact of the devices. Shown in Fig. 4(a), the 12-device average series resistance of the 5 nm Ti sample decreased in magnitude from an initial value of $7.7±2.09 Ω$ to a final value of $5.95±0.23 Ω$ over the course of the >500-h thermal soak at 600 °C. Figure 4(b) shows the 12-device average series resistance of the 10 nm Ti sample also decreased with time, from an initial value of $16.08±0.99 Ω$ to a final value of $9.96±0.68 Ω$ over the course of the >300-h soak at 600 °C. This represents a factor of $∼2$ increase when compared to the 5 nm Ti sample. Contact resistances extracted from TLM measurements after significant thermal stress were on the order of $10 − 3 Ω c m 2$ for both 5 and 10 nm architectures.

Note that the values in Fig. 4 are reported in $Ω$ instead of $Ω c m − 2$ as they include the probe tip resistance, leads, etc., which were found to contribute significantly to the overall resistance. Measurements of each of these contributions were attempted; however, they yielded results that proved too difficult to confidently deconvolve. Hence, we report the lumped resistance values in their entirety. See supplementary material³³ for full results of both TLM measurements and back platform resistances.

The first $≈50 h$ of thermal soaking produces the greatest variability for the 5 nm sample; after this, all variations seen in the average series resistance across all devices are within one standard deviation of the mean. This behavior suggests a “break-in” period occurs during the initial ∼50-h period at temperature during which thermal or electrical processes drive the system toward a uniform, stable equilibrium. Contrasting this, the resistances of the 10 nm Ti devices showed more significant variability for the entirety of the soak, suggesting a wider range of conduction mechanisms or contact morphologies that might not achieve uniformity under these testing conditions.

To understand this behavior, TEM lamellae were prepared from the 5 and 10 nm Ti samples that were repeatedly cycled between room temperature and 550 °C. An FEI Helios Nanolab 600i was used following standard focused ion beam (FIB) lift-out techniques and a 2 kV clean final step to minimize specimen ion beam damage.³¹ The 5 nm specimen was capped with carbon via permanent marker before FIB lift out to protect the top surface, while the 10 nm specimen was capped only with electron-beam Pt GIS deposit followed by ion-beam Pt GIS deposit. The 5 nm specimen was lifted out parallel to the substrate $(010)$ plane while the 10 nm specimen was lifted out parallel to $(100)$⁠. The thicknesses of both specimens were optimized for analytical and diffraction analyses, approximately 70–80 nm. TEM specimens were analyzed in an FEI Talos F200X Scanning Transmission Electron Microscope (STEM) at 200 keV. A camera length of 98 mm was used for STEM imaging with a spot size of 9 for micrographs and a spot size of 5 for Energy Dispersive Spectroscopy (EDS) mapping. Microprobe mode, a camera length of 98 mm, and a spot size of 7 were used for diffraction mapping. EDS spectral images were semiquantitatively analyzed using Cliff-Lorimer methods and published k-factors.³² 

EDS spectral images of the two specimens (Fig. 5) reveal that in both samples, Ti and Ga have migrated through the gold layer to the top surface of the device. Gallium forms a very thin (<5 nm), uniform layer across the top Au surface, while Ti is inconsistently distributed across the Au surface with some thicker regions and some regions where very little Ti is present. Intensity profiles across this wide field of view indicate that this outer Ti layer is oxidized. Since sample preparation was carried out using a Ga FIB, contamination giving the impression of Ga presence cannot be discounted. However, the 5 nm Ti specimen provides good evidence that this Ga layer is real and not an artifact since the carbon capping contains no Ga and is sufficiently thick to protect the buried Au surface from any Ga implantation due to the milling process. Ga implantation from the side during sample thinning would be expected to be consistently dense throughout and mostly removed by the final 2 kV polish.

The bottom two panels of Fig. 5 show HAADF images of the 5 and 10 nm samples, contrasted by atomic number. The Ti contact appears as the thin dark layer in both TEM images. In both cases, the actual Ti layer thickness observed in the TEM cross sections is slightly smaller than the nominal target thickness (∼8 nm for “10 nm” contact and 4.5–4.7 nm for “5 nm” contact), demonstrating the need for a high degree of precision when fabricating contacts. Additionally, the Ti layer of the 10 nm specimen shows slightly more thickness variation. The single-crystal Ga₂O₃ substrate underlying the 10 nm Ti sample (leftmost layer in the TEM image) has vertical striations most likely due to more aggressive specimen preparation curtaining the lamella or possibly due to differences in milling behavior of the differing crystallographic plane of the substrate.

Figure 6 shows intensity profiles of the EDS signal from the narrow field of view EDS maps at the Ti/Ga₂O₃ interfacial layer. In both specimens, the Ti layer is oxidized, with the 10 nm layer having a higher oxygen fraction than the 5 nm layer. The oxygen fraction in the 10 nm layer approaches the value expected for stoichiometric TiO₂, but the EDS map indicates significant oxygen content throughout the sample including in the gold layer; hence, conclusions related to the exact stoichiometry of the interfacial layer cannot be established with full certainty. Experimental differences such as changes in lamella thickness between the two samples can cause atomic fraction quantification irregularities. Additionally, as shown later, the Ti layer contains significant amounts of anatase TiO₂ so the actual Ti:O ratio is expected to be near 1:2 in both samples. The intensity profiles also show that there is Ga diffusion into the Ti layer and a small peak of higher Ga concentration between Ti and Au, further confirming that Ga is likely migrating through the samples, leading also to the Ga layer previously noted on the top Au surface of the samples.

STEM-convergent beam electron diffraction pattern maps were taken of each sample aligned with the zone axes of the planes parallel to the lamellae, i.e., $[100]$ and $[ 0 1 ¯ 0]$ for the 10 and 5 nm samples, respectively. Using the experimental setup defined earlier, the focused probe diameter was sub-nm at the specimen. Representative diffraction patterns from each layer of each sample are shown in Fig. 7. The $(001)$ substrate reflection is co-oriented with the surface in both cases. The titanium layer diffraction patterns were indexed against elemental Ti as well as rutile, anatase, and brookite TiO₂ phases. The best matches were the $[310]$ and $[201]$ anatase zones for the 10 and 5 nm samples, respectively. The anatase diffraction patterns of both samples indicate that ${ 3 ¯ 16}$ is co-oriented with the growth plane. The 10 nm sample shows a substantially more amorphous character (diffuse intensity rings around the direct beam) and diffraction spots from a secondary phase in the diffraction patterns of the Ti layer. In contrast, the substrate and the Au diffraction patterns lack any signs of amorphous character in either sample. The Au diffraction patterns reveal a textured polycrystalline structure. $⟨110⟩$ zones make up most of the specimen with $(111)$ generally oriented in the growth direction. The thin Ga layer indicated by EDS between Ti and Au was not evident in these diffraction maps.

Separate diffraction maps were taken from the TiO_x clusters on the top Au surface of the 5 nm sample only. This material is polycrystalline with grains on the scale of 1 nm. The grains are not epitaxial and only some diffraction patterns are on a discernable zone. Both rutile and brookite diffraction patterns are identifiable, but with significant amorphous character. However, this amorphous contribution could come largely from the protective capping added during sample preparation rather than the sample itself. Although not investigated, we presume that the TiO_x clusters formed on the top Au surface of the 10 nm sample are similarly structured with a mix of rutile, brookite, and amorphous TiO_x.

The diffraction mapping results indicate epitaxial growth of anatase in both cases, but the 10 nm layer has some amorphous character and secondary phase and does not complete its transformation from elemental Ti to fully oxidized anatase TiO₂. The implied epitaxial relationship $( 001 ) G a 2 O 3|| ( 3 ¯ 16 ) Ti O 2$ and $[ 0 1 ¯ 0 ] G a 2 O 3|| [ 201 ] Ti O 2$ is at first improbable. First, the anatase $[201]$ and $[310]$ zones are not perpendicular; they are 78° separated. The anatase diffraction patterns off-zone from [310] do, however, appear very similar to $[310]$ even at large mistilts. Simulations of diffraction patterns 90° perpendicular to $[ 210 ] anatase$ (i.e., 12° from $[310]$⁠), nevertheless, share many of the same reflections as $[310]$ and include the $( 3 ¯ 16)$ reflection. So, the 10 nm Ti diffraction pattern is only close to $[310]$ and not fully on zone.

We also consider the oxygen-containing $( 3 ¯ 16 ) anatase$ planes relative to the Ga₂O₃ substrate, shown in Fig. 8. Both planes have a similar offset dumbbell motif; the O–O spacing in the $[210]$ direction of anatase TiO₂ as well as the $[010]$ direction of Ga₂O₃ is approximately 3.1 Å. The O–O spacing between adjacent dumbbells is also similar at 6.2 and 6.4 Å for TiO₂ and Ga₂O₃, respectively. There is a reasonable atomistic matching pattern to explain this epitaxial growth pattern and diffraction evidence supporting this co-orientation in both specimens and viewed in separate directions.

To summarize, TEM analysis shows that in both the 5 and 10 nm cases, the Ti layer forms epitaxial anatase phase TiO₂; Ti migrates to the surface and forms unevenly distributed titanium oxide patches; and Ga also migrates to both the Ti-Au interface and the surface and forms a thin, evenly distributed layer. The key difference between the two specimens is that the 5 nm anatase layer is fully crystalline whereas the 10 nm anatase layer contains a substantial amount of amorphous TiO_x second phase that affects the performance of the Ohmic contact.

We have successfully fabricated Ohmic contacts to (001) Sn:Ga₂O₃ using an ultrathin layer of Ti (5 nm) with a Au capping layer (100 nm). These contacts show remarkable stability and excellent Ohmic performance after both extensive thermal cycling between 25 and 550 °C in $N 2$ and long-term thermal soaking at 600 °C for >500 h under vacuum conditions. Through TEM analysis, we show that the 5 nm Ti layer is sufficiently thin that it completely transforms to an epitaxial, highly conductive anatase titanium oxide layer, which provides a stable Ohmic contact. In contrast, the 10 nm Ti layer does not fully react during thermal cycling, leading to a partially amorphous TiO_x layer that does not enable a stable Ohmic contact. Additionally, the 10 nm Ti design showed both larger resistances and greater variability in performance during a similar >300-h soak at 600 °C. While Ti is found on the outer surface of the Au layer in both 5 and 10 nm Ti samples, the homogeneity of the interlayer at the Ga₂O₃ interface appears to have a greater impact on the overall performance and stability of the contact. Integration of this ultrathin Ohmic contact design will aid development of high-temperature devices, by specifically shifting research focus to stable rectifying interfaces, p-type heterojunction materials, and other functional layers.

This work was authored by the National Renewable Energy Laboratory (NREL), operated by Alliance for Sustainable Energy, LLC, for the U.S. Department of Energy (DOE) under Contract No. DE-AC36-08GO28308. Funding is provided by the Office of Energy Efficiency and Renewable Energy (EERE) Advanced Manufacturing Office. This microscopy work was supported by the National Science Foundation (NSF) under Award No. 2125899. The views expressed in the article do not necessarily represent the views of the DOE or the U.S. Government.

The authors have no conflicts to disclose.

William A. Callahan: Conceptualization (equal); Data curation (equal); Formal analysis (equal); Investigation (equal); Methodology (equal); Software (equal); Visualization (equal); Writing – original draft (equal); Writing – review & editing (equal). Edwin Supple: Data curation (lead); Formal analysis (lead); Methodology (equal); Visualization (lead); Writing – review & editing (equal). David Ginley: Conceptualization (equal); Funding acquisition (equal); Methodology (equal); Writing – review & editing (equal). Michael Sanders: Conceptualization (equal); Methodology (equal). Brian P. Gorman: Methodology (equal); Writing – review & editing (equal). Ryan O’Hayre: Conceptualization (equal); Funding acquisition (equal); Methodology (equal); Writing – review & editing (equal). Andriy Zakutayev: Conceptualization (equal); Funding acquisition (equal); Methodology (equal); Project administration (equal); Writing – review & editing (equal).

The data that support the findings of this study are available within the article and its supplementary material (Ref. 33).