Beta-gallium oxide (β-Ga2O3) is an ultrawide bandgap semiconductor that has potential for power electronic applications and devices operating at high temperatures. Particularly important for these applications are its 4.9 eV bandgap, facile electron doping, and the ability to grow β-Ga2O3 crystals from the melt. In this work, vertical β-Ga2O3 Schottky barrier diodes were fabricated using Pt Schottky and Ti-based Ohmic contacts and Au contact pads on unintentionally doped n-type, (2¯01)-oriented single crystal substrates. The diode’s temperature-dependent electrical properties up to 400 °C were investigated, and the Pt/Ga2O3 Schottky barrier height was determined to be close to 1.2 eV. The degradation of the contacts over multiple cycles up to 400 °C was observed, resulting in a significant increase in series resistance of the diodes by 1000× at ambient temperature after they were cycled. According to electron microscopy measurements, this degradation is likely due in part to the migration and oxidation of Ti at the top surface of the Au contact pads. This degradation highlights the need for further research and development to ensure stable Ohmic and Schottky contacts to Ga2O3 at temperatures above 400 °C.

Gallium oxide (Ga2O3) is an ultrawide bandgap (UWBG) semiconductor1 that is gaining traction in the electronics community.2 The bandgap of β-Ga2O3 is around 4.9 eV, and it can be doped n-type,3 which should enable operation at higher frequencies and powers than more conventional wide-bandgap semiconductors such as GaN and SiC.4 In addition, Ga2O3 provides a promising low-cost platform for UWBG semiconductor devices because, much like silicon, Ga2O3 can be grown via melt growth processes such as Czochralski growth5 and edge-fed growth (EFG).6 According to the recent technoeconomic analysis, 6 in. Czochralski Ga2O3 wafers should become 3–5× less expensive than 6 in. silicon carbide (SiC) in the next 10–20 years.7 

However, the thermal conductivity of Ga2O3 is around 0.11 W cm−1 K−1,8 which is significantly lower than GaN and SiC. Furthermore, the mobility of Ga2O3 is typically lower than GaN and Si semiconductors.2 These are two limiting factors for high-power and high-frequency applications at room temperature, in part because power devices on Ga2O3 would require significant cooling to remove excess heat. For high-temperature applications, however, the low thermal conductivity of Ga2O3 is less of an issue. At higher temperatures, local heating due to high power or high frequency is a smaller portion of the total heat load on the device. Thus, sensors that operate at low-power and low-frequency but at high temperature are promising targets for the initial deployment of Ga2O3.

The current state-of-the-art high temperature electronics are based on Si, GaN, or SiC. However, the temperature limit for conventional Si electronics is typically below 150–200 °C, often due to limitations of plastic packaging. Silicon-on-insulator (SOI) electronics can help decrease leakage and enable higher performance than just monolithic Si at higher temperatures, but due in large part to Silicon's lower band gap of 1.1 eV, device operation would still be limited to 300 °C,9 which is rarely achieved. SiC and GaN are promising materials for high temperature applications and have shown particular advantages over Si electronics in high-temperature converters, rectifiers, and microelectromechanical system (MEMS) devices.10 However, they are significantly more expensive to manufacture than traditional silicon electronics.

The realization of Ga2O3 devices that operate at high temperatures of >300 °C for long periods of time requires stable interfaces and contacts. Recent work has investigated the heating of Schottky contacts of various metals11,12 and oxides.13 A study of oxidized platinum group metals, in particular, showed stability as high as 500 °C.14 Tungsten Schottky contacts have also been shown to be operable as high as 500 °C.15 In addition, some studies have looked at the stability of various Ohmic contacts to Ga2O3, including using a series of rapid thermal anneals (RTAs) to determine stability and reduce resistivity of the contact.16 By diving deeper into mechanistic implications, some studies examined the typical Ti/Au Ohmic contact used for Ga2O3 over longer periods of time at high temperatures.17,18 As yet, there is a gap in the characterization of the high temperature reliability of Schottky barrier diodes that combine the Ohmic and Schottky contacts under an applied electric field.

In this article, we fabricate Schottky barrier diodes (SBDs), utilizing both Schottky (Pt-based) and Ohmic (Ti-based) contacts made to Ga2O3, and cycle them up to 400 °C and back down to room temperature several times. Upon initial measurement, the barrier height of the Pt/Ga2O3 junction was found to be around 1.2 eV, and the on/off ratio ranged from >109 at room temperature down to ∼101 at 400 °C. The ideality factor and the reverse leakage current remain stable upon cycling. Performance decreases are seen mainly in the forward biasing conditions, with a significant increase in series resistance over several cycles. According to microscopy characterization, this degradation is likely due to the migration of the Ti Ohmic contact from the Ga2O3 interface to the top of the Au contact pads with subsequent oxidation.

Ga2O3 Schottky diodes were fabricated on unintentionally doped (UID) (2¯01) oriented Ga2O3 substrates, purchased from Novel Crystal Technology (Tamura Corporation). The steps used to fabricate the diodes are shown in Fig. 1. Substrates were first cleaned using a sequential rinse of acetone, 2-propanol (IPA), and de-ionized (DI) water, before drying with a dry N2 gun (a sequence that is abbreviated as “solvent clean” in the diagram). To help prepare the surface prior to Ohmic contact deposition, a second cleaning step was used, consisting of dipping the wafers in 30% hydrochloric acid (HCl) in H2O, rinsing with DI water, and again drying the surface with a dry N2 gun.

FIG. 1.

Process flow for fabricating the β-Ga2O3 Schottky barrier diodes presented in this work.

FIG. 1.

Process flow for fabricating the β-Ga2O3 Schottky barrier diodes presented in this work.

Close modal

For Ohmic contact deposition, e-beam evaporation was used to deposit Ti (20 nm)/Au (100 nm), with Ti to form the Ohmic contact, and Au as a capping layer to prevent oxidation of the titanium from the environment and to form the contact pad. The wafer with the Ohmic contact was then annealed via rapid thermal processing (RTP) at 400 °C for 1 min to reduce resistivity across the junction, as shown in other studies.16 

After annealing of the Ohmic backside contact, the wafer was cleaned for the Schottky contact by repeating the subsequent rinsing steps of acetone, IPA, and DI water. The Schottky contacts of Pt (50 nm)/Ti (10 nm)/Au (100 nm) were then deposited through a shadow mask via e-beam evaporation. The shadow mask for the topside contacts had circular holes for the devices, with diameters of 1, 0.5, and 0.2 mm.

Diodes were characterized using a probe station with a mapping stage to measure devices at each temperature setpoint, using a Keithley 2440-C 5A SourceMeter to control the voltage and measure current, and a program in LabView to control the source meter, save the data, and combine the J-V data with the temperature setpoints. The diodes were first biased in the forward direction, going from 0 to +5 V, then in the negative direction, from 0 to −5 V, and the maximum current compliance was held at 100 mA.

Temperature setpoints were set using a thermocouple and a feedback loop to a platen underneath the samples. To calibrate the temperature drop between the devices and the heating plate, and to get a more accurate measure of the actual Ga2O3 temperature, a swatch of colloidal graphite paint was painted onto a quadrant of the ITO/glass mounting plate, and an FLIR T400 camera was used to take a picture of the graphite swatch, using a thermal emissivity of 0.8 for the graphite. See supplementary material31 for the temperature calibration versus setpoint temperature.

For Ga2O3 cross section transmission electron microscopy (TEM), lift out specimens were prepared using the focused ion beam (FIB) method, with the final Ga+ ion milling performed at 3 kV. The Ga+ ion FIB damage was subsequently removed using low energy (<1 kV) Ar+ ion milling in a Fischione NanoMill, with the sample cooled by liquid nitrogen. Scanning transmission electron microscopy (STEM) imaging and energy dispersive x-ray spectroscopy (EDS) mapping analysis were performed in a FEI Tecnai F20 UltraTwin field emitting gun STEM. The STEM was operated at 200 kV and equipped with an EDAX Octane T Optima windowless Si drift detector (SDD) EDS system. EDS maps were generated from the x-ray counts after background subtraction using EDAX TEAM quantification software.

Increasing temperature of the diodes during operation has several pronounced effects on the J-V curves, under both positive and negative biases. Figure 2(a) shows a semilog plot of the J-V results from measuring a diode with a diameter of 1 mm for the top contact. As the temperature is increased from room temperature (25 °C) to the peak temperature of 410 °C, we observe the following changes in Fig. 2(a).

FIG. 2.

(a) Semilog plot of the J-V results of a Schottky diode with a diameter of 1 mm, measured as the temperature is brought up to 410 °C. (b) Plot of ln(J−2V/T2) vs 1/kbT from fitting the J-V data from part (a). Resulting barrier height from fitting this line is around 1.2 eV.

FIG. 2.

(a) Semilog plot of the J-V results of a Schottky diode with a diameter of 1 mm, measured as the temperature is brought up to 410 °C. (b) Plot of ln(J−2V/T2) vs 1/kbT from fitting the J-V data from part (a). Resulting barrier height from fitting this line is around 1.2 eV.

Close modal

First, the leakage current of the diode increases by approximately 1 order of magnitude for every 40 °C increase in the temperature. The lowest temperatures have a leakage current lower than the noise floor of the source meter, so those changes are observed starting at around 150 °C. Second, the diode on/off ratio at ±2 V starts at >109 at room temperature and decreases to 17 at 410 °C, as a result from the increased leakage current (or saturation current) in the diode equation. Third, the turn-on voltage, determined by fitting the linear portion of the J-V curves (∼1.5–4.0 V), decreases as the temperature is increased, ranging from just over 1 V at room temperature down to 0.1 V at 410 °C, due to a reduction in the Schottky barrier height and higher energy of electrons with the increased temperature.

All of these changes in measured J-V curves as a function of temperature in Fig. 2(a) are consistent with the diode equation for the thermionic emission (TE) model,

(1)

where

(2)

in which A* is the Richardson constant, J is the current density, Jo is the saturation current, q is the charge of an electron, V is the voltage, k is the Boltzmann constant, φb is the barrier height, and T is the temperature.19 Thus, the thermionic emission (TE) model seems to be adequate to describe the temperature dependence of the Ga2O3 Schottky barrier diodes, at least to the first approximation.

Figure 2(b) shows an Arrhenius plot of ln(J−2V/T2) versus 1/kT based on the data presented in Fig. 2(a) where J−2V is the current density at the −2V bias. The slope of this plot is the barrier height for the Schottky contact, which is found to be approximately 1.2 eV. This value is well within the range of barrier height values of the Pt/(2¯01) β-Ga2O3 interface in Schottky barrier diodes in the literature.20 The Richardson constant extracted from the intercept of the plot in this analysis gives a value of around A* = 21 A/cm2 K2, which is lower than the predicted value of around 40 A/cm2 K2,21 but minor perturbations from noise in the measurements can change the intercept of the fit, significantly impacting the calculated fit value.

In addition to these changes expected from the ideal diode equation for the thermionic emission (TE) model, several additional nonidealities are observed in Fig. 2(a). For example, the calculated ideality factor for the diode ranges from a value of 11 at the peak temperature to 1 at room temperature, likely due to inhomogeneities in the Schottky barrier. This change in the ideality factor with increasing temperature and the decreasing turn-on voltage mentioned above have been reported in other publications.22,23 More importantly, the series resistance of the diodes increases from 0.1 Ω cm2 at room temperature to 0.4 Ω cm2 at 380 °C. Variation and degradation are observed at all temperatures as the diodes are cycled, and are likely due to the degradation of the contact, as discussed in Sec. III B.

As the diodes were cycled up to 410 °C and back down to room temperature, there was some degradation apparent in the diode J-V curves. This degradation shows up more in some parameters of the diode J-V curves than in others. To compare the diode parameters over both the temperature range of the cycling and between the different cycles, Fig. 3 shows a series of color maps for different diode parameters, with calibrated temperature in °C on the y-axis and the cycle number for all 10 cycles (indexed to 0) on the x-axis. See supplementary material31 for the J-V curves of the Cycle 9 temperature sweep, and for color maps of additional diode parameters across cycles and temperatures.

FIG. 3.

Results from 1 mm diameter diodes (0.5 mm diameter for cycle 2) over multiple cycles up to 410 °C. (a) Current density at −2 V, (b) calculated ideality factor using the diode equation, (c) On/Off ratio at ±2 V, and (d) series resistance in Ω cm2 calculated by fitting a line to the 3–5 V bias range. Cycle numbers, shown on the x-axis of each plot, start at 0 and go up to 9. The y-axis of each plot is the calibrated temperature in °C.

FIG. 3.

Results from 1 mm diameter diodes (0.5 mm diameter for cycle 2) over multiple cycles up to 410 °C. (a) Current density at −2 V, (b) calculated ideality factor using the diode equation, (c) On/Off ratio at ±2 V, and (d) series resistance in Ω cm2 calculated by fitting a line to the 3–5 V bias range. Cycle numbers, shown on the x-axis of each plot, start at 0 and go up to 9. The y-axis of each plot is the calibrated temperature in °C.

Close modal

The absolute value of the current density at −2 V (J–2V) across the range of calibrated temperatures and cycle numbers is shown in Fig. 3(a), and the calculated ideality factor using the diode equation is shown in Fig. 3(b). The leakage current at the lowest temperatures is below the noise floor of the instrument, hence the lack of change as the temperature is increased before hitting that threshold. After exceeding the noise floor of the instrument, the leakage current increases at higher temperatures, as expected. Additionally, the calculated ideality factor stays pretty close to 1 at lower temperatures and then increases significantly at temperatures over 350 °C. In contrast to strong temperature changes, neither the reverse current density nor the effective ideality factor of the Schottky barrier diodes showed any significant change across cycle numbers. In addition, the barrier height from fitting a Richardson plot for each cycle remains close to 1 eV for all cycles.

The ratio between the current density at +2 and −2 V, which will be referred to as the on/off ratio, is shown in Fig. 3(c). In the on/off ratio, there is a decreasing trend at low temperatures occurring over the first few cycles. After that initial decrease, the on/off ratio stays about the same from cycle to cycle. Since the leakage current is increasing at increased temperatures, as expected from the diode equation, the on/off ratio decreases with increasing temperature for all cycles. Figure 3(d) shows the series resistance as a function of cycle number and temperature. This series resistance, calculated by fitting a line to the range from around 3 to 5 V bias, shows two trends. First, the series resistance decreases with increasing temperature, at least at the low temperatures. Second, the series resistance increases by over 3 orders of magnitude between 1 and 8 cycles, from ∼0.1 Ω/cm2 to ∼100 Ω/cm2, which is a significant indicator of the degradation of the diodes.

After 10 cycles, the diodes were brought back up to the peak temperature of 400 °C and held for 4 h. See supplementary material31 for a comparison between J-V curves at 400 °C for the first cycle and during the hold time.

To investigate the potential reason for β-Ga2O3 diode performance degradation due to the formation of various interfacial layers, we performed scanning transmission electron microscopy (STEM) with the energy dispersive x-ray spectroscopy (EDS) analysis to compare the Schottky and Ohmic contacts before and after cycling. To enable these STEM EDS measurements, FIB was used to create lift-outs for all four contact positions, with the results shown in Fig. 4. The cross-sectional EDS elemental maps of the contacts on an uncycled sample show that the Ti layer underneath Au is right up against the Ga2O3 substrate for the Ohmic contact [Fig. 4(c)]. For the Schottky contact [Fig. 4(a)], a thin layer of Pt is visible in between the Ga2O3 and Au layers. The cross sections of the contacts on a sample that has gone through seven cycles up to 400 °C indicates that Ti migrated through the Au layer to the outside of both Schottky [Fig. 4(b)] and Ohmic [Fig. 4(d)] contacts. In addition, this Ti at the top of the Au contact pad has been oxidized, and some Ag is present due to the Ga2O3 device mounting scheme. This Ti migration and oxidation may be significant factors in the degradation of these Ga2O3 diodes, in particular, for the Ohmic contact during high-temperature operation for prolonged periods of time.

FIG. 4.

Elemental overlays of STEM EDS net x-ray count maps: (a) Schottky Pt/Ti/Au contact before cycling, (b) Schottky Pt/Ti/Au contact after cycling, (c) Ohmic Au/Ti contact before cycling, and (d) Ohmic Au/Ti contact after cycling.

FIG. 4.

Elemental overlays of STEM EDS net x-ray count maps: (a) Schottky Pt/Ti/Au contact before cycling, (b) Schottky Pt/Ti/Au contact after cycling, (c) Ohmic Au/Ti contact before cycling, and (d) Ohmic Au/Ti contact after cycling.

Close modal

One potential reason for Ti migration from the Ga2O3 interface to the outer surface of the Au contact pad is the larger negative reaction energy of Ti oxidation in ambient atmosphere compared to Ti oxidation by Ga2O3 decomposition. The Ti oxidation by Ga2O3 decomposition can proceed according to the following reactions:

(3)
(4)

According to literature,24,25 the theoretical and experimental energies of these reactions are (1) ΔHcalc = −8.825 eV, ΔHexp = −654 kJ mol−1 and (2) ΔHcalc = −6.103 eV, ΔHexp = −539 kJ mol−1, respectively. These reaction energy numbers are smaller than the corresponding formation energies of TiO2 (ΔHcalc = −10.535 eV, ΔHexp = −944 kJ mol−1) and TiO (ΔHcalc = −11.662 eV, ΔHexp = −1085 kJ mol−1), which may provide a driving force for Ti migration from the Ga2O3 interface toward the outer surface. Another potential reason for Ti migration is the applied electric field, but it is less likely since Ti was observed on the outer surfaces of both Schottky and Ohmic contacts that are biased at opposite polarity at any given time.

There have been several recent studies on the degradation of Ti/Au Ohmic contacts to β-Ga2O3 at elevated temperature.17,26 In these studies, electron microscopy was used to observe the interface between Ti and Ga2O3, particularly after an annealing step to 470 °C for a few minutes during β-Ga2O3 device fabrication, showing a layer of interfacial TiOx and oxygen-poor β-Ga2O3 forming at the Ti/Ga2O3 interface. While the short time and high temperature of the anneal helps to reduce the resistivity of the Ti/Ga2O3 interface, this contact is not fully stable for prolonged times at the temperature of 410 °C reached in this study under the electric field. These interfacial TiOx layers and Ti migration are likely the cause for the significant increase in the β-Ga2O3 diode resistance that is observed at higher cycle numbers in Fig. 3(d). The STEM EDS results presented in this article (Fig. 4) show that Ti migration and oxidation at the top of Au pads may be also important for β-Ga2O3 diode performance and reliability.

The STEM EDS Ti migration results and discussion presented above provide a new insight into the mechanism of β-Ga2O3 contact degradation at high temperature and under applied bias. However, Ti migration in Au contacts is well known for other electronic devices. The Ti diffusion in Au has been studied for decades in the context of metallization layers in microelectronic applications,27,28 with the high diffusion coefficients and low activation energies being well established. It is known that such Ti diffusion can be mitigated by including other interlayers in the contact stack, such as Al29 or TiN.30 Similar strategies could be used to mitigate Ti migration in β-Ga2O3 devices, leading to the improvement of their performance and high-temperature reliability.

Vertical Schottky barrier diodes were fabricated on UID Ga2O3 substrates, their temperature-dependent J-V characteristics were analyzed up to over 400 °C, and cycled up to this temperature several times to examine degradation. At room temperature, before cycling, the devices had a turn-on voltage close to 1 V, an ideality factor of 1.02, a series resistance of 0.123 Ω cm2, and an on/off ratio of > 109 at ±2 V. Upon heating up to 400 °C, the turn-on voltage decreased to 0.1 V, the ideality factor increased, and the on/off ratio at ±2 V decreased to 17. These changes correspond to the Schottky barrier height of approximately 1.2 eV and a Richardson constant of 20 A/cm2 K2. Degradation in the diodes was observed through thermal cycling, primarily in the form of an increase in series resistance up to 24 Ω cm2, resulting in a decrease in the on/off ratio down to 2 × 106 at ±2 V at room temperature.

To further improve the Schottky barrier diodes’ operating temperatures beyond the 400 °C shown in this study, more work needs to be done in developing these Ga2O3 electronic devices. In particular, the stability of an Ohmic contact to Ga2O3 is of concern. Titanium, as one of the most common metals used for that Ohmic contact, is likely to bind the oxygen from Ga2O3 near the contact, increasing the contact resistance considerably. From STEM EDS measurements of the cycled samples, it appears that the Ti layers also migrate to the top of Au contact pads and oxidize there, hence degrading the Ohmic contacts. These results and discussion suggest that Ga2O3 surface modification, redesigning the metal contact stacks to prevent Ti diffusion, or switching to other Ohmic contact options, should be explored in further studies to improve the performance and increase reliability of Ga2O3 Schottky barrier diodes for high-temperature electronic applications.

This work was authored at the National Renewable Energy Laboratory (NREL), operated by Alliance for Sustainable Energy, LLC, for the U.S. Department of Energy (DOE) under Contract No. DE-AC36-08GO28308. Funding provided by the Laboratory Directed Research and Development (LDRD) Program at NREL (device fabrication) by the Office of Energy Efficiency and Renewable Energy (EERE) Advanced Manufacturing Office (device characterization), and by the Technology Commercialization Fund (device cycling). The views expressed in the article do not necessarily represent the views of the DOE or the U.S. Government.

The data that support the findings of this study are available from the corresponding author upon reasonable request.

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See supplementary material at https://www.scitation.org/doi/suppl/10.1116/6.0001003 for the temperature calibration versus setpoint temperature, for the J-V curves of the cycle 9 temperature sweep, for color maps of additional diode parameters across cycles and temperatures, and for a comparison between J-V curves at 400 °C for the first cycle and during the hold time.

Supplementary Material