Qubits on solid state devices could potentially provide the rapid control necessary for developing scalable quantum information processors. Materials innovation and design breakthroughs have increased functionality and coherence of qubits substantially over the past two decades. Here, we show by improving interface between InAs as a semiconductor and Al as a superconductor, one can reliably fabricate voltage-controlled Josephson junction field effect transistor (JJ-FET) that can be used as tunable qubits, resonators, and coupler switches. We find that bandgap engineering is crucial in realizing a two-dimensional electron gas near the surface. In addition, we show how the coupling between the semiconductor layer and the superconducting contacts can affect qubit properties. We present the anharmonicity and coupling strengths from one and two-photon absorption in a quantum two level system fabricated with a JJ-FET.
I. BACKGROUND
Recent advancements in materials synthesis and engineering have enabled the design and fabrication of a variety of novel quantum devices including sensors,1,2 low noise amplifiers,3–6 and highly coherent qubits for quantum computation.7,8 In the context of quantum information processors, qubit coherence is crucial in bringing error rates below a threshold at which error correcting algorithms may allow for the realization of a fault tolerant quantum computer.9–11 As it has been demonstrated in superconducting qubits, design and materials advances have improved the lifetimes from nanoseconds to hundreds of microseconds.12–15 Recent experiments16–21 have also demonstrated single- and two-qubit gate operation fidelities exceeding 99%.
In scaling the size and power of current quantum information processors, it is necessary to fabricate a large number of highly coherent qubits on a single chip. However, there will be always a trade-off in coupling qubits for gate operations and isolating qubits well enough from each other when not in use as to preserve their encoded information. This eventually becomes an issue in fixed frequency qubits where closely spaced energy levels prevents fast, high-fidelity control. One approach to mitigate this issue resorts to slower qubit driving at the expense of greater exposure to noise. As operations must be performed on the order of the qubit lifetimes, however, this could not be viable.
A second approach is to work with qubits which can rapidly be tuned in and out of resonance with each other, keeping the system in a relatively noise-resistant configuration without sacrificing operation times. One approach is to use semiconductor based circuit elements in which the density and conductivity in the semiconductor region can be tuned using an applied gate voltage.22,23 This is manifested in the Josephson junction field effect transistor (JJ-FET), a Josephson junction (JJ) in which the insulating weak-link is replaced by a semiconductor region. JJ-FETs rely on the proximity effect, where superconducting Cooper pairs tunnel through the semiconductor region, allowing the supercurrent through the junction to be tuned via a gate voltage applied to the semiconductor region. JJ-FETs have been realized with success in various materials systems, including III-V quantum wells,24–26 graphene,27–29 and nanowires.23,30 Gate voltage tuning of the JJ-FET should effectively carry no current and only sustain a voltage level, meaning there is little to no power loss through this circuit element. Pure gate voltage tunability also means that JJ-FETs can work in the presence of a magnetic field as opposed to superconducting quantum interference devices (SQUIDs). In this work, we present the development of the JJ-FET, starting with epitaxial growth of Al on InAs, and then expanding on their fabrication and use in quantum systems for single photon measurements.
II. EPITAXIAL InAs-Al STRUCTURES
We use molecular beam epitaxy, an ultrahigh vacuum deposition technique for ordered growth of crystalline thin films.31 Recently, it was shown that it is possible to grow epitaxial layers of Al on an InGaAs ternary layer under optimal growth conditions and the appropriate selection of metallic phases in order to suppress the strong tendency for island formation and film agglomeration during growth.32–34 A schematic of the materials structure we study is shown in Fig. 1(a). Since the lattice parameter of the InAs active region is greater than that of the InP substrate (with a lattice mismatch of about 3), the formation of misfit and threading dislocations is unavoidable. To alleviate this, we attempt pseudomorphic growth in which we use a step graded buffer where the composition of the InAlAs buffer layer ranges from to in steps of every 50 nm. This results in a crosshatched surface morphology where dislocations meet, which is confirmed by an atomic force micrograph of the sample shown in Fig. 1(b). In order to deposit Al layer-by-layer, the substrate is cooled to subzero temperatures to promote the growth of Al (111).32 Figure 1(c) shows a cross-sectional high resolution transmission electron microscopy (HR-TEM) image which reveals an atomically flat, epitaxial contact made by the Al layer on the InGaAs top barrier.
(a) Schematic of the Al/InAs structure. (b) Atomic force microscopy image of the aluminum surface shows an average surface roughness of 0.8 nm. (c) High resolution transmission electron microscopy image showing the sharp interface between the Al thin film and the InGaAs top layer. (d) Self-consistent Schrödinger–Poisson calculations for the electron density (red) and conduction band energy (black) of the III/V heterostructure for a Si -doping as a function of the thickness measured from the InGaAs top barrier surface down toward the substrate. The 2D electron density is . The inset (top left) shows the electron density near the Al/InGaAs interface. (e) Magnetotransport measurement of an InAs quantum well with a 10 nm top layer of InGaAs with an electron density of cm and a mobility of cm/Vs. Quantum Hall states at filling factors , 6, and 8 are visible.
(a) Schematic of the Al/InAs structure. (b) Atomic force microscopy image of the aluminum surface shows an average surface roughness of 0.8 nm. (c) High resolution transmission electron microscopy image showing the sharp interface between the Al thin film and the InGaAs top layer. (d) Self-consistent Schrödinger–Poisson calculations for the electron density (red) and conduction band energy (black) of the III/V heterostructure for a Si -doping as a function of the thickness measured from the InGaAs top barrier surface down toward the substrate. The 2D electron density is . The inset (top left) shows the electron density near the Al/InGaAs interface. (e) Magnetotransport measurement of an InAs quantum well with a 10 nm top layer of InGaAs with an electron density of cm and a mobility of cm/Vs. Quantum Hall states at filling factors , 6, and 8 are visible.
A complication involving a layer of InAs at the surface is the negative Schottky barrier and its Fermi level pinning. The resulting charge accumulation at the surface makes design and control of the electron density difficult. By adding gallium to an InGaAs ternary top barrier layer, the Fermi level pinning can be tuned to where it crosses the conduction band near . We use InGaAs which has a small, positive Schottky barrier35 of 0.04 eV. This Schottky barrier is small enough for carriers to be introduced in the quantum well through backside modulation doping 6 nm below the quantum well. In addition, the electron effective mass of InGaAs is , where is the bare mass, and is comparable to the electron effective mass of InAs which is .36 This results in a quantum well structure whose conduction band edge not only supports the confinement of the wavefunction both in the InGaAs and InAs layers but also allows the wavefunction to decay slowly toward the surface, allowing for a sufficiently strong overlap with the superconductor.
We use 1D Poisson,37,38 a calculator which self-consistently solves the Schrödinger and Poisson equations in 1D. The charge density and conduction band edge of the structure described above are shown in Fig. 1(d). The bandgaps for InAs, InGaAs, and InAlAs used in the calculator 0.372, 0.520, and 0.880 eV, respectively. The band offset of InAs relative to InP is 0.670 eV, the band offset of InGaAs relative to InP is 0.550 eV, and the band offset of InAlAs relative to InP is 0.210 eV. The electron effective masses written as proportions of the bare electron mass used for InAs and InGaAs are mentioned in the previous paragraph, and that of InAlAs is 0.070. The thickness is measured from the surface of the InGaAs top barrier down toward the substrate. The Fermi level of the Al layer lies at 0 eV and calculations are conducted for a temperature of 10 K. These calculations assume the Fermi level pinning is fixed by the semiconductor surface. The charge density and conduction band structure are simulated with a sheet charge cm, assuming full ionization of donors.
While the strong coupling between the Al layer and the InAs two-dimensional electron gas (2DEG) is of central importance for JJ-FET fabrication, the electron mobility is inversely affected when the InAs 2DEG is placed close to the surface immediately under the Al layer. The quantum well design should consider these two competing factors. It has been shown that a 10 nm top InGaAs layer yields high mobility while maintaining good coupling to the superconductor, as seen by a nonzero electron density present at the surface, shown in the inset of Fig. 1(d) by the simulated electron density in the top 3 nm of the InGaAs top barrier. The transport properties of the 2DEG in this surface quantum well structure can be characterized in the presence of a perpendicular magnetic field. Figure 1(e) shows longitudinal and Hall data where quantum Hall states are well developed above 5 T. All measurements are performed in a cryogen-free superconducting magnet system at a sample temperature of 1 K. The electron density of cm and electron mobility of 20 900 cm/Vs are achieved with a Si doping of cm delta doping. This is in close agreement with self-consistent calculations shown in Fig. 1(d). The effects of various scattering mechanisms have been studied, and while surface roughness, background, ionized impurity scattering, and alloy scattering all play a role, it is found that surface scattering dominates transport properties.39
III. JOSEPHSON JUNCTION FIELD EFFECT TRANSISTORS
Josephson tunnel junctions are the basic building block of superconducting qubits as they provide the essential nonlinearity (in the form of a nonlinear inductor) that allows the formation of a distinct two level quantum system. Josephson junction properties can be probed by DC or microwave measurements. In this section, we discuss fabrication of the JJ-FET and their DC characteristics.
Starting with the epitaxial InAs-Al wafer, we can fabricate JJ-FETs using top-down electron beam (E-beam) lithographic patterning. The fabrication steps involve chemical wet etches of Transene type D and a III-V etchant which target the Al and III-V layers, respectively. The III-V etchant is a solution of phosphoric acid, hydrogen peroxide, and water solution created at the time of etching in a ratio of 1:1:80, respectively. We define a small gap where aluminum is etched away leaving two Al leads separated by a length nm, leaving the primary electrical path through the 2DEG below. After another round of lithographic patterning, a 50 nm SiO gate dielectric and a 5 nm of titanium and 60 nm of gold are deposited using e-beam deposition. These two layers are then lifted off in 70 C acetone leaving only the metal deposited into the patterned areas and are used as gate electrodes. A schematic of the JJ-FET device is shown in Figs. 2(a)–2(d) detailing the fabrication procedure.
Fabrication procedure: (a) InAs channel near the surface which hosts the 2DEG, contacted epitaxially with Al. (b) Polymethyl methacrylate (PMMA) e-beam resist is spun over the surface, then patterned with e-beam lithography. A thin gap of Al is then selectively wet etched, leaving a thin gap between the Al contacts. The length of the junctions (in this work nm) is defined by the separation of the two Al leads. (c) After another round of lithographic patterning, SiO and Ti/Au are deposited via e-beam deposition for the gate dielectric and the electrode, respectively. (d) Lift-off of the SiO and Ti/Au, leaving the gate stack over the junction gap able to apply a gate voltage .
Fabrication procedure: (a) InAs channel near the surface which hosts the 2DEG, contacted epitaxially with Al. (b) Polymethyl methacrylate (PMMA) e-beam resist is spun over the surface, then patterned with e-beam lithography. A thin gap of Al is then selectively wet etched, leaving a thin gap between the Al contacts. The length of the junctions (in this work nm) is defined by the separation of the two Al leads. (c) After another round of lithographic patterning, SiO and Ti/Au are deposited via e-beam deposition for the gate dielectric and the electrode, respectively. (d) Lift-off of the SiO and Ti/Au, leaving the gate stack over the junction gap able to apply a gate voltage .
There are three significant length scales concerning JJ-FETs: the mean free path in the semiconductor, , the superconducting coherence length, , and the junction length, . The mean free path can be deduced from the 2DEG mobility and electron density. In the case of the sample shown in Fig. 1(e), we find nm. We measure an Al superconducting critical temperature of about K, from which we can estimate the superconducting gap using to be close to 231 V. The superconducting coherence length is given by which yields nm.
For our junctions of length nm, we have , which places our JJ-FETs in the dirty, short ballistic regime.40,41 In this regime, the product of the normal resistance and the supercurrent is theoretically expected to be for a fully transparent interface. Figure 3(b) shows the differential resistance versus DC bias current for several gate voltage values applied to our JJ-FET. The traces in Fig. 3(b) are offset from the bottom in 50 steps to clearly show the zero resistance state. The dashed lines indicate the relative 0 level for each trace. The critical current, , can be identified by the transition of the zero resistance state to a state of finite resistance as marked at a couple example points where it leaves the superconducting state. The selected examples demonstrate the gate voltages showing the diminishing as the gate is driven negative. We find the normal resistance by applying a magnetic field above the critical field or raising the temperature above . The product of the normal resistance and the critical current in this JJ-FET reaches a maximum of . It is smaller than nominally identical devices with ALD deposited oxide,24 being .
(a) False color scanning electron microscope image of a JJ-FET with a junction width of 100 nm. (b) Differential resistance for the 100 nm JJ-FET showing the critical current when the junction switches from zero-voltage to normal state. Shown are line cuts at different gate voltages which are vertically offset in 50 steps. (c) 2D plot of differential resistance vs applied bias current for a 100 nm JJ-FET. The dark blue represents zero resistance. (d) Switching current of the junction shown in red with triangle markers and tied to values on left y axis. Junction inductance for the corresponding switching current shown in blue with circle markers and tied to values on the right y axis. Both quantities shown as a function of gate voltage. Inductance is found as a function of critical current from .
(a) False color scanning electron microscope image of a JJ-FET with a junction width of 100 nm. (b) Differential resistance for the 100 nm JJ-FET showing the critical current when the junction switches from zero-voltage to normal state. Shown are line cuts at different gate voltages which are vertically offset in 50 steps. (c) 2D plot of differential resistance vs applied bias current for a 100 nm JJ-FET. The dark blue represents zero resistance. (d) Switching current of the junction shown in red with triangle markers and tied to values on left y axis. Junction inductance for the corresponding switching current shown in blue with circle markers and tied to values on the right y axis. Both quantities shown as a function of gate voltage. Inductance is found as a function of critical current from .
For comparison, Table I shows critical values of a Josephson junction, namely, the junction length , the critical current , the normal resistance , and the product normalized to the superconducting gap for a variety of nanowire and quantum well devices. While there is a clear advantage in epitaxy, we find in our samples that the SiOx liftoff process can damage the induced gap, represented by the product , as compared to conformal ALD oxide deposition.24 Also included are results from different host materials,42–45 including InAsSb, InSb, HgTe, and carbon nanotubes (CNTs). While for qubit applications, only enters the frequency of the qubit, is an important parameter as it characterizes the strength of the induced gap in the semiconductor and Andreev bound states that govern the supercurrent in the junction.24
Comparison of our work on Josephson junction characterization and other reported characterization.
Identifier . | Materials . | Dimension . | Technique . | L (nm) . | IC (μA) . | RN (Ω) . | IC RN/Δ . |
---|---|---|---|---|---|---|---|
Our work w/ oxide lift-off | InAs/Al | QW | Epitaxy | 100 | 0.9 | 74 | 0.29 |
Our work with ALD oxide24 | InAs/Al | QW | Epitaxy | 100 | 5.00 | 102 | 2.2 |
Delfanazari et al.46 | InAs/Nb | QW | Sputtering | 850 | 2.00 | 800 | 1.45 |
Nitta et al.47 | InAs/Nb | QW | Sputtering | 630 | 52.60 | 2 | 0.10 |
Takayanagi et al.48 | InAs/Nb | QW | Sputtering | 400 | 20.80 | 3 | 0.05 |
Giazotto et al.49 | InAs/Nb | QW | Sputtering | 190 | 11.00 | 15 | 0.12 |
Heida et al.50 | InAs/Nb | QW | Sputtering | 320 | 0.13 | 327 | 0.03 |
InAs/Nb | QW | Sputtering | 470 | 0.24 | 324 | 0.06 | |
InAs/Nb | QW | Sputtering | 630 | 0.05 | 381 | 0.02 | |
InAs/Nb | QW | Sputtering | 780 | 0.10 | 431 | 0.03 | |
Zellekens et al.51 | InAs/Al | NW | Epitaxy | 75 | 0.02 | 3330 | 0.37 |
Perla et al.52 | InAs/Nb | NW | Epitaxy | 55 | 0.08 | 2850 | 0.14 |
Gharavi et al.53 | InAs/Nb | NW | Sputtering | 170 | 0.10 | 3000 | 0.24 |
Mayer et al.42 | InAsSb/Al | QW | Epitaxy | 500 | 1.16 | 230 | 1.27 |
InAsSb/Al | QW | Epitaxy | 1000 | 0.57 | 491 | 1.33 | |
Ke et al.43 | InSb/NbTiN | NW | Sputtering | 700 | 1.90 | 50 | 0.11 |
Wiedenmann et al.44 | HgTe/Nb | QW | Sputtering | 150 | 5.0 | 50 | 0.21 |
Pallecchi et al.45 | CNT/NbPd | NW | Sputtering | 350 | 0.03 | 350 | 0.01 |
Identifier . | Materials . | Dimension . | Technique . | L (nm) . | IC (μA) . | RN (Ω) . | IC RN/Δ . |
---|---|---|---|---|---|---|---|
Our work w/ oxide lift-off | InAs/Al | QW | Epitaxy | 100 | 0.9 | 74 | 0.29 |
Our work with ALD oxide24 | InAs/Al | QW | Epitaxy | 100 | 5.00 | 102 | 2.2 |
Delfanazari et al.46 | InAs/Nb | QW | Sputtering | 850 | 2.00 | 800 | 1.45 |
Nitta et al.47 | InAs/Nb | QW | Sputtering | 630 | 52.60 | 2 | 0.10 |
Takayanagi et al.48 | InAs/Nb | QW | Sputtering | 400 | 20.80 | 3 | 0.05 |
Giazotto et al.49 | InAs/Nb | QW | Sputtering | 190 | 11.00 | 15 | 0.12 |
Heida et al.50 | InAs/Nb | QW | Sputtering | 320 | 0.13 | 327 | 0.03 |
InAs/Nb | QW | Sputtering | 470 | 0.24 | 324 | 0.06 | |
InAs/Nb | QW | Sputtering | 630 | 0.05 | 381 | 0.02 | |
InAs/Nb | QW | Sputtering | 780 | 0.10 | 431 | 0.03 | |
Zellekens et al.51 | InAs/Al | NW | Epitaxy | 75 | 0.02 | 3330 | 0.37 |
Perla et al.52 | InAs/Nb | NW | Epitaxy | 55 | 0.08 | 2850 | 0.14 |
Gharavi et al.53 | InAs/Nb | NW | Sputtering | 170 | 0.10 | 3000 | 0.24 |
Mayer et al.42 | InAsSb/Al | QW | Epitaxy | 500 | 1.16 | 230 | 1.27 |
InAsSb/Al | QW | Epitaxy | 1000 | 0.57 | 491 | 1.33 | |
Ke et al.43 | InSb/NbTiN | NW | Sputtering | 700 | 1.90 | 50 | 0.11 |
Wiedenmann et al.44 | HgTe/Nb | QW | Sputtering | 150 | 5.0 | 50 | 0.21 |
Pallecchi et al.45 | CNT/NbPd | NW | Sputtering | 350 | 0.03 | 350 | 0.01 |
As mentioned, the most noteworthy feature of our JJ-FET is the gate-voltage tunability of the supercurrent. Figure 3(c) shows the differential resistance in color as current bias and gate voltage are changed. The critical current is tuned from to 0 A by sweeping the applied gate voltage, , from to V. This voltage scales with the thickness of dielectric layer. We again note that this tunability does not require any power consumption as there is virtually no leakage current flowing to the gate contact as the gate voltage is varied in this range. The inductance of the junction is dependant on the critical current by . For the each gate voltage, we extract the critical current and then calculate the resulting inductance as shown in Fig. 3(d).
IV. INTERFACE TRANSPARENCY AND ANHARMONICITY IN JJ-FETs
While a highly transparent interface is desired for the JJ-FET to be in the short ballistic regime, high transparency could have an adverse effect on qubit anharmonicity. This effect is detailed in the work of Kringhøj et al.54
The anharmonicity is defined as the difference between the frequency corresponding to a transition from the ground state to the first excited state and the frequency corresponding to a transition from to the second excited state . These frequencies are and , respectively.
In the short junction limit55 for a gatemon qubit in the transmon regime,56 takes the form, when expanded in powers of the phase difference across the junction ,54
neglecting terms fourth order in and larger. The transmission eigenvalues are , where indexes the channel and the charging energy is . For a conventional SIS junction in which we take the limit where , the anharmonicity becomes . For a highly transparent interface with a single channel, the anharmonicity becomes , with being the charging energy. This is significantly reduced as compared to the case with little to no interface transparency, as is common with transmon superconductor-insulator-superconductor junctions.56
We note that while these results show that the transparency must be optimized to maximize the qubit anharmonicity and supercurrent range of the JJ-FET, the optimum value of gate voltage or device geometry (few modes as in nanowires54 or many modes in wide junctions in our current case) requires tuning. The above analysis holds for a ballistic description of the JJ-FET near zero gate voltage while at the operating regime and these simplifying assumptions may not hold due to diffusive transport. Ideally, the device will operate at single ballistic mode or will be many modes in a diffusive regime to achieve the inductance for the desired qubit frequency.
V. ONE TO TWO MICROWAVE PHOTON TRANSITION
There has been great progress in creating a gatemon style qubit by using a transmon qubit with its Josephson junction replaced by a JJ-FET.22 Gatemon qubits first realized on InAs nanowires coated by a layer of epitaxial Al were successfully demonstrated,23,57 showing coherence times up to 5 s. However, nanowire based gatemon qubits present challenges for reproducibility when scaling the system due to the necessity of a bottom up fabrication procedure. Many proposals have since focused on developing a gatemon qubit platform based on 2D semiconductor-superconductor heterostructures.25 The device can then be patterned utilizing widely available lithographic capabilities making this platform more amenable to scaling.
In this work, we design and fabricate a gatemon qubit to study the energy spectrum of our JJ-FET device. A stitched optical micrograph of the device can be seen in Fig. 4(a). The qubit consists of a JJ-FET with an effective capacitance in parallel. The qubit is then read through a capacitively coupled coplanar waveguide (CPW) resonator, which is subsequently coupled to a transmission line, along with a CPW resonator used for the drive line. We fabricate the gatemon qubit first by etching away the InAs-Al heterostructure in all regions except the active region of the junction noted by “Qubit” in Fig. 4(a). We then blanket sputter a layer of Al over the whole device. After this step, we use e-beam lithography to pattern the microwave circuit into the sputtered Al along with the junction gap into both the epitaxial and sputtered Al. We then perform another round of lithographic patterning to define our gate contact and then follow a similar oxide and gate deposition as mentioned previously.
Images of Gatemon device and High Frequency Structure Simulator (HFSS) simulations of coupling distance in the gatemon qubit-Al/InP system. (a) Stitched optical image of a gatemon style qubit showing the qubit, the qubit drive, electrostatic gate, the resonator, and a part of the readout transmission line for probing the resonator. (b) Frequency of the qubit and the readout resonator as a function of the coupling distance between the qubit and the resonator. Red triangle and blue circle markers represent the qubit and readout resonator frequencies, respectively. (c) Anharmonicity expected for the same range of coupling distances. (d) Geometry of the resonator and qubit designs with coupling distance indicated. (e) Corresponding false-colored SEM image of the resonator and qubit with a measured coupling distance m.
Images of Gatemon device and High Frequency Structure Simulator (HFSS) simulations of coupling distance in the gatemon qubit-Al/InP system. (a) Stitched optical image of a gatemon style qubit showing the qubit, the qubit drive, electrostatic gate, the resonator, and a part of the readout transmission line for probing the resonator. (b) Frequency of the qubit and the readout resonator as a function of the coupling distance between the qubit and the resonator. Red triangle and blue circle markers represent the qubit and readout resonator frequencies, respectively. (c) Anharmonicity expected for the same range of coupling distances. (d) Geometry of the resonator and qubit designs with coupling distance indicated. (e) Corresponding false-colored SEM image of the resonator and qubit with a measured coupling distance m.
We use Ansys, a HFSS software used for 3D electromagnetic modeling of the qubit and readout CPW resonator. The design of the CPW resonator and the coupling geometry were generated using PyEPR (Ref. 58) and is shown in Fig. 4(d). A corresponding false-colored scanning electron microscope image is seen in Fig. 4(e) with a coupling distance m. We monitor how varying the coupling distance (and, therefore, the coupling strength ) affects the resonator’s resonant frequency , the qubit ground to first excited state transition frequency (hereafter called the qubit frequency), and the qubit anharmonicity, . These are shown in Figs. 4(b) and 4(c). The resonant frequency of the readout cavity is GHz, shown as blue circles. The qubit frequency is GHz, shown as red triangles. We vary the coupling distance between the qubit and resonator and find a range of qubit anharmonicities from –240 MHz for coupling distances of –70 m. One can see that qubit and resonator frequencies are largely unaffected by varying the coupling distance.
The qubit energy diagram is schematically shown in Fig. 5(a). The gatemon qubit has its potential energy landscape modeled by an anharmonic LC oscillator.56,59 Detailed in Fig. 5(a) are the ground to first excite state transition and the first to second excited state transition, characterized by their energy separations and , respectively. For an anharmonicity , a two photon transition from the ground state to the second excited state via an intermediate virtual state. Each photon participating in this transition have a frequency of .
(a) Schematic of the energy levels in a superconducting qubit, detailing one and two photon excitations. The single photon (left black) illustrates the transition from to with energy . The energy of transition from to with energy is also labeled. The dashed line (blue) illustrates a virtual state utilized by the two right photons (right red) allowing for a two photon transition from to . Each of the photons associated with this event have an energy of . (b) Spectroscopy of phase of microwave transmission measurement on a gatemon sample shows one and two photon absorption at frequencies of and GHz. This implies an anharmonicity of MHz and coupling strength of MHz. (c) Transmission for when the qubit drive is off and the qubit is in (red) and on where the qubit is in (blue), allowing us to extract a value for the dispersive shift .
(a) Schematic of the energy levels in a superconducting qubit, detailing one and two photon excitations. The single photon (left black) illustrates the transition from to with energy . The energy of transition from to with energy is also labeled. The dashed line (blue) illustrates a virtual state utilized by the two right photons (right red) allowing for a two photon transition from to . Each of the photons associated with this event have an energy of . (b) Spectroscopy of phase of microwave transmission measurement on a gatemon sample shows one and two photon absorption at frequencies of and GHz. This implies an anharmonicity of MHz and coupling strength of MHz. (c) Transmission for when the qubit drive is off and the qubit is in (red) and on where the qubit is in (blue), allowing us to extract a value for the dispersive shift .
To analyze the anharmonicity, we probe the effect of the drive power on the readout spectrum. Figure 5(b) shows a sweep of the qubit drive power (drive amplitude) and frequency where color represents the magnitude of the transmission when probed at a fixed frequency of 7.08 GHz and on average about 50 photons. We find the quality factors for the resonance shown in Fig. 5(c) to be for the external quality factor and for the internal quality factor, found through a circle-fitting algorithm applied to the complex transmission signal.60 We note that the low quality factors of the readout resonator can be attributed to limitations from dielectric loss in the InP substrate,25 difficulty in cleaning the InP oxide, and fabrication nonidealities. When the qubit is driven with high power from to , the transition is quite broadened. Similarly, we observe a to transition as a result of a two-photon process54 where the frequency of each photon is . Figure 5(b) shows these absorptions corresponding to frequencies of and GHz. The single photon excitation process is simply the qubit transitioning from to . The two photon excitation is one which goes directly from to . This procedure is one where two photons are absorbed from the drive simultaneously at a frequency which when summed provide the correct amount of energy for this jump. Given the nature of the experiment we are providing a single tone on the drive line and notice as expected that this condition is driven probabilistically at coincidental moments where two photons arrive close enough to be absorbed simultaneously. As power decreases the signal weakens rapidly as there are less and less photons available. The transition takes place by use of a virtual state as diagrammed in Fig. 5(a) as a dashed line slightly below with two photons shown driving the transition. This implies an anharmonicity of MHz. It is known that there is a dispersive shift in the readout resonator frequency whether the qubit is in the or state. Figure 5(c) shows the readout measurement when the qubit drive amplitude is on and off. For this device, we find MHz. Knowing , , and GHz, we can estimate the coupling strength of MHz. These values are comparable with typical transmon circuits56 which suggest that JJ-FETs are a promising candidate for gatemon qubits.
Unlike in nanowire gatemon qubits, the fixed frequency transmon qubits. This suggests that the control can be as fast for Gatemon qubits. In addition, our coupling strength is similar to that of the gatemon fabricated on a 2D platform25 which suggests that the overall nonlinearlity is increased in JJ-FETs based on 2DEGs compared to those on nanowires. However, there are materials considerations including the choice and thickness of the top barrier. In our case, a 10 nm InGaAs was chosen to increase the mobility and the strong coupling to the Al layer. From our studies, it seems a thicker or a higher bandgap like InAlAs would be a better choice in reducing the transparency and the associated supercurrent in the junction.
VI. CONCLUSION
A 2D platform for gate voltage tunable JJ-FET circuit elements offers exciting possibilities for gatemon qubits and other tunable microwave circuits. We leverage advancements in the growth of high mobility InAs quantum wells contacted with Al and design to yield JJ-FETs that demonstrate a wide range of tunability using simply a gate voltage. We also report on the measurement of anharmonicity and coupling strength in a gatemon style qubit fabricated on this InAs-Al heterostructure, noting how these may be affected by design and materials parameters, such as the barrier composition and thickness, junction length, doping density, and coupling distance.
As an SiO or AlO gate dielectric could introduce a higher density of charge traps and interface states,61 it may be more favorable to use monolayer thick h-BN as a gate dielectric, which has low density of charge traps, and low microwave absorption, possibly leading to better device performance while maintaining supercurrent tunability.62
ACKNOWLEDGMENTS
We acknowledge support from US Army Research Office under agreement W911NF1810067. Joseph Yuan acknowledges funding from the ARO/LPS QuaCGR fellowship reference W911NF1810067. This work was performed in part at the Nanofabrication Facility at the Advanced Science Research Center at The Graduate Center of the City University of New York.
DATA AVAILABILITY
The data that support the findings of this study are available from the corresponding author upon reasonable request.