Overview of atomic layer etching in the semiconductor industry

Following the trajectory of Moore's law, the semiconductor industry has transitioned from microelectronics in the 1980s and nanoelectronics in the early 2000s, to today, when we are entering the atomic-scale era. Developing advanced technology for the sub-10 nm technology node presents an unprecedented challenge for chipmakers. These devices will require atomic-scale fidelity, where fidelity refers to the degree of matching to the intent of design engineers in shape and composition. Fidelity is dependent on the process variability brought about by manufacturing trillions of transistors per day. Although process variability has always been a constraint to semiconductor manufacturing, margins shrink with each technology generation, and today variability is one of the biggest barriers to future scaling.^1,2 Within the next 10 years, acceptable feature size variability is expected to be on the order of 3–4 atoms of silicon, including contributions from surface imperfections. Surfaces have become a significant fraction of the device size and can appreciably affect device electronic properties.^3,4 There is significant impact to device performance from variability (including surface contributions), which increases current leakage and battery power loss and ultimately reduces yield due to failed devices.² With etching processes increasingly critical to state-of-the-art semiconductor devices, the tight control of etch variability offered by atomic layer etching (ALE) is necessary.

ALE is a technique that removes thin layers of material using sequential self-limiting reactions and is considered one of the most promising techniques for achieving the low process variability necessary in the atomic-scale era. The basic ALE concept, shown in Fig. 1(a), starts with a modification step to form a reactive layer, followed by a removal step to take off only this modified layer. Using ions allows for the directional etching required to form deep, narrow structures. Although ALE has been reported in literature for over 25 years, one of the main challenges in applying the technique in the semiconductor industry has been providing sufficient productivity to make it suitable for cost-sensitive manufacturing environments.^5,6 As ALE overcomes these hurdles and moves toward widespread adoption,⁷ it builds upon established technology and capability of its counterpart of atomic layer deposition (ALD), widely used in the semiconductor industry for depositing thin, conformal films.^8–11 

To help unify this developing field, this review article examines the fundamental criteria, mechanistic understanding, and future potential of ALE in the semiconductor industry. We explain limitations of traditional etching that motivate the development of ALE solutions. Although this article focuses on plasma etching, the conclusions are largely applicable to other processes, including wet etching. The current understanding of ALE mechanisms will be discussed using the silicon system as the prototypical example, followed by history of ALE on silicon and other materials. Our literature survey focused on ∼100 ALE reports explored since 1988 under a wide variety of terms. As part of this review, we aim to clarify some of the terminology and assumptions and thereby enable more effective collaboration between academia and industry.

The majority of etch processes in the semiconductor industry today require directional removal, as shown in Fig. 2(a), to maintain critical dimension of the mask.^12,13 The most extensively used process is reactive ion etching (RIE), which is a type of (dry) plasma etching involving a partially ionized plasma glow discharge that provides a mixture of reactive and nonreactive ions, electrons, reactive neutrals, passivating species, and photons. Directionality for positively charged ions is provided by accelerating them normal to the wafer surface through a negative voltage bias on the wafer substrate. In this way, energetic ions work in synergy with neutral chemical species from the plasma to remove film from the wafer surface.^14,15 For decades, plasma etching such as RIE has been operated with all reactions occurring continuously and simultaneously for the duration of the process (referred to as “continuous” etching). This can be represented by A + B, where, in RIE, reaction A represents neutral reactions and reaction B represents energetic ions above an etching threshold. Continuous processing is beneficial for fast etch rates, but also presents limitations for on-wafer performance due to process variability coming from chamber mismatch, nonuniformity across the wafer and within die, and surface composition/roughness.

The limitations of continuous and simultaneous processes originate from transport-limited phenomena, highly coupled parameters, and propagation of the damaged etch front. Continuous etching tends to depend strongly on delivery of one or more species (e.g., neutrals or ions) that drives reaction at the etch front, making them transport-limited. Consequently, process variability may be compromised at all length scales as species fluxes inevitably vary due to depletion and gradients in the reaction chamber, along the wafer, within the die, and in the feature.¹⁶ While neutral- or ion-limited regimes can help, they are not always practical and can be a challenge to tune to the appropriate conditions. This difficulty in tuning to optimum process conditions is due to another limitation with continuous processes: the coupling of the transport (or flux) of each species. Generation of ions and neutrals are coupled to the same electron energy distribution.¹⁷ Meanwhile, incoming ions and reactant species progressively “blur” the surface, forming a thick mixed layer characterized by increased roughness, mixed composition of reactant and substrate atoms, dangling bonds, and voids.^18,19 Uninhibited reactivity with continuous bombardment degrades postetch surface quality and can impact device performance.³ While the mixed layer could be reduced with lower ion energy,^18,20 the paradox is that the layer is produced by the same high ion energies needed to perform etching in the first place. Thus, damage and etching remain convoluted when processing is continuous. These issues limit the pattern transfer fidelity that can be achieved.

Over the past 40 years, intense efforts have been focused on improving process variability within these limitations.^12,21 In the 1980s, batch reactors that processed dozens of wafers at the same time switched to single-wafer reactors, which provided consistent reactant delivery to each wafer. In the 1990s, control was enhanced by adding multiple driving frequencies to decouple, at least partially, plasma density from ion bombardment energy.²² An ongoing effort to reduce variability of process parameters such as pressure, temperature, power, and gas flow has facilitated tool matching.²³ In the early 2000s, conditioning chamber walls with in situ wall deposition significantly improved wafer-to-wafer repeatability.²⁴ However, a significant portion of process control still relies on compensation to correct for systematic nonuniformities that are amplified by the coupled transport of ions and neutrals to the wafer surface during continuous processing. Despite widespread usage of balancing competing behaviors, compensation adds cost and complexity to the system, thereby providing a smaller process window. Overall, while process variability in continuous etching has been reduced dramatically over the years,²⁵ it is becoming increasingly difficult and expensive to manage around the fundamental limitations especially as we progress to smaller technology nodes.

While some sources of process variability are controllable, current capability does not achieve all of the necessary requirements for the most advanced structures. With systematic methodology for chamber matching, chamber-to-chamber repeatability of dimensions is achievable to within <0.5 nm.²⁵ Current capability can also achieve critical dimensional uniformity to within <0.5 nm across the wafer¹⁶ although some problems still remain at the outermost 2 mm of the wafer edge. However, within die variability remains an ongoing challenge, as it is not always possible to compensate for different layout pattern densities and aspect ratios.^26,27 Compounding this challenge are complicated topographies, multiple patterning schemes, and aspect ratios larger than 60:1. Surface quality is also an unsolved challenge today in continuous etching due to the thick mixed layer. For example, etch-induced damage from plasma during gate etching has been shown to penetrate >20 nm into the surface and degrade device performance by increasing sheet resistance due to altered doping levels.^28–30 Damage is often estimated by material loss after subsequent wet etching. All of the factor discussed above drives the need for revolutionary etching methods beyond the continuous and simultaneous—such as atomic layer etching.

ALE has been studied for over 25 years, with the semiconductor industry being the main driver of this research. The earliest report traces back to Yoder in 1988 on ALE of diamond for synthetic diamond films.³¹ Yoder also studied ALD and cited reciprocity of the processes as his motivation. Another early contribution in 1989 from Maki and Ehrlich reported “bilayer etching” of GaAs using chlorine chemisorption.³² Figure 3 shows the number of reports published over the past three decades. A first wave of ALE reports started in the 1990s, with focus on directional ALE as an alternative to RIE.³³ Isotropic ALE has also been studied since the early years,³⁴ and compromises about one third of ALE reports. Overall, silicon and GaAs have been the most studied ALE materials, with GaAs predominately in the 1990s when it was the III–V material of focus for replacing silicon. Altogether, ALE has been demonstrated on well over 20 materials including elemental semiconductors, compound semiconductors, insulators, and metals, which are described in Sec. V. Nearly all early references on ALE cite direct connection to ALD, suggesting that the onset of atomic layer etching in the late 1980s originated as a concurrent expansion of work on atomic layer deposition. After a slower pace of publications in the 2000s, there has recently been a resurgence of ALE activity (Fig. 3). Consequently, there is more focused effort to unite the field, as done for ALD over 14 years ago.¹¹ In April 2014, Sematech hosted an inaugural ALE workshop, and the second annual ALE workshop is planned for 2015 in conjunction with the ALD conference in Portland. In addition, ALE has recently become a special topic in conferences and journals, including focus sessions at the 2014 International Symposium on Dry Processing in Japan and at the American Vacuum Society 2014 conference in Baltimore.

Table I shows the variety of names and acronyms found in literature for processes that all meet the ALE criteria as described in this article. We want to clarify some of the terminology and assumptions, since inconsistent naming can be confusing and make literature searches difficult as multiple groups work in different areas of the world unaware of one another. A probable reason for this confusion was that the deposition community was using the acronym ALE for atomic layer epitaxy in the 1990s, when atomic layer etching was first introduced. However, in 2001, the deposition community instead adopted “ALD.”¹¹ For consistency and clarity, we follow the lead from deposition and use the simplest analogous term: “ALE.” This acronym is intended to encompass a majority of work in our field. Another point of confusion has been the meaning of “atomic layer” in ALE. As Puurunen points out for ALD, the term gives the impression that these processes are defined by the amount of material involved in each cycle—an exact monolayer.⁹ However, this assumption does not generally hold true even for ALD. Instead, the benefits come from separated self-limiting reactions rather than the exact amount of material removed, as discussed in Sec. III B. The atomic layer name sticks because it resonates with the intention of controlling dimensions with atomic-scale fidelity. We hope the clarifications here will encourage researchers in related areas to join and contribute to the ALE field.

Atomic layer etching is defined as a film etching technique that uses sequential self-limiting reactions [Figs. 1(a) and 1(b)]. The concept is analogous to ALD [Fig. 1(c)], except that removal occurs in place of a second adsorption step, resulting in layer-by-layer material subtraction instead of addition. The simplest ALE implementation consists of two sequential steps: surface modification (reaction A) and removal (reaction B). Modification forms a thin reactive surface layer with a well-defined thickness that is subsequently more easily removed than the unmodified material. The layer is characterized by a sharp gradient in chemical composition and/or physical structure of the outermost layer of a material. The removal step takes away the modified layer while keeping the underlying substrate intact, thus “resetting” the surface to a pristine or near-pristine state for the next etching cycle. The total amount of material removed is determined by the repeated cycles, for example, three cycles: A → B → A → B → A → B, as shown in Fig. 4. The general ALE concept applies to a wide variety of etching schemes including directional or isotropic, selective or nonselective, and reactants delivered by gases, plasma, wet (liquid) chemistry, or other sources. All schemes share the same defining ALE criteria: (1) separation into a sequence (cycling) of independent unit process reactions, and (2) at least one step is as self-limiting as possible.

Separation of reactions means the composite process runs as a repeated series of two or more independent unit steps, with each step designed to be as simple as possible. In plasma etching, this typically involves each step with distinct chemistry, speciation, and plasma energy composition. The separation is either temporal or spatial, although the time domain is most common using a single chamber with sophisticated process control technology to modulate process parameters such as gas composition, gas flow, pressure, and plasma power. The advantage of separation is that it decouples the generation and transport of ions, electrons, and neutrals, thereby increasing access to desirable species fluxes and their relative ratios, i.e., opens the process window. It has also been suggested that discontinuity avoids the unlimited reactivity that forms the thick mixed layer in continuous plasma etching.^22,45 One of the primary advantages of separation is that it facilitates self-limiting reactions.

Self-limiting reactions refer to those reactions that slow down or stop as a function of time or, equivalently, as a function of species dosage. Figure 5 shows examples of self-limiting behavior, where etching takes place in an initial “burst” followed by a removal rate that approaches zero. The etched amount per cycle is referred to as EPC, analogous to growth per cycle in ALD.⁹ (This term substitutes for etch rate since the amount removed in ALE is not linear in time.) Self-limiting reactions replace transport-limited reactions of continuous processing, and in this way avoids the associated limitations of continuous etching. The importance of self-limiting behavior is explained in Fig. 5. The near-zero slopes in Figs. 5(a)–5(c) show that etching for that cycle is effectively complete. As a result, any geometric loading effects—microscopic or macroscopic—that are prevalent in continuous processing are mitigated because the reactions essentially stop. One way to imagine this is as slow reactions catching up to fast reactions once the etching is complete. In contrast, Fig. 5(d) illustrates continuous etching that lacks any self-limitation, which leads to etching strongly dependent on local species fluxes. Even if the continuous process is slowed, by dilution, for example, it is not equivalent to the self-limiting nature of an ALE cycle. Considering Figs. 5(a) and 5(b), we can also conclude that EPC does not factor as an ALE criteria as long as it is finite. It is important to note that even if the reaction has not stopped, i.e., it is not truly self-limiting [Fig. 5(c)], many benefits of self-limiting behavior can be realized with only minor trade-offs compared to continuous processing. This is why we refer to reactions that are as self-limiting as possible, and operating in this quasi-self-limiting regime can be attractive for economic reasons. For instance, ALE can be made faster and thus more cost-efficient by operating in subsaturation mode, in which reactions have slowed down but not completely stopped, an advantage that has been recognized in ALD as well.⁴⁶ In summary, ALE is fundamentally less subject to process variability induced by transport limitations when compared to continuous etching, a direct consequence of the extent to which the ALE process is self-limiting.

In the design of ALE processes, we have identified three complementary tests to characterize ALE for a particular reactant and substrate combination: synergy test, saturation curve (etched amount versus time for a fixed removal energy), and an energy scan (etched amount as a function of energy for a fixed removal time). Versions of these tests have appeared in ALE studies,^39,47,48 although not necessarily called out or in context to one another. These tests can help indicate to what degree the ALE process approaches ideal behavior, albeit nonideal conditions may still yield significant benefit. In addition to these tests, ultimately, ALE will be characterized by the benefits on the wafer: features with atomically smooth and flat surfaces,^6,49,50 reproducibility of stoichiometry,^50–54 uniformity across the wafer,⁶ etching without loading (pattern-density independence),⁵⁵ low-damage to remaining material,^{28,50,56–58} and etch selectivity to other materials.^{44,57,59–61}

The first test is the synergy test, which measures the amount of material etched per cycle (typically averaged over many cycles) compared to the amount from each individual step. Ideally, there is no etching during the modification step (i.e., reaction A). Similarly, there should be no etching beyond the surface modified layer in reaction B. In practice, each step may result in removal of some material but the conditions should be chosen such that this etching is small compared to that achieved by combining the steps into an ALE cycle. We will discuss how to minimize nonideal behavior further when we consider the case example of silicon ALE in Sec. IV. The second test is the saturation curve, and its importance was discussed in Sec. III B and shown in Fig. 5. They are used to determine the degree of self-limiting behavior for the chosen conditions.

The third test is less frequently used and so is discussed here in more detail. The energy scan is illustrated in Fig. 6 for the removal step, plotting EPC as a function of energy. The energy can generally be from thermal, ion, or other sources. The scan is divided into three regions. Region I represents incomplete etching for low removal energy, while region III represents over-etching for high removal energy (e.g., sputter). Region II represents the “ALE window” with complete removal independent of energy, indicative of self-limiting behavior. The window is analogous to the so-called ALD window where energy is typically denoted by substrate temperature.¹⁰ The window exists because the energy barrier to remove the modified layer has been lowered relative to the unmodified layer. Therefore, the width depends on the specific reactant–target–energy combination, and is a measure of how much the modification step lowers the energy barrier to removal. An additional “selectivity window” can be identified if the window for one material is offset from another. Overall, these tests are valuable in characterizing ALE processes and offering a framework to understanding how different processes depend on the most important parameters in ALE: time and energy.

As the dominant material in the semiconductor industry, silicon has been the principal material in ongoing ALE studies for over 25 years. For illustrative purposes, this section focuses on directional silicon ALE achieved by alternating between chlorination and Ar⁺ bombardment [Fig. 1(b)]. The chlorine reactant is introduced into the chamber to modify the silicon surface (reaction A). We will discuss delivery of the chlorine thermally as Cl₂ gas and also with plasma to increase the reaction rate by dissociating Cl₂ into reactive species. Chlorine-based chemistry is commonly used in ALE for silicon, as well as germanium,⁶² metal oxides,^51,52,63 and III–V materials.^40,64–69 After purging the excess chlorine from the chamber, an Ar plasma provides ion bombardment to activate removal of the silicon chloride reactive layer (reaction B), followed by purging of by-products. Henceforth, silicon chloride will be represented by SiCl_x (where x can be 1, 2, 3, or 4) unless otherwise specified. Although the mechanisms are not entirely understood even in the ALE case study, separation into unit steps allows a much more systematic investigation than possible for continuous etching.

The purpose of the modification step is to form a thin, reactive surface layer with a well-defined thickness that is more easily removed than the unmodified material in the subsequent removal step. This step is not intended to etch, as shown in the flat portions of Fig. 4. In our example here, chlorine modifies the silicon surface by chemisorption. Chlorine gas spontaneously chemisorbs onto a clean silicon surface at room temperature to form a SiCl_x layer: Cl₂ (g) + Si (s) → SiCl_x (s). This reaction is dissociative, as one chlorine atom at a time from the dimer adsorbs onto a silicon dangling bond.⁷⁰ In the simplest two-dimensional model, each silicon surface atom bonds to one chlorine atom. X-ray photoelectron spectroscopy (XPS) data show the SiCl bonding on the surface, with some SiCl₃ groups that may be related to damage generated by the removal step that produces addition silicon reaction sites.⁷¹ The role of chlorine is to weaken the underlying Si–Si bond to make it more easily removable from the pristine silicon lattice. The Si–Cl bonding energy of 4.2 eV is stronger than the pristine Si–Si bond of 3.4 eV.⁷² Park et al. explained that electron transfer by the electronegative Cl weakens the silicon-to-silicon binding energy just underneath the SiCl_x layer.⁷¹ This lowers the threshold energy for removing the SiCl_x layer with respect to the pristine silicon, as the underlying Si–Si bond strength is reduced from 3.4 eV down to an estimated 2.3 eV.⁷³ The concept of enhanced removal by chemical means is also fundamental in continuous plasma etching, where chemical reactants are used to enhance sputter yields.^12,74 The main distinction in ALE is that chemical modification and removal are separate reaction steps.

In addition, understanding the reaction kinetics is important for making the modification step to proceed as fast as possible. Kinetics of chemisorption are similar to those described in ALD and follow the Langmuir adsorption model.³⁹ The reaction rate is limited by surface site availability and any steric hindrance, which is minimal in this case since chlorine atoms are smaller in diameter than silicon atoms. The time it takes for chlorine to saturate is given by the surface coverage $θ ( t ) = ( 1 − e − K ⋅ P ⋅ t )$⁠, where P is chlorine partial pressure and K is the rate constant for adsorption. Thermal chlorination onto silicon was reported to take 8–40 s under typical laboratory conditions.³⁹ Faster chlorination can happen either by increasing substrate temperatures based on the Arrhenius rate law, or by increasing partial pressure of the chlorine gas. But the substrate temperature should be maintained well below 650 °C, the temperature at which chlorine spontaneously etches silicon.⁷⁵ Note that silicon surfaces form a native oxide layer upon exposure to air. Laboratory studies typically remove this layer using a solution of HF diluted in deionized water immediately prior to loading wafers into vacuum.⁴⁸ 

To be productive for manufacturing, adsorption reactions need to proceed at a reasonable rate, with specific requirements depending widely on application. For example, a requirement of etching 1 nm of silicon in only 10 s would translate into about a monolayer (0.14 nm) removed every couple of seconds. Plasma can be used to speed up chlorination by producing highly reactive chlorine radicals and/or energetic species to induce the surface modification.⁵ Adsorption rate constants for reactions in plasma are known to increase by orders of magnitude compared to thermal methods.⁵⁵ In the silicon ALE case study, chlorination time was reported to saturate in less than 1 s.⁷⁶ The use of plasma is also well known in ALD, where plasma-assisted steps replace reactions that might otherwise be difficult or slow using thermal methods.⁷⁷ ALD articles suggest many advantages that include decreased cycle time, more freedom in precursor choice, and lower operating temperature. The productivity of ALE may also benefit as multiple monolayers are removed per cycle due to subsurface chlorination.

The plasma-assisted ALE technique was demonstrated on silicon in 2013 by Lam Research, as reported by several of the authors of this review article, using a commercial transformer coupled plasma (TCP) reactor.^6,55 After HF dip to remove the native oxide, we chlorinated the silicon surface with pure Cl₂ plasma (using conditions with minimal spontaneous etching). The excess chlorine was then purged from the chamber, and the wafer was exposed to an Ar plasma with applied bias of 50 eV to accelerate the ions toward the wafer surface. Self-limiting⁵⁵ removal of the chlorinated layer was observed with EPC of ∼0.7 nm, which corresponds closely to the estimated ∼0.5 nm reactive layer thickness in simulations by Brichon et al.²⁰ In validation of the plasma-assisted ALE concept, the technique produced characteristic ALE benefits as shown in Fig. 7, including atomically smooth silicon surfaces, excellent etch depth uniformity across the wafer (with no compensation), and flat silicon etch front.⁶ 

The chlorinated silicon surface is more complex with exposure to plasma than from using thermal methods. Generally, in processing plasmas, neutral densities typically are several orders of magnitude higher than ion densities. Therefore, surface chemistry is thought to be dominated by interaction of the silicon wafer with chlorine radicals, with some influence from chlorine ions, Cl₂⁺ and Cl⁺, photons, and electrons.⁷⁷ Researchers have performed molecular dynamics simulations to better understand the modified surface.^20,78 Brichon et al. obtained self-limiting SiCl_x layer thickness of ∼0.5 nm by controlling ion energy <10 eV and using a weakly dissociated plasma.²⁰ This reactive layer is significantly thinner than the mixed layer in continuous plasma etching, estimated at 4 nm SiCl_x at 50 eV (Ref. 18) and >20 nm at high ion energy.²⁸ Overall, this highlights the importance of advanced plasma techniques for controlling ion energy distributions arriving at the wafer and plasma species generation pathways for successful plasma-assisted ALE. Plasma-surface interactions are especially complex and further in-depth study would be useful.

In this section, we discuss the mechanistic understanding of Ar⁺ bombardment in the removal step. The purpose of the removal step is to provide energy to break the Si–Si bonds underneath the surface Si–Cl. This energy can be supplied thermally by raising the wafer temperature to above 650 °C for desorption of SiCl₂.⁷⁵ However, this results in an isotropic process since both chlorination and thermal desorption are nominally isotropic [Fig. 2(b)]. Also, high wafer temperatures are detrimental to active devices, so lower processing temperatures are desirable. The advantage of using ions is that they can be accelerated toward the wafer to provide the added benefit of directionality, while maintaining low wafer temperature. Although the ion neutralizes before it reaches the surface, we still refer to the particle as an ion for simplicity.⁷⁹ Also, Ar does not generally remain in the silicon substrate, as most of the Ar recoils or reflects back into vacuum after impact.³⁶ All in all, the primary role of the Ar⁺ is to provide energy to the etch front.

Typically ∼50 eV Ar⁺ are directed toward the wafer surface, as this energy is within the ALE window for this silicon example. Perhaps surprisingly, 50 eV is significantly greater than weakened Si–Si bond energies of 2.3 eV, and greatly exceeds the energy equivalence of 650 °C (∼0.1 eV) used for thermal desorption. The higher energy is required due to the inefficiency in transferring the ion energy to the target bond, as explained by collision theory of ion bombardment, which is applicable to chemically assisted ion etching.^80,81 Ion energy is deposited by the impinging ion into the near-surface region, leading to a collision cascade of silicon atoms. The Si–Si bond is broken and SiCl_x product emitted into the vacuum only when the trajectory of the SiCl_x is upward with sufficient kinetic energy to overcome the surface energy.^81,82 Most of the incident ion energy is dispersed as at least three atoms must collide in order for the SiCl_x product to escape in an upward direction. Thus, ion energy must be significantly higher than bond energy in order for removal to take place. Another consequence of the inefficiency is that even at energies above the removal threshold, the majority of Ar⁺ are not efficient. The ion yield estimate of ∼0.1 suggests that approximately ten ions (50 eV) are needed to emit one SiCl_x by-product in ALE.³⁶ These low ion yields limit the removal step times, which can be very long in laboratory conditions—greater than a minute.^49,83 Fortunately, many commercial etching reactors have relatively high ion flux capability that helps reduce process step times.²² Still, finding ways to further reduce these process times effectively would be a useful area of research for increasing ALE productivity.

There is some discrepancy as to the expected amount of material removed per cycle during the Ar bombardment step. The removal pathway was studied by Athavale and Economou using molecular dynamic simulations on an ideal silicon surface covered with a monolayer of chlorine atoms.³⁶ Their work suggested that with Ar ion-assisted removal at 50 eV, 84% of the silicon is removed as SiCl. This mechanism implies that the ideal EPC is the distance between atomic layers, 0.14 nm for the Si (100) surface.⁴⁹ There are other feasible pathways that have also been proposed. For example, the pathway for thermal desorption in silicon ALE involves surface diffusion and the product is expected to be SiCl₂ based on the reaction Si–SiCl_x(s) → Si (s) + SiCl₂ (g).⁷⁵ In this case, the first-order estimated EPC would be half a monolayer, or 0.07 nm. In fact, in early ALE studies, self-limited half a monolayer EPC was observed in ion-assisted removal of chlorinated silicon surface.^39,88 The reason for the different EPC values in silicon ALE is not entirely understood. However, it serves to show that EPC is not a defining factor in ALE even in relatively ideal circumstances, and that monolayer removal is not a universal expectation. In addition to different pathways, other effects such as steric hindrance and initial surface roughness will also factor into the amount etched per cycle.⁹ 

The removal step can have the effect of resetting the silicon surface after completion of each cycle. This phenomenon differs from continuous etching, in which the surface tends to accumulate roughness and inhomogeneity. Continuous plasma etching simultaneously exposes the surface to energetic Ar⁺, as well as reactive ions such as Cl⁺ and Cl₂⁺ that are similarly energetic as the Ar⁺. Energetic reactant ions damage the silicon as they break Si–Si surface bonds, thus allowing Cl atoms to diffuse and alter the lattice structure.¹² Accumulated surface roughness occurs with the strong Si–Cl bonding that produces a high activation barrier for surface diffusion and prevents flattening of the silicon surface.^82,84,85 In ALE, the difference is that the removal step does not involve reactive chlorine ions because chlorine is not intentionally present. Although energetic Ar⁺ can break Si–Si bonds, at Ar⁺ energy values well below the sputtering threshold, these bonds can reform once the chlorine bonds are removed.¹² This smoothing or resetting effect in silicon ALE is thus attributed to the higher surface atom mobility under Ar⁺ bombardment at suitable ion energies.⁸² 

Over the years, a wide variety of plasma sources have been used for generating the Ar⁺ in ALE. These include electron cyclotron resonance plasma,^{33,39,56,62,86,87} helicon source plasma,^49,88 TCP,⁶ capacitively coupled plasma,^5,60,89 and inductively coupled plasma.⁹⁰ Other types of energetic species have also been evaluated, including ion beams,^40,48 neutral beams,^{35,50–52,68,69,83,91–96} and laser beams.^{32,66,67,97,98} While specialized equipment certainly plays an integral part in basic understanding of ALE, it may be more practical to adapt conventional etching equipment for use in ALE.^5,6

Silicon ALE works best when chlorination produces a well-defined reactive layer and Ar⁺ remove just this layer, no more or less. However, nonideal behavior can occur in subsaturation mode or when secondary reactions are present. Examples of two secondary reactions are discussed in this section: etching during chlorination and pure sputtering during removal. Both phenomena do not saturate in time and so eliminating them is important for self-limited behavior. The synergy test is designed to measure contributions from these two nonsynergistic sources. To clarify, ion-neutral synergy is desirable in ALE, similar to the synergy encountered by Coburn and Winters in their classic 1978 experiments.¹⁵ The difference is that in ALE the ion and neutral reactions are separated and not simultaneous.

The first example of a secondary reaction is “background” etching during the modification step. Chemical etching during chlorination can compromise process results by undercutting the mask or increasing surface roughness.^33,99 Chemical etching is less problematic in thermal chlorination because chlorine molecules do not spontaneously etch silicon. In general, chemical etching can be suppressed by cooling the substrate, based on the Arrhenius equation for temperature dependence of reactions.³³ However, plasma chlorination considerably increases the possibility of background etching due to the presence of radicals, ions, photons, metastables, and low energy electrons, all of which can potentially induce etching.¹³ Photons may play a role, as they are known to induce subthreshold etching as described by Shin et al.¹⁰⁰ Low energy ions should not etch at subthreshold energies (<16 eV), although molecular dynamic simulations by Brichon et al. show a finite silicon etching yield for chlorine ions with kinetic energies as low as 5 eV.²⁰ Even “nonreactive” species in plasma such as He neutrals can deliver substantial (>10 eV) energy through relaxation of Rydberg states.¹⁰¹ Addressing this challenge involves operating in a plasma process regime that minimizes generation of excited states, ions, and photons. Experiments have shown that careful selection of this plasma regime can greatly reduce unintended silicon etching during plasma-assisted adsorption, as well as minimizing chlorination time to only the amount needed for saturation.⁷⁶ 

The second example of a secondary reaction is physical sputtering of pristine silicon in the removal step. This can hinder etching selectivity to an underlayer or mask material, as pure physical sputtering can be indiscriminate. Furthermore, sputtering of mask material onto the etch front can lead to etch stop or micromasking. However, the onset of pristine silicon sputtering may be difficult to avoid, especially if the width of ion energy distribution is not sufficiently narrow relative to the ALE window. Delivering ion energy within a very specific range is thus important, and narrow ion energy and angular distributions are desirable.^5,14 Another proposal has been to replace Ar with other atoms that have lower sputtering yields since Ar is especially efficient at sputtering silicon due to the similar masses. Other bombarding particles such as neon ^50,68,69,96 have been explored as well. More studies are needed to better understand the trade-offs in using different bombarding particles, and in managing any unintentional sputtering.

This section gives an overview of the more than 20 materials used in ALE studies, including elemental semiconductors, compound semiconductors, insulators, and metals. There is still opportunity to study many others, especially in comparison to the 160 systems in ALD.¹¹ In studying materials, the focus has generally been on directional etching, usually by providing bombardment in the removal step. Isotropic ALE has also been studied and contributes to about one third of surveyed ALE reports. A timeline highlighting some of the diversity of ALE reports is shown in Fig. 8. Modeling efforts started in the late 1990s and includes computational techniques such as molecular dynamics, kinetic Monte Carlo simulations, density functional theory, and feature scale simulators.^{5,36,95,99,102–104} Experimentally, a variety of self-limiting mechanisms have been investigated as described throughout this section. Illustrations of different modification mechanisms are shown in Fig. 9, including: chemisorption, deposition, conversion (e.g., oxidation), and extraction. Removal methods include thermal desorption, particle bombardment, and chemical reaction. A number of these ALE systems use plasma assistance in the modification and/or removal step. All the techniques follow the ALE principles outlined earlier.

The earliest silicon ALE study was by Horiike et al. in 1990 using fluorine atoms from CF₄-plasma at wafer temperature of −60 °C, because fluorine atoms require low temperatures to suppress spontaneous reaction during adsorption.³³ Other fluorine sources have included NF₃ (Ref. 86) and fluorocarbons.¹⁰² Fluorocarbons provide the fluorine reactant at room temperature without spontaneously etching, and will be discussed further in Sec. V C. Overall, chlorine has been the reactant of choice in reaction A of silicon ALE,^{6,28,39,49,75,83,88,91} most typically by thermal chemisorption [Fig. 9(a)]. The first to report on chlorine reactant in silicon ALE was Matsuura et al.³⁹ Other experimental studies followed, such as Athavale and Economou reporting removal of one atomic layer of silicon per cycle.⁴⁹ In 1995, isotropic ALE of silicon using thermal desorption was first reported by Imai et al., showing that the chlorinated layer could be removed with heat instead of ions.⁷⁵ The use of neutral beam in the 2000s was applied to silicon ALE with the intention to minimize any charge-related damage.⁹¹ In 2013, Kim et al. used a neutral beam in ALE to remove damaged silicon at the bottom of a 20 nm-node high aspect ratio (HAR) contact.²⁸ Device benefits were indicated, as the resistance of the remaining silicon was similar to the unetched silicon. Most recently, ALE silicon using chlorine plasma was successfully demonstrated by the authors in 2014 on a commercially available reactor (Fig. 7),^6,55 showing that ALE can be adapted to the manufacturing environment. High selectivity was demonstrated for etching silicon directionally and selective to silicon dioxide (SiO₂), achieved by lowering removal ion energies to below 40 eV.⁶¹ Besides fluorine and chlorine, higher halogens such as bromine have only occasionally been studied.¹⁰⁵ (For more information on silicon ALE, see also Sec. IV).

Etching of silicon dioxide (SiO₂) and high dielectric constant oxides is an important part of integrated circuit manufacturing and has been a focus of ALE studies. Studies of high dielectric oxides in the 2000s used the approach of alternating chemisorption [Fig. 9(a)] and ion bombardment, as in the silicon ALE example. Yeom's research group at Sungkyunkwan University has been especially prolific in publishing ALE studies for high k oxides including hafnium oxide (HfO₂),^35,51,106 titanium dioxide (TiO₂),⁵² aluminum oxide (Al₂O₃),^54,95 and beryllium oxide (BeO).⁵³ In adapting the silicon ALE example, Cl₂ was substituted with BCl₃ gas because B–O bonding of 8.39 eV is much stronger than Cl–O bonding of 2.82 eV, which is too weak to form the reactive layer with oxygen in metal oxides.⁵² Oxides provide an opportunity to study stoichiometry, and a number of studies have confirmed that surface stoichiometry is maintained during ALE. XPS measurements showed that in HfO₂ ALE the atomic percentage of Hf and O remains relatively constant, especially compared to the hafnium-rich surfaces obtained after continuous RIE.⁵¹ This result was found in the other oxide cases as well, and highlights the benefit of ALE in maintaining stoichiometry and providing smooth surfaces during directional etching. This is in contrast to continuous etching of compound materials, which has high tendency to alter stoichiometry as one element is favorably removed relative to another.^4,51–53

For ALE of SiO₂, a fluorocarbon deposition approach was developed that provides both fluorine and carbon reactants in the modification step, as represented in Fig. 9(b). The process is directional due to ion bombardment in the removal step. In this instance, simulations came before relevant experimental data, as deposition-based ALE was first proposed in the 2000s based on the ability of fluorocarbons to form thin reactive layers using low energy CFx ions and radicals from plasma.^5,102 This deposition-based ALE concept was experimentally verified by Metzler et al. in 2013 using a ∼0.1–0.7 nm thick fluorocarbon film.⁹⁰ Their work was heralded as a milestone¹⁰⁷ as it demonstrated that SiO₂, the most widely used dielectric material in the semiconductor industry, can be atomically removed using ALE. Recently, Hudson et al. further verified that this process has benefits for etching SiO₂ selective to Si₃N₄.⁶⁰ This is possible because the presence of carbon facilitates oxygen removal but hinders etching of silicon and Si₃N₄. The selectivity obtained is important for critical applications such as self-aligned contact etching, which requires etching narrow (<15 nm) oxide spaces more than 100 nm deep without removing the nitride spacer surrounding the gate.⁶⁰ To clarify a possible confusion regarding deposition-based ALE, it is indeed similar to a Bosch process in that both alternate between deposition and etching steps.¹⁰⁸ However, the Bosch process is usually optimized to protect the feature sidewall and to remove much more than just the reactive layer in each cycle.

A third type of oxide ALE was reported in 1994 for removal of SiO₂ in which the film surface is consumed to form a silicate salt product followed by sublimation of the salt at elevated temperatures (>100 °C).¹⁰⁹ The process has been referred to as “atomic layer removal”⁴⁴ and is nominally isotropic. The salt is formed when F and N atoms (e.g., NF₃ downstream plasma) react with SiO₂ at room temperature to consume the top of the film to form a ∼5–10 nm reactive layer, as represented by Fig. 9(c). The salt formation is substantially self-limiting because it acts as a diffusion barrier to further reaction at the SiO₂ interface. An advantage of this mechanism is high selectivity, made possible when F and N reactants do not readily form salts with other materials, such as Si₃N₄ or silicon. This process was originally conceived as a continuous etching process, with the salt formation simultaneous with heating.¹¹⁰ The difference in ALE is that the salt formation and heating are separated self-limiting reaction steps.

Compound III–V materials are high electron mobility materials that are under consideration as enablers in future devices to replace silicon. These materials include GaAs, and also ternary alloy III–Vs such as arsenides, phosphides, nitrides, and antimonides.¹¹¹ These materials tend to have more complicated surfaces than silicon that require surface stoichiometry nearly identical to that of bulk to keep electronic properties from degrading.^4,111 The benefit of ALE in maintaining stoichiometry and providing smooth surfaces during directional etching is especially attractive for these materials. ALE has been studied on several III–V materials, include GaAs,^{32,38,40,43,47,56,64–67,98,112–116} InGaAs, InP, AlGaAs, InAlAs, and AlGaN.^{34,50,56–58,68,69,97} The majority are on directional ALE using alternating chlorination [Fig. 9(a)] and particle bombardment. For example, Park et al. studied ALE on the gate recess process in InP high electron mobility transistor. The stoichiometry of InP remained similar to the original film, indicating no preferential removal of indium or phosphorous, in contrast to continuous etching.^68,69 Similar benefit was found for other III–V materials, including tertiary compounds such as InAlAs.⁵⁰ Researchers have concluded minimal damage in directional ALE of III–Vs based also on electrical characteristics similar to the unetched surface.^50,56–58

About a quarter of the studies on III-V materials involved isotropic ALE,^34,114–116 originally referred to as “digital etching” and dating back to the 1990s. The reactive layer is formed by oxidizing the substrate consuming the topmost surface (reaction A), as represented in Fig. 9(c). This is followed by removal of the oxidized layer by submerging the wafer into a wet acid bath (e.g., HCl solution) (reaction B). A wide variety of oxidizing methods have been used. The earliest reference is by Djamdji and Blunt on InGaAs with self-regulating anodic oxidation in an electrochemical solution.³⁴ A few years later, DeSalvo et al. reported an entirely wet ALE approach for GaAs and other III–V semiconductor materials using wet solution oxidation (e.g., H₂O₂).¹¹⁴ Alternative oxidation methods have included dry delivery, such as atomic oxygen from plasma⁵⁷ and ambient air.^114,116 The oxidation is self-limiting by diffusion kinetics that saturate to a certain thickness, following a logarithmic growth rate that slows sufficiently with time.¹¹⁴ The oxidized layer thickness was reported to be 1.5 nm in GaAs¹¹⁵ and 0.5 nm layer in AlGaN (Ref. 57) at room temperature. The isotropic ALE approach offers an improvement over continuous wet etching, which operates both reactions A + B continuously. By separating the distinct chemical reactions into two steps, the etch amount and variability of the wet etch can be better controlled, and stoichiometry can be maintained.^34,114,115

Metals are used throughout device manufacturing to form gates, interconnects, and electrical connections of the device. New metal materials are potential candidates for emerging memory devices, such as MRAM. Etching metals using continuous etching is often itself challenging, because many metals form nonvolatile etch byproducts that redeposit on sidewalls rendering the device useless. If ALE can address this challenge it will have a big impact on enabling metal integration into devices.¹¹⁷ However, only a few metal ALE reports have been published. In 2000, Kuo and Lee reported a two-step self-limiting process for copper (Cu) by chlorinating the surface, followed by immersion into dilute HCl bath to dissolve the CuCl_x product, which leaves the Cu substrate intact.¹¹⁸ More recently, Hess et al. reported an all-dry ALE approach for Cu by chlorinating with plasma and then using H₂-plasma to remove the CuCl_x layer.^119–121 Although the copper ALE etching has directional components, it has limitations for small feature sizes due to significant profile taper.¹²¹ ALE of germanium (Ge) metalloid was reported using chlorination to form the reactive layer, and then either thermal (i.e., isotropic) removal,⁵⁹ or ion-assisted (i.e., directional) removal.⁶² In isotropic thermal ALE of Ge, selectivity to Si or SiGe was achieved by controlling temperature of removal, since the critical temperature was 260 °C for Ge compared with 650 °C for Si.⁵⁹ 

Graphene and other 2D structure materials are candidates for futuristic post-CMOS technology devices to replace silicon.¹²² Removal of a controlled number of layers has been demonstrated using ALE on graphene and graphene-like materials.^92,93,123 A highly publicized report of graphene ALE appeared in Science magazine in 2011.¹²³ In this report, Dimiev et al. used zinc deposited by sputtering onto the top layer of graphene, as represented in Fig. 9(b). The data indicates that sputtering caused damage to the top layer of carbon atoms and partially embedded it into the zinc lattice. The damaged layer was subsequently removed by an acid treatment that washed away the layer along with zinc.^41,123 Graphene was also studied with directional ALE, using oxygen atoms from plasma to form the reactive layer on the uppermost graphene layer, followed by an Ar neutral beam, removing one monolayer of graphene in each cycle.^92,93 Besides graphene, directional ALE has also been successful on other potential 2D supermaterials, such as transition-metal dichalcogenide semiconductor (MoS₂).⁶³ 

Polymer surfaces were explored with ALE by Vogli et al. on a polystyrene-based polymer, where a modified surface was produced by exposing polymer surface to oxygen gas (O₂) (reaction A).⁸⁹ Oxygen adsorbed to the surface, and the reactive polymer surface was rapidly removed in a self-limiting manner under exposure to a low power Ar plasma (reaction B). The authors noted, as others have too, that the modification step (i.e., oxide adsorption here) is likely facilitated by the modification that occur due to ion bombardment.

Silicon nitride (Si₃N₄) is used for gate spacers and other parts of devices. Two different ALE approaches have been demonstrated for removal of Si₃N₄.^42,87 In this case, chlorine is not a suitable precursor because Si–N bonding is stronger than Cl–N bonds.⁸⁷ Instead, in 1999, Matsuura et al. demonstrated a novel directional ALE approach where reaction A consisted of removing nitrogen on the surface by excited hydrogen gas exposure to form ammonia (NH₃) gas by-product, as represented in Fig. 9(d). In the subsequent reaction B, the remaining outermost silicon atoms were removed by irradiation with low energy ion bombardment, using well-controlled condition that suppresses further removal of any nitrogen. Another approach was demonstrated by Posseme et al. and referred to as “thin layer etching.” The Si₃N₄ was modified by light ion implantation (H₂-plasma) to implant hydrogen into 10–20 nm of the surface. This step was followed by wet etching in aqueous HF solution that removed the modified layer an order of magnitude faster than the nonmodified material. The data in this study suggests that the substantially self-limiting behavior is related to the gradient of hydrogen concentration in the film,⁴² an example of the conversion mechanism shown Fig. 9(c).

While the semiconductor industry has been driving research on ALE, a number of examples were found in related industries. In 1991, an electrochemistry-based ALE process was reported for the compound semiconductor cadmium telluride (CdTe) used in electro-optics.¹²⁴ This approach is an example of the “extraction” category as the oxidation actually removes specific elements in the compound (e.g., Cd in CdTe) in the top material layer. Other compounds such as GaAs could also work with this method. Another example outside the semiconductor industry was reported in 2009 for ALE of gold-based materials (e.g., AuSn) used in light-emitting diodes.¹²⁵ For binary etching of compounds, each element of the component was preferentially extracted in only the topmost layer using separate wet etchants, leaving an atomic layer of the other element to be removed in the subsequent step, as shown in Fig. 9(d).

Pulsing or pulsed operation refers to the modulation of process parameters, which is necessary for achieving separation in atomic layer etching. However, the subject of plasma pulsing in etching has largely been studied independently of ALE, with much of the pulsing literature motivated by the desire to better control plasma parameters. There has been a strong focus on “power” pulsing, where the plasma powers are modulated in time while keeping the pressure and gas composition fixed.¹²⁶ Power pulsing has been studied for many years, with over 50 000 references since 1985 representing up to 15% of plasma etching literature.²² It is widely used in semiconductor industry today due to its ability to enable better uniformity, greater selectivity, and less ion-induced damage.^30,126–131 The productivity advantage of power pulsing is that it does not involve gas exchange and so can be made faster by eliminating overhead time involved in evacuating the chamber between chemically distinct reaction steps.⁵ 

The connection between power pulsing and ALE has been recognized,^{5,7,12,22,126,131,132} as suggested by Agarwal and Kushner.⁵ This is because power pulsing offers effectively partial separation of reactions A and B.^12,126 An example is substrate bias pulsing, which acts to modulate the ion energy of the plasma at rates 0.1–1000 kHz while keeping other parameters fixed. Figure 10 compares modulation of plasma neutrals and ion energy that can occur in continuous etching, bias pulsing, and ALE involving full gas separation. In the bias pulsing, bias pulsing effectively turns etching on and off in rapid succession, since etching only occurs when the ions are above the threshold ion energy. The “off” phase has the opportunity to saturate the surface in reaction A, while etching takes place during the “on” phase. However, one problem with power pulsing is that the etching on phase has reactions A and B simultaneously without gas exchange, and so is not self-limiting or able to “reset” the surface state. Overall, power pulsing can be considered an historical predecessor to ALE, and with proper design achieve some degree of ALE benefits.

While ALE laboratory work has been ongoing for decades, the transition into semiconductor high-volume manufacturing has been slow. A reason is that high-volume manufacturing requires cost-efficiency, and multistep processes like ALE can have low throughputs due to either slow reaction steps or slow switching between steps. To give a sense of process times involved, one of the earliest studies on silicon ALE reported that a single cycle took over 3 h.⁸⁶ More typically, cycle times for silicon ALE in the laboratory have varied from ∼1 min to over 5 min.^6,12 Thus, new manufacturing-focused approaches are being developed to make ALE faster and lower in cost. The approaches include plasma-assisted ALE using existing etching equipment,^5,6,102 application as a final touch-up after continuous etching,⁵ and development of more advanced control systems for faster gas modulation.⁶⁰ In addition, certain applications may tolerate slower cycle times. For example, feature scaling means an increasing opportunity for thin film removal (<10 nm), where throughputs are dominated not by process time but instead by transfer times into and out of the reactor. At the other extreme, applications that require large amount of material removal (>50 nm), such as those for HAR features, may tolerate faster ALE schemes that operate in subsaturation mode or deviate from ideal ALE behavior. Thick film removal steps can often be split into a fast (main) etch step and a slower (over-etch) step, where ALE could be used in the over-etch with little throughput impact. Ultimately, ALE may not be needed in every application: each application will drive its own set of requirements and trade-offs between throughput, cost, and performance.

Looking ahead, atomic layer etching is well-aligned with the needs for formation of devices and interconnects below the 10 nm technology node. As dimensions shrink, properties of surfaces and subsurface layers are becoming increasingly important, especially for alternative materials such as III–V compound semiconductors. This has implications for the ALE roadmap, as novel devices and interconnect schemes drive development of ALE processes for materials other than silicon. While surface quality is usually given the most attention in ALE, other benefits, such as reduced feature loading in high aspect ratio etching applications and higher selectivity, are often just as desirable and warrant further attention. All of this is a great challenge and opportunity for the etch community. A challenge, because much of the future of Moore's law and the semiconductor industry will depend on the progress of this endeavor. An opportunity, because etching may finally, truly shed the stigma of being a “black box.”^133,134

The authors would like to thank Wenbing Yang, Rich Wise, John Holland, Dennis Hausmann, Shelly Miyasato, and Steve Grantham from Lam Research for their contributions.