Contact and metallization problems in GaAs integrated circuits

Despite the rapid maturing of GaAs as an integrated circuit technology, both for digital and analog applications, the rather empirical nature of our contact metallurgy betrays a lack of basic scientific understanding of the metal–semiconductor interface and its electrical properties. Schottky barrier heights to GaAs are considered to be fixed and determined by Fermi level pinning due to surface states. On the scale of the control of barrier height required for integrated circuits (tens of millivolts), this is not the case. We have no accepted model which allows us to predict barrier heights on ideal barriers, much less ones on processed real surfaces. Where film stress is present, such as with refractory silicides used for self‐aligned gate metal gate field‐effect transistors, run‐to‐run variations may amount to hundreds of millivolts. Schottky barrier heights of metal–AlGaAs barriers, used with modulation‐doped field‐effect transistors, are now known, but not to the desired accuracy. Ohmic contacts are required to both n‐ and p‐type material over a large doping range, including contact to the two‐dimensional gas in modulation‐doped devices. The widely used alloyed contact does not appear to be extendable to lower contact resistance, better area uniformity, or processing temperature sensitivity. Some novel alternatives will be discussed, and their potential accessed. The need for minimal contact resistance to p‐doped bases of heterojunction bipolar transistors has focused attention recently on contacts to p‐GaAs. There is a distinct trend toward the use of refractory metal contacts due to the elevated temperatures to which they are subjected during processing which cause severe degradation to the presently used gold‐based metallurgy.