Effects of postdeposition annealing on physical and electrical properties of high-$k$ $Yb2TiO5$ dielectrics

This article describes the structure and electrical properties of a high-$k$ ytterbium titanium oxide (⁠$Yb2TiO5$⁠) gate dielectric deposited on Si(100) substrates through reactive cosputtering. X-ray diffraction, x-ray photoelectron spectroscopy, and atomic force microscopy were used to study the morphological and chemical features of these films as functions of the growth conditions (temperatures ranging from 600 to $800°C$⁠). It is found that the $Yb2TiO5$ dielectrics annealed at $800°C$ exhibited a thinner capacitance equivalent thickness of 1.65 nm, a lower gate leakage current of $38.4nA/cm2$ at a gate voltage of −1 V, a smaller density of interface state of $9.61×10101/cm2eV$⁠, and a relatively lower hysteresis voltage of $∼3mV$ compared to those at other annealing temperatures. These results are attributed to the formation of a rather well-crystallized $Yb2TiO5$ structure, composition, and a smooth surface. This film also shows almost negligible charge trapping under high constant voltage stress.