Virtual integrated processing for integrated circuit manufacturing

As each new generation of semiconductor technology becomes more complex, targeted simulations can lead to significant savings in process development time and cost. These are achieved by providing insights into process interactions and quantifying effects of process knobs on performance. Due to the complexity of physical phenomena involved, each of the process simulators may itself consist of multiple and linked submodules each aimed at different lengths or time scales or different operating regimes. For example, in electroplating (EP) process for back end (BE) interconnect formation, wafer-scale events are often governed by electrostatic fields where current distribution is estimated based on local conductivities. Feature scale $(<1–100μm)$ behavior is often governed by transport-reaction events in shape-changing domains. Availability of accurate simulation tools allows investigations of dependence of a processing step on those preceding it and its effects on subsequent steps. This “virtual processing” provides information useful in investigation of process input requirements, performance limits, scaling, and other integration issues. One example of process interaction modeling is in EP and chemical-mechanical polarization areas where models have been used to explore film planarity for various realistic chip layouts. The BE simulator provides an effective way to explore solutions not readily accessible in experiments due to cost and time constraints. These model components have played key roles in developing advanced process technology, including alternative deposition and planarization processes for the $90nm$ technology and beyond.