Operation of complementary metal-oxide-semiconductor (CMOS) logic gates at low supply voltages down to 100mV and ring oscillators down to 67mV is experimentally investigated. The measured voltage transfer characteristics of CMOS inverters and logic gates are explained using the subthreshold operation of MOS transistors. Robust control of ring oscillators allows for a tuning range of six decades in frequency with excellent sensitivity as low as 75mV per frequency decade at low voltages in the range from 0.2 to 0.5V, when body biasing of the metal-oxide-semiconductor field-effect transistors (MOSFETs) is also used. For the present state-of-the-art CMOS, the simple digital CMOS cells can operate properly at supply voltages down to 0.2V, but to achieve operation at lower voltages, additional circuitry is needed to maintain the matching between p- and n-MOSFETs, and the circuit complexity increases. Nevertheless, the experiments with ring oscillators demonstrated good performance of CMOS circuits down to the physical limit of two to three times the thermal voltage, while logic gates with stacked transistors need a supply of approximately four to six times the thermal voltage.

1.
N. H. E.
Weste
and
K.
Eshraghian
,
Principles of CMOS VLSI Design: A Systems Perspective
, 2nd ed. (
Addison-Wesley
, Reading, MA,
1993
).
2.
F. J.
De La Hidalga
,
M. J.
Deen
, and
E. A.
Gutierrez-D.
,
J. Vac. Sci. Technol. B
16
,
1812
(
1998
).
3.
M. J.
Deen
,
M. H.
Kazemeini
, and
S.
Naseh
,
IEEE Proceedings of the 2003 International Symposium on Circuits and Systems
, Bangkok, Thailand, 25–28 May
2003
(IEEE, New York, 2003), Vol.
1
, p.
I
697
.
4.
M. H.
Kazemeini
,
M. J.
Deen
, and
S.
Naseh
,
IEEE Proceedings of the 2003 International Symposium on Circuits and Systems
, Bangkok, Thailand, 25–28 May
2003
(IEEE, New York, 2003), Vol.
1
, p.
I
701
.
5.
M. J.
Deen
,
M. H.
Kazemeini
, and
S.
Naseh
,
Proceedings of the Fourth IEEE International Caracas Conference on Devices, Circuits and Systems
, Aruba, 17–19 April
2002
(IEEE, New York,
2002
), p.
C033
1
.
6.
A.
Bhavnagarwala
,
S.
Kosonocky
,
M.
Immediato
,
D.
Knebel
, and
A. -M.
Haen
,
2003 Digest of Technical Papers, 2003 Symposium on VLSI Circuits
, Kyoto, Japan, 12–14 June
2003
(IEEE, New York,
2003
), p.
251
.
7.
B.
Calhoun
,
A.
Wang
, and
A.
Chandrakasan
,
IEEE J. Solid-State Circuits
40
,
778
(
2005
).
8.
Z. X.
Yan
,
M. J.
Deen
, and
D. S.
Malhi
,
IEEE Trans. Electron Devices
44
,
118
(
1997
).
9.
K.
Roy
,
S.
Mukhopadhyay
, and
H.
Mahmoodi-Meimand
,
Proc. IEEE
91
,
305
(
2003
).
10.
A.
Alvandpour
,
P.
Larsson-Edefors
, and
C.
Svensson
,
Proceedings of the 1998 International Symposium on Low Power Electronics and Design
, Montery, CA, 10–12 August 1998 (IEEE, New York,
1998
), p.
245
.
11.
Y.
Tsividis
,
Operation and Modeling of the MOS Transistor
, 2nd ed. (
McGraw-Hill
, New York,
1999
).
12.
R. M.
Swanson
and
J. D.
Meindl
,
IEEE J. Solid-State Circuits
7
,
146
(
1972
).
13.
B.
Calhoun
and
A.
Chandrakasan
,
IEEE J. Solid-State Circuits
39
,
1504
(
2004
).
14.
G.
Ono
and
M.
Miyasaki
,
IEEE J. Solid-State Circuits
38
,
830
(
2003
).
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