We have investigated the effects of annealing temperature on the physical and electrical properties of the thin film for high-k gate oxides in a metal-oxide-semiconductor device. The oxidation and subsequent postoxidation annealing at 500 °C of Hf deposited directly on the Si substrate results in the stack layer with excellent electrical properties. For instance, we observe a negligible hysteresis window, an excellent equivalent oxide thickness (1.2 nm), and a low leakage current density at 2 V after compensating the flatband voltage shift). However, the formation of an interfacial layer enhances as annealing temperature increases. Based on current observation, we suggest that annealing temperature must be carefully controlled to obtain the excellent electrical properties of high-k gate oxides.
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July 2004
Papers from the 50th International AVS Symposium and Exhibition
2-7 November 2003
Baltimore, Maryland (USA)
Research Article|
July 20 2004
Effects of annealing temperature on the characteristics of high-k gate oxides Available to Purchase
H. D. Kim;
H. D. Kim
School of Information and Communication Engineering, Sungkyunkwan University, Suwon 440-746, Korea
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Y. Roh;
Y. Roh
School of Information and Communication Engineering, Sungkyunkwan University, Suwon 440-746, Korea
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Y. Lee;
Y. Lee
School of Information and Communication Engineering, Sungkyunkwan University, Suwon 440-746, Korea
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J. E. Lee;
J. E. Lee
School of Information and Communication Engineering, Sungkyunkwan University, Suwon 440-746, Korea
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D. Jung;
D. Jung
Department of Physics, Brain Korea 21 Physics Research Division, and Institute of Basic Science, Sungkyunkwan University, Suwon 440-746, Korea
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N.-E. Lee
N.-E. Lee
School of Metallurgical and Materials Engineering, Sungkyunkwan University, Suwon 440-746, Korea
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H. D. Kim
Y. Roh
Y. Lee
J. E. Lee
D. Jung
N.-E. Lee
School of Information and Communication Engineering, Sungkyunkwan University, Suwon 440-746, Korea
J. Vac. Sci. Technol. A 22, 1347–1350 (2004)
Article history
Received:
October 30 2003
Accepted:
March 22 2004
Citation
H. D. Kim, Y. Roh, Y. Lee, J. E. Lee, D. Jung, N.-E. Lee; Effects of annealing temperature on the characteristics of high-k gate oxides. J. Vac. Sci. Technol. A 1 July 2004; 22 (4): 1347–1350. https://doi.org/10.1116/1.1743119
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