Fowler–Nordheim stressing of polycrystalline Si oxide Si structures: Observation of stress induced defects in the oxide, oxide/Si interface, and in bulk silicon

Deep level transient spectroscopy and capacitance voltage measurements were used to study the Fowler–Nordheim (FN) stress induced defects in $n+$-polycrystalline-Si/90-Å-thick-$SiO2/p-Si$ substrate capacitors. These capacitors were fabricated using a 0.5 μm complementary metal–oxide–silicon process flow. The capacitors were subjected to constant voltage FN stress at temperatures between 300 and 50 K. At all stress temperatures positive charge buildup was observed to take place in the gate oxide, whereas at stress temperatures ⩾150 K a band of hole traps centered at 0.55 eV above the top of the valence band and ∼0.2 eV wide was seen to be induced by the stress. However, FN stress below 150 K was observed to induce two bulk silicon defects 600 to 1000 Å from the $SiO2/Si$ interface. One of these defects is configurationally bistable with electronic states at 0.35 and 0.30 eV below the conduction band edge $Ec.$ The second defect gives rise to an electron trap located at $Ec−0.37$ eV.