Releasing the Fermi‐level pinning of InP by gas phase polysulfide exposure has recently been demonstrated by surface charge spectroscopy [Lau et al., Surf. Sci. 271, 579 (1992)]. The present article reports a study of capacitance–voltage (C–V) measurements on metal–insulator–semiconductor (MIS) diodes fabricated using a process which includes this polysulfide passivation. The effectiveness of this passivation technique in reducing interface trap densities (Dit) was confirmed. The optimized MIS fabrication procedure involved (a) surface cleaning and polysulfide exposure; (b) immediate deposition of silicon nitride by remote plasma chemical vapor deposition (RPCVD); and (c) deposition of aluminum and annealing at 500 °C for 15 min in forming gas. The C–V results gave a Dit of 5×1010 cm−2 eV−1 via the Terman analysis and 5×1011 cm2 eV−1 via the high–low frequency method. The MIS properties were unchanged after a two months air exposure and a one week 110 °C heating in air. It was also found that the replacement of aluminum with Ti/Pt/Au, and of RPCVD with plasma enhanced chemical vapor deposition all led to higher Dit values.
Electrical and chemical stability of Al/SiNx/InP–metal–insulator– semiconductor diodes with gas phase polysulfide exposure on InP
R. W. M. Kwok, W. M. Lau, D. Landheer, S. Ingrey; Electrical and chemical stability of Al/SiNx/InP–metal–insulator– semiconductor diodes with gas phase polysulfide exposure on InP. J. Vac. Sci. Technol. A 1 July 1993; 11 (4): 990–995. https://doi.org/10.1116/1.578581
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