We report calibrated microwave transmission and reflection measurements of a qubit sample holder at millikelvin temperatures. The methodology we present extends our previous work on one-port cryogenic short–open–load (SOL) calibration to a two-port SOLT measurement by implementing an unknown thru (T) standard. We report the resulting calibrated transmission and reflection at millikelvin temperatures through a printed circuit board that is installed into the sample holder. Finally, we consider a cascade of components at the end of a qubit drive line that includes (1) a cryogenic attenuator, (2) a coaxial cable, and (3) a qubit sample holder. Using experimentally determined parameters for return losses for all three components, we calculate the negligible state-preparation error in the frequency band of 5–7 GHz due to control pulse distortions arising from reflection at the coaxial launches. Taken together, our results highlight the utility of calibrated cryogenic scattering parameter measurements for the validation of qubit packaging and the wiring in its immediate vicinity.

Quantum device packaging poses unique technical challenges because of the strong effect of the environment on solid-state qubits. Device packaging affects the circuit coherence and losses because of its sensitivity to sample box modes, chip modes, and lossy metals, which act as relaxation channels for quantum devices.1–3 An outstanding challenge in testing qubit device packaging is that the field generally lacks cryogenically compatible microwave calibration standards for scattering parameter (S-parameter) measurements. Furthermore, there are meter-scale interconnects between the test equipment and sample holder that have temperature-dependent losses.

In this article, we address the problem of in situ cryogenic sample holder characterization using a recently developed technique that transfers the calibration from an electronic calibration kit (Ecal) to databased short–open–load (SOL) mechanical calibration standards that can be installed in a six-way coaxial switch at the base temperature of a dilution refrigerator measurement system.4,5 We demonstrate that it is straightforward to extend the S-parameter calibration method to two-port measurements by adding an unknown thru to realize an SOLT calibration. The device under test (DUT) is a commercially available multi-qubit sample holder that was fitted with a 50 Ω transmission line connecting one pair of its ports. The measurements of the sample holder enable the detection of insertion loss and return loss in the frequency band utilized for circuit quantum electrodynamics experiments, <20 GHz. From the measurement results, we can also bound the single qubit gate errors that would arise due to control pulse distortions from reflection at the input port of the sample holder that are re-reflected from the last attenuator in the drive line.

This work follows a previously demonstrated method of databased short–open–load (SOL) calibration,5 with the improvement that we add an unknown thru (T) at cryogenic temperatures to extend the technique to a full two-port cryogenic databased SOLT calibration. In brief, we test a sample holder that holds a printed circuit board (PCB)-based stripline that is installed at the base temperature stage of a dilution refrigerator measurement system. The system is equipped with a pair of coaxial switches that enable toggling between different calibration standards and samples [see the schematic in Fig. 1(a)]. Two sets of one-port standards (SOL) from Ref. 5 are each mounted on separate switches along with an additional through standard realized using a 12.7 cm coaxial cable (T) to connect the switches. The calibration procedure then involves using the standards on the switches to calibrate each port of the DUT. Therefore, the reference planes (left and right gray vertical lines) of the calibration are established at the SMA connections between the output of each switch and the standards as shown in Fig. 1(b).

FIG. 1.

Schematic of the SOLT cryogenic calibration scheme. In (a), the DUT is a QCage.24 sample holder with a PCB-based co-planar transmission line as shown in Fig. 2(d). To reduce measurement errors without any amplification, the cryostat lines are minimally attenuated consisting of a total of 3 dB fixed attenuation placed at the mixing plate. The relevant connection interfaces and electrical lengths of interconnects inside the dashed area are shown in detail in (b).

FIG. 1.

Schematic of the SOLT cryogenic calibration scheme. In (a), the DUT is a QCage.24 sample holder with a PCB-based co-planar transmission line as shown in Fig. 2(d). To reduce measurement errors without any amplification, the cryostat lines are minimally attenuated consisting of a total of 3 dB fixed attenuation placed at the mixing plate. The relevant connection interfaces and electrical lengths of interconnects inside the dashed area are shown in detail in (b).

Close modal

Following a successful calibration, the vector network analyzer (N5232B PNA-L) is in a calibrated state enabling us to toggle the microwave switches to the position of the DUT and perform the measurement. Specifically, the raw data after the calibration consist of three connected sections that start from the reference planes of Fig. 1(a): (1) a coaxial cable and its connection to the sample holder, (2) an internal PCB-based transmission line within the sample holder, and (3) an output connection and the second coaxial cable that connects to the microwave switch. Figure 1(b) shows each of these three sections as A–B, B–C, and C–D, respectively. In practice, the coaxial cables at the input and output will always be required in experimental realizations to make external connections. Using this measurement scheme, we perform the calibration and subsequent two-port S-parameter measurements at room temperature and repeat the procedure at a temperature of 40 mK. After measurements, the obtained S-parameter data are post-processed using the time domain gating6 procedure described in the  Appendix. The procedure reveals the salient features of the S-parameter data that we report below, i.e., the magnitude of the reflection from the connection at “B,” and the insertion loss of the path length from “A–D.”

The sample holder that we test is a 24-channel microwave cavity package called the QCage.24.7  Figure 2 shows the sample holder, which includes a printed circuit board for transition between the coaxial launches and a microchip sample. The design concept shown in Fig. 2(a) has a sample chip suspended in a micromachined cavity and clamped down by a PCB. The PCB has 24 embedded coplanar transmission lines that connect to a sample via wire bonds as shown in Fig. 2(b). A second copper cavity is placed above the chip, clamping the construction together. This completes the microwave cavity on both sides of the chip, which has been simulated by COMSOL Multiphysics to have basic resonances at 18.8 and 20.0 GHz with homogeneous electric field mode shapes across the chip as shown in Fig. 2(c). This sample holder design thus provides a resonance-free electrical environment for transmission and reflection measurements on microwave devices up to 18 GHz.

FIG. 2.

Sample holder design with (a) sandwich construction for holding a 10 × 10 mm2 sample chip clamped between a copper metal frame and a PCB, (b) PCB bond-pads (24) for connecting on-chip transmission lines (not measured in this article), (c) simulated mode shapes for resonances in lower and upper cavities (18.8 and 20.0 GHz, electric field intensity plotted blue to red), and (d) a PCB layout with buried through-lines used for measurements described below.

FIG. 2.

Sample holder design with (a) sandwich construction for holding a 10 × 10 mm2 sample chip clamped between a copper metal frame and a PCB, (b) PCB bond-pads (24) for connecting on-chip transmission lines (not measured in this article), (c) simulated mode shapes for resonances in lower and upper cavities (18.8 and 20.0 GHz, electric field intensity plotted blue to red), and (d) a PCB layout with buried through-lines used for measurements described below.

Close modal

For the calibration measurements reported in this article, a dummy PCB was introduced to facilitate device independent measurements of the sample holder [see the layout in Fig. 2(d)]. Instead of the chip cavity opening with a suspended chip, the enclosure has continuous through-lines defined in the buried layer of the PCB as shown in Fig. 2(d). This method enables calibration measurements that probe the PCB transmission lines, connectors, and cabling without contributions from the chip interface and device characteristics. Our measurement results do not directly test the simulations of Fig. 2(c) because the stripline geometry of the PCB in Fig. 2(d) shields the signal from the spaces above and below the PCB within the sample enclosure.

We plot the reflection and transmission S-parameter magnitudes for both forward and reverse signal paths in Fig. 3 after post-processing (see the  Appendix).8 We note that the primary reflection of interest in the system is the interface between the coaxial cable and the sample holder because of its potential to distort qubit drive pulses,5 shown in Fig. 3(a). We observe that both S11 and S22 have very similar magnitudes over the frequency range of 10 MHz–20 GHz. Below 10 GHz, all reflection magnitudes are below −20 dB, with a gradual increase of reflection extending to approximately−19 dB at a highest frequency of 19.5 GHz. We also observe reasonably good consistency between the low temperature and room temperature reflection magnitudes from the launch. We attribute this consistency to the good temperature stability of the dielectric materials and the construction of the coaxial interface.

FIG. 3.

Magnitude of the two-port S-parameters for the QCage.24 sample holder at 300 K and 40 mK. A co-planar waveguide on a PCB directly connects the microwave input to the output within the sample holder. (a) Reflection at the input of the sample holder at the coaxial-to-CPW interface. (b) Transmission of the full sample holder assembly including coaxial cables. S12 is identical to S21 and, therefore, not shown. The dashed lines are fits to the empirical insertion loss model (see the text).

FIG. 3.

Magnitude of the two-port S-parameters for the QCage.24 sample holder at 300 K and 40 mK. A co-planar waveguide on a PCB directly connects the microwave input to the output within the sample holder. (a) Reflection at the input of the sample holder at the coaxial-to-CPW interface. (b) Transmission of the full sample holder assembly including coaxial cables. S12 is identical to S21 and, therefore, not shown. The dashed lines are fits to the empirical insertion loss model (see the text).

Close modal

In Fig. 3(b), we plot the magnitude of the corresponding measured S-parameters for forward and reverse transmissions at room temperature and millikelvin temperature. The measurement results of Fig. 3(b) include all losses from the coaxial cables and on-PCB transmission lines within the sample holder through a physical path length of 63.6 cm [cf. Fig. 1(b)]. The transmission in decibels decreases with increasing frequency due to losses along both the PCB co-planar transmission line and the coaxial cables connecting the sample holder to the microwave switches. The conductor losses decrease at 40 mK leading to the observed increase in the transmission magnitude. The transmission data in Fig. 3(b) are in excellent agreement with an empirical model of insertion loss, |S̃21|[dB/m]=k1f+k2f in units of decibels per meter with signal frequency in hertz for frequencies between 10 MHz–10 GHz. The model includes coefficients to describe the functional forms9 of the conductor (k1) and dielectric losses (k2). We fit the coefficients for conductor losses at room temperature and cryogenic temperature as k1 = (−4.203 ± 0.002) × 10−5 and k1 = (−7.83 ± 0.02) × 10−6, respectively. The dielectric loss coefficients for room temperature and cryogenic conditions are k2 = (−8.03 ± 0.02) × 10−11 and k2 = (−1.151 ± 0.003) × 10−10, respectively. Uncertainties are expressed as the standard deviation errors in the fitted coefficients. Above 10 GHz, the transmission data begin to deviate by a small amount (<1 dB) from the model due to the increase in reflection magnitude shown in Fig. 3(a). Nevertheless, we observe no significant dropouts in the transmission of up to 20 GHz, confirming that reflections at the interfaces between the coaxial cables and sample holder are relatively low in agreement with Fig. 3(a).

Finally, we analyze the reflection magnitude data of Fig. 3(a) by considering the sample holder within a qubit drive line assembly.10 We consider the section of components at the end of a qubit drive line that includes (1) a cryogenic attenuator, (2) a coaxial cable, and (3) the qubit sample holder measured in this work. The experimentally determined frequency-dependent reflection magnitudes for elements (1) and (2) were taken from Ref. 5, while the qubit sample holder data were taken from the 40 mK trace (orange) in Fig. 3(a). The key experimental input to our simulation is the frequency-dependent reflection magnitude from the launch that immediately precedes a quantum device within the sample holder.

Our analysis follows the methodology outlined in Ref. 5 for the determination of the qubit state preparation error due to partial reflections of control pulses from impedance mismatches along a line. In particular, we simulated amplitude and phase distortions introduced to a typical Gaussian-shaped qubit drive pulse x(t) by representing the transmission line between the mixing chamber flange attenuator and the sample holder as a lossy Fabry–Pérot resonator.11,12 The transmission of such a structure can be represented as
S21n=V2V1+=EtransEinc=jni=1ntii=1n1eγili1riri+1e2γili,tn=1rn,rn=±10RLdB20,
where n would be the number of mismatched elements (or mirrors) in the transmission line and li is the distance between two such neighboring elements. The frequency-dependent reflection ri and transmission ti coefficients for mirrors of the resonator are taken from the measured data on return loss of a cryogenic attenuator in Ref. 5 and the sample holder. For the propagation constant γ, the transmission line parameters chosen for this model correspond to a coaxial cable at cryogenic temperatures,9,
γ=α+jβ=R+jωLG+jωC,Rs=ωμ02σ,R=Rs2π1a+1b,L=μμ02πlnba,G=2πωεlnba,C=2πεlnba.
The values of surface conductivity Rs, complex permittivity ɛ = ɛ′ + ɛ″, core a, and outer conductor b radii were chosen based on datasheet data for a similar coaxial cable. The transmission can be transformed to the time domain in the form of an impulse response function h(τ), which can be convoluted with a drive signal y(t) to obtain a signal containing distortions introduced by the transmission line,
yt=hτxtτdτ=xht,ht=12πS21ωdω.
By calculating an inverse impulse response function to the one shown above one could potentially use it to predistort the input signal in order to correct for the distortions introduced by a real input line system.13 
Within the simulation, as a form of benchmarking, we apply all possible combinations of X and Y gates, also known as the ALLXY experiment14 in benchmarking of physical qubit systems. By performing such a benchmarking sequence in a QuTiP model15–17 of a resonantly driven two-level system, we were able to estimate the deviation in qubit gate fidelity introduced by signal distortions due to the reflections of the signal simulated as mentioned above. In this model, the state of the qubit evolves in time according to the following Hamiltonian:
Ht=12ωq1+σz+σxAxcosωqt+ϕ,
(1)
where ωq is the qubit transition frequency, Ax and ϕ are the amplitude and the phase of the drive signal, and σx and σz are the Pauli matrices. In order to isolate the effects of drive pulse distortion on the qubit state time evolution, the system is considered to be closed.

The results of such a simulation for the commonly used frequency band of 5–7 GHz are shown in Fig. 4. For this simulation, the coaxial cable was chosen to be 300 mm as is the default option on the commercially available sample holder. Since the simulated fidelity deviation observed does not exceed 10−7, we can confirm that the sample holder can be used for the high fidelity qubit operation from the perspective of microwave signal integrity.

FIG. 4.

Frequency-dependent fidelity deviation for the last attenuator and coaxial cable terminating at the sample holder under test.

FIG. 4.

Frequency-dependent fidelity deviation for the last attenuator and coaxial cable terminating at the sample holder under test.

Close modal

We compare the results based on experimental data (blue trace) to an exaggerated poor performance, where each of the components in the cascade has a return loss of only 15 dB (orange trace). The result is that the gate fidelity deviation increases by at least four orders of magnitude across the frequency band considered for this set of parameters.

In conclusion, in this article, we presented calibrated measurements of the magnitudes of the two-port S-parameters for a superconducting qubit sample holder at 40 mK temperature. We observe that the return loss at the sample holder launch will not limit the fidelity of single qubit gates based on our master equation simulation. The stable construction of the coaxial–sample holder launch enabled only a small change in return loss even when cooling from 300 K to 40 mK. The general SOLT measurement and analysis method will be applicable to a variety of microwave cryoelectronic wiring cascades that operate at temperatures obtainable with dilution refrigerators. In the near future, we will investigate transmission lines inside the sample enclosure that have less electromagnetic shielding with the aim of validating the box mode simulations of the sample holder. This experiment can be performed by replacing the PCB of Fig. 2(d) with a wire-bonded die as in Fig. 2(b). Additionally, now that we have demonstrated a two-port transmission measurement, crosstalk measurements between adjacent non-connected channels on the sample holder are feasible, which will enable us to probe the limits of wiring density in the vicinity of a quantum device. Looking forward, augmenting simulations of quantum dynamics with experimentally determined input parameters will improve the accuracy of specifications for quantum computer wiring requirements.

The authors disclose the following financial interest in commercial entities dealing with the subject matter of the manuscript. S.S, V.M., and R.L. are employed by Bluefors Oy (vendor of dilution refrigerator measurement systems described in the article). M.S. and S.A. are employed by Quantum Machines (vendor of qubit sample holders described in the article).

S. Simbierowicz: Conceptualization (equal); Data curation (equal); Investigation (equal); Methodology (equal); Validation (equal); Writing – original draft (equal). V. Y. Monarkha: Conceptualization (equal); Investigation (equal); Methodology (equal); Software (equal); Writing – original draft (equal). M. von Soosten: Investigation (equal); Methodology (equal); Resources (equal); Visualization (equal); Writing – original draft (equal). S. Andresen: Investigation (equal); Methodology (equal); Resources (equal); Visualization (equal); Writing – original draft (equal). R. E. Lake: Conceptualization (equal); Investigation (equal); Methodology (equal); Writing – original draft (equal).

The data that support the findings of this study are openly available in Zenodo, at https://doi.org/10.5281/zenodo.7593904.

The S-parameter data of Fig. 3 have been obtained from the cryo-calibrated data with time domain post-processing. Before gating, we analyze the electrical lengths for the system (S11 and S22) in the time domain shown in Fig. 5. From the reflection data in Fig. 5(a), we observe that the peak at a back-and-forth travel time of 2.3 ns corresponds to the reflection at the coaxial-to-CPW interface, i.e., “B” of Fig. 1(b). The coaxial cables (047 flexible) were separately measured to be about 1.2 ns long corresponding to their physical length of 30 cm. Therefore, we have applied a relatively wide bandpass gate of 4.0 ns centered on the launch [“B” of Fig. 1(b)] and, additionally, a narrow bandstop gate of 0.6 ns at the launch on the output of the sample holder [“C” of Fig. 1(b)] to remove its effect. The same procedure was performed both for forward and reverse signal paths, plotted as S11 and S22 in the figure to probe both cable–sample holder interfaces. Moving on to transmission data in (b), we see that the position of the largest peak at 2.6 ns corresponds to a first pass through the DUT at interface “D” of Fig. 1(b). Additional peaks occur due to imperfect matching at the switch and are, therefore, eliminated by focusing a relatively wide bandpass gate of 4.0 ns at the largest peak. The three different markers with horizontal bars in Fig. 5 indicate the positions, spans, and types of gates applied in the time domain. The black markers and bars correspond to bandpass gates, while the red marker and bar correspond to a bandstop gate. Table I summarizes these gating parameters.

FIG. 5.

S-parameters in the time domain before gating. Reflections are shown in (a) and transmission in (b). In both panels, the black markers with bars indicate bandpass gates, and the red markers with bars indicate bandstop gates.

FIG. 5.

S-parameters in the time domain before gating. Reflections are shown in (a) and transmission in (b). In both panels, the black markers with bars indicate bandpass gates, and the red markers with bars indicate bandstop gates.

Close modal
TABLE I.

Summary of time domain gating parameters. The gate center position is indicated with respect to the reference plane at t = 0. The bandpass gates utilize Kaiser windowing with a β-value of 6.

ResultsGate 1Gate 2Center positions (ns)Gate spans (ns)
Figure 3(a)  Bandpass Bandstop 2.3, 2.94 4.0, 0.6 
Figure 3(b)  Bandpass ⋯ 2.6 4.0 
ResultsGate 1Gate 2Center positions (ns)Gate spans (ns)
Figure 3(a)  Bandpass Bandstop 2.3, 2.94 4.0, 0.6 
Figure 3(b)  Bandpass ⋯ 2.6 4.0 
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