A versatile LabVIEW and field-programmable gate array-based scanning probe microscope for in operando electronic device characterization

Scanning probe imaging is a versatile tool for studying, with high spatial resolution, many interesting physical phenomena (magnetism, surface roughness, conductivity, etc.). The toolkit of scanning probe techniques has been expanded by the use of a scanned proximal probe for imaging and local perturbation in conjunction with simultaneous electrical transport measurements. For example, quantized conductance and universal conductance fluctuations have been mapped by scanning gate imaging,^1,2 Kelvin probe microscopy has been used to characterize charge traps in AlGaN/GaN HEMTs,³ and a Hall cross was used to quantify and map the magnetic field of a magnetic force microscopy (MFM) cantilever.⁴ One goal of this article is to provide a guide to the fundamental steps necessary to reproduce a scanning probe microscope (SPM) with such capabilities. Commercially available SPM systems facilitate simple and quick sample analysis, providing high resolution and scan rates, but are typically focused on measurements of passive sample properties (for example, topography). In order to expand these capabilities to monitor active devices, the measurement sequence must interface with external hardware and allow end-user modification for flexible measurement protocols. Synchronization of imaging and acquisition of transport data is of particular importance. In addition to electrical connectivity for devices, some varieties of transport measurements also require specific environments and functionalities, such as magnetic field application, vacuum, and cryogenic compatibility. Here, we describe an integrated, low cost, custom-built system that combines all of these capabilities in an instrument that provides both conventional scanning probe force microscopy and mapping of electrical transport properties as a function of probe position.

The primary challenges for in operando SPM are the precise positioning of the scanned probe relative to the device, connecting and managing electrical connections to a sample, and flexibility and precision for combining and synchronizing transport and scanning probe measurements and manipulations. To further complicate matters, these tasks may need to be accomplished within the constraints imposed by magnetic field application (the confined space of an electromagnet), in vacuum, and at cryogenic temperatures. Proper cantilever-sample positioning requires: accurately locating and positioning the active area of the device, whose size is often small relative to the total substrate area, determining and controlling scan height, and minimizing vibrational noise and drift (thermal or magnetic field-influenced). Managing electrical connectivity involves enabling relatively easy and reconfigurable wiring of samples in a geometry that provides cantilever access to the device, electrostatic-discharge protection of sensitive devices, and minimization of electrical crosstalk and noise. To permit flexibility of the measurement protocol, an open hardware/software architecture that can be easily modified by the user is necessary. In this article, we present our solutions to these challenges.

A broadly useful system will allow the operator easy access and flexibility with regards to both hardware connections and software processing. This was the primary factor in our selection of the field-programmable gate array (FPGA) and LabVIEW-based microscope control solution. The FPGA provides user-defined reprogrammable processing, while ensuring the fast, deterministic control necessary for scanned probes. Our system relies on open interfaces—industry standard BNC connections and GPIB communications—which allow easy expansion and flexible combination with standard measurement equipment. In operando imaging could use a variety of inputs as the imaging parameter: cantilever frequency or amplitude, device conductance, Hall voltage, cantilever tip bias (as in Kelvin probe microscopy⁵), and others. Our hardware/software framework makes it easy to add imaging parameters due to its reprogrammability and LabVIEW's extensive library of third-party device drivers. For example, incorporation of dedicated current and voltage sources and meters is straightforward with GPIB communication. The microscope user can then select the most useful imaging parameter or collect multiple parameters simultaneously.

The accessibility and edit-ability of the software, written in the widely used LabVIEW programming language, offers the user precise control of measurement sequencing. Scanning probe operations can be synchronized with transport measurements, scan parameters (e.g., tip bias or scan height) can be tuned in response to transport, and actions or procedures can be easily added to the measurement protocol. This is a shift of focus relative to commercial SPM solutions, which are typically optimized for ease-of-use and provide less software and hardware re-configurability for customized measurement protocols.

Finally, while home-built SPM controllers often require several custom analog circuits (proportional-integral-differential (PID) controllers, cantilever phase/frequency detection circuitry), our FPGA/LabVIEW architecture is a complete microscope control solution, requiring no additional home-built circuitry. This also permits much more versatility than hardwired circuits, which may require rebuilding if different measurement parameters are required (for example, interchanging cantilevers with different resonant frequencies). This combination of features and processing tools ensures the flexibility and performance to implement and execute a large variety of measurements.

Figure 1 shows various levels of detail of the microscope design. The probe head incorporates a cantilever mounted 10° from horizontal, fiber interferometric detector for cantilever position sensing, and sample mount with electrical contacts. The sample mount sits atop the scanning hardware—a piezo tube for fine scanning and attocube⁶ micro-positioners for coarse motion. The entire scan head is mounted on and enclosed by gold-plated, oxygen-free high thermal conductivity copper (to enable cryogenic operation; the gold prevents oxidation of the copper surface). The compact design, in conjunction with a pneumatic vibration-isolation table on which the SPM sits, minimizes mechanical vibration between the tip and sample (characterized to be 5 nm rms). The small size of the probe also allows its placement in a standard electromagnet (maximum pole spacing = 3 in.). The electromagnet sits on a goniometer to enable field application in any direction in the plane of the sample. The magnetic field strength was calibrated with a Lake Shore Cryotronics Hall probe.⁷ All components of the SPM are made of non-magnetic materials for operation in an external magnetic field (see Fig. 10(b)).

The system is operated in vacuum to reduce damping of the oscillating cantilever, provide a clean environment (especially for surface-sensitive graphene samples), and slow the oxidation of ferromagnetic contacts. However, the space constraints imposed by the electromagnet and vacuum can make cantilever-sample alignment more challenging. We therefore use a vacuum can with an optical window. An example of the area viewable through this window is shown in Fig. 1(c). Using a CMOS camera mounted on a Nikon long-working distance optical microscope (SMZ1500), we are able to focus on and monitor the cantilever position relative to the sample during coarse positioning tasks. It is critical to achieve good initial coarse alignment to a device. Acquiring and piecing together many fine scan atomic force microscopy (AFM) images in order to locate a device can be very time consuming, especially if the initial scans do not contain obvious device features.

Central to the microscope operation is a National Instruments⁸ PXI-7851R FPGA and data acquisition card (DAQ). At its front end, this card is responsible for all analog-to-digital (A/D) conversions of the various input signals and digital-to-analog (D/A) conversions of output control signals (see Table I). The A/D inputs and D/A outputs (8 of each, ±10 V range) are digitized with 16-bit resolution, providing 305 μV precision. The inputs are sampled at 750 kHz; outputs at 1 MHz. In addition to voltage I/O, the FPGA provides high speed signal processing, with a primary clock rate of 40 MHz.

There are several approaches for achieving real-time control of SPM systems.^9,10 Our choice of FPGA permits reprogrammability using the familiar LabVIEW programming language. Unlike a CPU, the logic executed by a FPGA is not determined on-the-fly by software. Instead, the desired code is downloaded to the chip, internally rewiring it in order to construct a hardware implementation of the specific logic. This enables the code to execute deterministically and reliably, with no added latency due to variable resource demand (as in software processes executed by a PC CPU). Furthermore, multiple processes can be executed truly in parallel by the FPGA: each process has dedicated circuitry associated with it, and so adjacent processes have no bearing on one another's execution. The FPGA card is housed in a PXIe-1073 chassis, which communicates via a high speed bridge (MXI data link, 250 MB/s) to the host PC's PCI bus. The PXI system was chosen to allow system expandability, as it has slots for four additional DAQ or bus interface cards. Furthermore, a dedicated chassis for DAQ cards provides cleaner power and reduces electromagnetic noise as compared to a PCI solution housed in the host PC. To access the voltage I/O of the FPGA, the card connects to a SCB-68 screw terminal connector block via a shielded 68-pin SCSI cable. We installed the terminal block into a custom breakout box which connects the screw terminals to BNC-style panel-mount connectors, enabling easier connectivity. Table I describes all of the FPGA inputs and outputs.

For coarse positioning, we use attocube piezo stepper stages ANPx101 (for x and y motion) and ANPz101, each with 5 mm of travel. An attocube ANC-150 controller produces the voltage pulses to move the stages. The piezo tube which we use for fine scanning (EBL #4, length = 1 in., diameter = 0.25 in., wall thickness = 0.02 in.) has a lateral range of 30 μm and a vertical range of ∼3 μm at room temperature, given the ±500 V range of our high voltage amplifiers (Trek¹¹ 601C). The FPGA card outputs control voltages of ±10 V for each of the 5 electrodes of the piezo tube (±x, ±y, z). The parallelism of the FPGA enables simultaneous control of all piezo tube axes, and the step size resolution (given the 16-bit digital resolution of the D/A) is 0.4 nm in x, y and 0.05 nm in z. Each of the 5 channels is amplified by a high voltage amplifier (gain = 50) in order to bias the piezo tube appropriately. Note that a simple op-amp inverter circuit (unity gain) could be used to generate the control voltages for the −x and −y quadrants of the piezo tube if additional FPGA analog outputs are required.

We use a fiber-optic interferometer¹³ to measure the cantilever displacement as a function of time. Such a system has several implementation advantages for low temperature operation (not demonstrated here) and for use in a confined vacuum space. However, any system that measures the cantilever position versus time could be substituted for the interferometry system (four-quadrant position-sensing detector, piezoresistive cantilever, etc.), so long as a voltage signal (representing cantilever position) can be provided to the frequency detection software via the DAQ.

The interferometer photoreceiver voltage is fed to the A/D input of the FPGA, which digitizes at a maximum rate of 750 kHz. We know by the Nyquist-Shannon theorem¹⁴ that the maximum detectable cantilever frequency should therefore be 375 kHz. In practice, sampling ∼10 times faster than the cantilever frequency of ∼75 kHz is preferred to achieve our desired frequency measurement precision. Additionally, because the input range of the A/D is fixed, it is useful to adjust the amplitude of the cantilever photodiode signal (using a pre-amplifier, e.g., Stanford Research¹⁵ SR560) to maximize use of the ±10 V range.

While collecting cantilever position data, the FPGA simultaneously provides a periodic voltage to excite the cantilever at its self-determined resonance (see Sec. II B 1). This voltage (∼200 mV) is applied to a piezo disc (EBL #4; 0.25 in. diameter, 0.08 in. thick) which is mechanically coupled to the cantilever. Figure 2 shows the various electrical connections for cantilever self-excitation and sample scanning.

The accessibility of the microscope signal inputs and outputs (photodiode signal, self-excitation drive signal, etc.) affords straightforward interfacing with external hardware. For example, the user can easily connect the voltage output of the interferometer to a spectrum analyzer and oscilloscope. Alternatively, the LabVIEW environment makes software implementation of such functionality simple.

For electrical measurements of transport devices, we use a Keithley¹⁶ 6221 AC/DC current source and 2425 DC SourceMeter. A Stanford Research SR850 lock-in amplifier provides sensitive lock-in detection. These instruments interface with the PC via GPIB-USB. Depending on the user's preference for stand-alone measurement hardware versus software-based implementation, these instruments could be implemented by appropriate PXI cards and LabVIEW-based software algorithms, such that the entire microscope could be run from a single chassis and host-PC, providing a compact, relatively inexpensive control system. Table I shows that there are several remaining inputs and outputs available which could also be utilized for these purposes.

Transport measurements of a field-effect transistor (FET) device require reconfigurable electrical wiring (choice of source, drain, gate, voltage probes, etc.). To this end, we have developed a compact sample stage which allows 16 electrical contacts be made to a device without obstructing cantilever access (Fig. 1(b)). This design—made from standard printed circuit board (PCB)—provides sample interchangeability without placing much stress on the piezo tube during mounting and dismounting. The shape of the PCB enables maximum scan range without colliding with the scan head support structure. Electrical contact is made to a transport device by wirebonding from the copper traces on the PCB to the device. The layout of the copper traces was chosen to provide ample clearance between the cantilever and device wirebonds. Wires extend from the PCB and are connected to an interconnect held just above the microscope scan head in the vacuum space. This intermediate interconnect is used for ease of exchanging samples and to provide wire management. From this interconnect, wires run to a vacuum feedthrough (Fig. 1(d)). On the outside of the vacuum can, wires connect the vacuum feedthrough pins to a custom BNC-style breakout box containing the 16 connections. This breakout box makes circuit reconfigurability simple, as the desired pins can be connected to electrical sources and meters, as well as the FPGA I/Os. Each pin is controlled by a toggle switch to connect the device lead to either ground or to the connected instrument. This provides device protection against electrostatic discharge when physically changing the circuit configuration.

An example of a transport measurement obtained with a device mounted in our microscope is shown in Fig. 3. The device-under-test is a graphene FET, patterned in a Hall bar geometry (with multiple pairs of Hall contacts). Connecting the device in a conventional four-point measurement scheme, we obtain the Dirac-like dependence of the graphene resistivity versus applied back gate voltage.¹⁷ The Dirac point (maximum resistance) is shifted to ∼21 V due to unintentional doping of the graphene. This can be caused by charged impurities in the SiO₂/Si substrate or adsorbates on the graphene surface and is commonly observed.^17,18

The microscope control software consists of two programs, one of which is executed on the FPGA, and a second on the host computer. The FPGA program provides A/D, D/A, and time-critical, high-speed data processing. This includes interferometer signal digitization, filtering, cantilever self-excitation, and output of piezo tube control voltages. The host program provides the user-interface and performs tasks that are less time-critical, including frequency and amplitude determination of the cantilever signal, calculation of piezo tube scan voltages for raster and line scan and other control voltages, various feedback loops, real-time data display, and on-demand data file saving.

To receive digitized data or send control commands, DMA (direct memory access) transfers between the host and the FPGA are utilized. These communications take place over the high speed MXI data link between the PXI chassis and the PCI bus of the host. See Fig. 4 for an overview of the host PC and FPGA tasks and connectivity. The user does not interact directly with the FPGA program at runtime, but rather through control variables that have been mapped to the host program. Still, the FPGA program can be modified and recompiled offline if additional functionality or changes to operation are desired.

Cantilever self-excitation is a positive feedback method using the cantilever's own oscillation to create the feedback signal to drive the cantilever. In this manner, the cantilever is always driven at its self-determined resonance frequency, enabling sensitive frequency shift force detection (see Sec. II B 2). Conventional amplitude or phase shift detection, where the cantilever is driven at a fixed frequency, experiences a loss of sensitivity if large forces shift the cantilever response away from the drive frequency by an amount larger than the cantilever bandwidth (Δf ∼ f₀/Q). There is no risk of this with self-excitation.

The processing speed of the FPGA ensures reliable cantilever self-excitation. The interferometer signal representing the cantilever position is digitized, optionally filtered, delayed by a z⁻ⁿ Discrete Delay function in the FPGA code, amplified by a gain factor, and output as the drive voltage to a piezo disc mechanically coupled to the cantilever. Running at 40 MHz, the FPGA allows tuning of the delay by integer multiples of 25 ns clock ticks. When the sinusoidal drive phase is shifted by π/2 relative to the cantilever position, self-excitation is achieved.¹⁹ The user can also control the drive amplitude and interrupt time (duration which the drive is turned off). Alternatively, the interrupt time can be controlled by active feedback for maintaining a steady cantilever amplitude.

The frequency of cantilever oscillations is affected by tip-sample interaction and can provide topographic, magnetic, and/or electrostatic information. A force acting on a cantilever is described by F = −∇U, where U is the potential energy of the cantilever as a function of its position. The specific form of U depends on the interaction (topographic, magnetic, electrostatic, etc.). These forces shift the resonance frequency of the cantilever by

for a cantilever with spring constant k, resonant frequency f₀, and equilibrium position z₀. By detecting this frequency shift as a function of the cantilever position, we map the interaction force (although quantitatively extracting the force is difficult). Cantilever frequency detection enables fast and sensitive imaging with high Q cantilevers.¹⁹ There is no need to wait for cantilever “ring-up,” as in amplitude detection. The employed frequency detection algorithm utilizes the fact that the second derivative of a sinusoidal signal is −ω² times the original signal

Fitting a line to the second derivative ∂²z(t)/∂t² vs. the input signal z(t) allows determination of the signal frequency.¹² 

This algorithm efficiently detects the first harmonic of a sinusoidal signal using the entire time record of the oscillatory signal. In contrast, measuring the period between zero-crossings discards a majority of the data and is particularly susceptible to noise. Additionally, the derivative method is much more precise than performing a FFT, whose resolution is 1/T, where T is the length of the entire signal record in seconds. Thus, one would need 1000 seconds of data to obtain 1 mHz frequency resolution. This is impractical for scanning applications where each pixel requires a precise frequency measurement. We achieve sub-1 mHz resolution of a 75 kHz signal using approximately 3 ms of data.

To test the limits of the algorithm, we generated a frequency modulated sine wave using a Stanford Research DS345 function generator. With a baseline frequency of 75 213.833 Hz, the frequency modulation depth was set to 1 mHz at a modulation frequency of 10 Hz. The input signal is digitized at 690 kHz (Fig. 5(a)), and 2048 data points are used for each frequency measurement, corresponding to a measurement time of 3 ms, suitable for most scanning applications. The input signal is filtered by a bandpass of 20 Hz width around the baseline frequency. Frequency detection results are shown in Figs. 5(b) and 5(c). The detected frequency vs. time record (Fig. 5(b)), clearly shows the imposed frequency modulation. In Fig. 5(c)—a FFT of Fig. 5(b)—the 1 mHz modulation “signal” rises above the noise floor (∼10 μHz/Hz^1/2) with a SNR of nearly 100.

Strictly speaking, the measurement time (3 ms) is shorter than the settling time of the 20 Hz bandpass, resulting in attenuation of the 1 mHz modulation amplitude. In practice, the improvement in frequency noise justifies such a strict filter. The user can fine-tune the filtering and the scan rate to optimize frequency noise, scan speed, and spatial resolution. The number of data points for a frequency calculation can also be reduced and should be determined empirically, depending on the source and magnitude of noise. Note that presently the frequency shift sensitivity is not limited by the frequency detection algorithm, but by the thermal noise δf_th = F_thf₀/(2kx₀) of the cantilever (in Hz/Hz^1/2). The thermal force noise (in N/Hz^1/2) is calculated as

The frequency detection algorithm code is shared between the FPGA and host. The limited memory of the FPGA is not well-suited for long arrays of high-precision data. Furthermore, a host PC can perform all calculations with double-precision (64-bit) floating point numbers, improving accuracy over fixed-point and single-precision (32-bit) floating point numbers on the FPGA. As such, the host computer performs the bulk of array manipulations.

The host code provides the graphical user interface (GUI) as well as much of the instrument control and data processing. The microscope control software was developed for a standard desktop PC with an Intel Core i7 (2.93 GHz) CPU and 8 GB of RAM.

In addition to calculating the cantilever frequency, the host is also responsible for calculating the piezo tube voltages necessary for sample approach and raster scanning, performing cantilever amplitude and frequency feedback (if desired), plotting the scanned images (frequency vs. position, for example), and performing on-demand file saving. To ensure proper sample mapping, scanning operations must be properly synchronized with measurements of the imaging parameter (e.g., cantilever frequency). Therefore, queues and notifiers are used for data handling in a “producer/consumer” program design. This also enables parallelism: data acquired in one loop (producer) can be placed in a queue and accessed by a parallel loop (consumer). The consumer can then perform data processing that would otherwise hinder the acquisition speed of the producer. Measurement sequencing is also enforced through interrupts which notify the host when the FPGA has completed a task (e.g., scanned to a setpoint voltage). To showcase the high-degree of control over the scan sequence, we describe our algorithm below and in Fig. 6.

1. Mode selection – raster, line scan, manual positioning, or field scan

2. Read scan parameters (start, end, step)

3. Calculate estimated scan time

4. Go to initial position (e.g., set the piezo tube voltage to (x₀, y₀, z₀))

5. Begin scan (see Fig. 6).

The scanning is handled by nested “for” loops. The outer loop steps through the slow axis, the intermediate loop selects the trace or retrace scan, and the innermost loop iterates through the fast axis positions. Imaging with any desired parameter can be easily incorporated into this sequence. After each slow axis step, the results of the trace and retrace line scans are plotted, and the latest line scan is added to the composite 2D image. To compensate for any tilt of the sample, the 2D data are fed to a real-time plane fitting algorithm to flatten the image. See Fig. 7 for an example of the GUI display during image acquisition.

We performed several tests to calibrate the piezo tube motion and demonstrate the performance and capabilities of our microscope.

In order to calibrate the piezo tube extension (in nm per applied volt), we record the interferometer DC level as the sample is raised towards and brought into contact with the cantilever. Continued extension of the tube causes upward deflection of the cantilever, and a reduction in interferometer cavity length (distance between cantilever and fiber end). This allows one to observe interferometric oscillations according to sin((4π/λ)(δz/δV)ΔV), where λ is the interferometer wavelength (1550 nm), ΔV is the applied piezo tube voltage, and δz/δV is the tube's distance/voltage coefficient.²⁰ A sinusoidal fit (black dashed line) to the approach curve in Fig. 8(a) yields a calibration coefficient of 3.08 nm/V at room temperature.

Locating the sample surface is a critical step to setting up an imaging scan. A coarse tip-sample distance determination is performed as follows: while continuously driving the cantilever, the attocube z motor is stepped upward (towards the cantilever) until the sample comes into gentle contact with the cantilever, causing the oscillations to disappear. The sample is then retracted by less than 1.5 μm. We then perform a piezo tube z scan while monitoring either the cantilever frequency (self-excited cantilever, Fig. 8(b), red), or DC level (undriven cantilever, Fig. 8(b), black). The frequency-measurement approach provides an approximate idea of piezo z voltage necessary to bring the sample into contact with the cantilever. The DC level approach, because it detects cantilever snap down and snap off, provides a more accurate measurement.

We can perform PID control of the cantilever frequency with standard LabVIEW functions, controlling the piezo tube z voltage (extension) with the feedback output. For samples that interact with the tip purely by Van der Waals forces, this imaging mode corresponds to constant tip-sample spacing. We imaged a standard AFM calibration grating (MikroMasch²¹ TGX01) to demonstrate this non-contact AFM capability (see Fig. 9). This grating also allows us to calibrate the lateral motion of the piezo scan tube: 28.3 nm/V.

This image was acquired at a scan speed of 50 ms/pixel. Since the host PC is responsible for calculating the cantilever frequency, it also handles the frequency feedback. Iterative loops, as are used in PID, execute much more slowly on a host PC than on the FPGA. If the cantilever frequency could be calculated on the FPGA (by use of a FPGA card with greater processing capability than the 7851R), feedback could also be executed on the FPGA itself. This would result in much faster feedback and scanning.

With a magnetically coated Bruker²³ MESP cantilever (f₀ = 79198 Hz), we can detect forces from magnetized samples. Figure 10(a) shows a frequency-shift image for a magnetic hard disk drive, showing two tracks of magnetic bit data. Because magnetic forces can be either attractive or repulsive, the simple frequency feedback mode demonstrated in Sec. III A 2 cannot be used with magnetic samples. This image was therefore taken at nominally fixed piezo z voltage. As a result, some topographic signal may mix into such an image if the tip-sample distance changes during scanning. A more sophisticated MFM imaging algorithm (e.g., a lift mode) could be incorporated into our software. Presently, we do incorporate sample tilt correction, which adjusts the piezo z voltage as a linear function of both x and y position. This tilt can be calibrated by performing sample approaches at three different (x,y) positions.

The microscope was designed to operate in external magnetic fields. We use a GMW²⁴ 5403 electromagnet atop a rotating stage, in order to provide magnetic field in any in-plane direction (see Fig. 1(d)). The magnet current is supplied by a Kepco²⁵ 15 V/20 A BOP 15-20M voltage-controlled bipolar operational power supply. In Fig. 10(b), we show a region of the hard drive sample imaged at 0 G and 500 G. Cantilever magnetometry²⁶ data (not pictured) show that the cantilever magnetization undergoes switching at about 400 G. Such a magnetization reversal will change the sign of the force exerted on the cantilever by an unchanged sample magnetization. As a result, the color contrast of the frequency shift data in the 0 G and 500 G images are inverted. Dashed lines are shown as a guide to the eye to show two particular features where this is evident. Only a small amount of drift is observed between the two images, indicating reliability for imaging with applied fields.

We acquired scanning EFM images of an electrically biased graphene field effect transistor (CVD graphene on SiO2(300 nm)/n-Si) in order to demonstrate the ability to perform integrated scanning and current-voltage measurements. In an EFM measurement, the cantilever frequency is shifted by the capacitive interaction between tip and sample⁵ 

where C is the capacitance of the tip-sample system, and V is the potential difference between tip and surface.

In Fig. 11, we show the measured cantilever frequency shift for two configurations of the graphene hall cross: electrical current flowing left to right, or right to left. The cantilever is sensitive only to voltage differences between itself and the sample. The cantilever (which has a conductive chromium coating) is grounded, so the grounded electrical contact causes a negligible frequency shift. By contrast, the biased electrical contact shows a dramatic 2 Hz frequency shift relative to the cantilever's natural frequency. By incorporating a closed-loop Kelvin probe microscopy (KPM) technique, where the cantilever bias V_probe is adjusted in order to null the sample's contact potential difference V_CPD (instead of using a grounded cantilever, as presently), the sample's surface potential (in units of volts) could be directly measured. The technique can also be used to characterize the quality of contact to graphene.²⁷ Even without a KPM controller, Fig. 11 makes evident the voltage drops due to contact resistance between the gold electrodes and the graphene. Voltage drops in the graphene itself are also visible, particularly in the narrow regions, but appear smaller than those from the contact resistance due to the V² dependence of δf. Three-point current-voltage measurements of the gold/graphene contacts found contact resistances of 11.5 kΩ and 10.3 kΩ for the left and right contacts, respectively. The total two-point resistance between the pair was found to be 36.6 kΩ, leaving the graphene channel with a 14.8 kΩ resistance. Because the graphene channel extends far above and below the image (∼100 μm), current spreading is also observed. The inhomogeneity in local voltage requires further investigation.

We have also acquired images under varying back gate conditions, as shown in Fig. 12. The gate potential exerts a force on the cantilever, shifting its frequency. The image contrast is provided by shielding of the applied back gate by the grounded device (graphene and gold contacts), above which the cantilever experiences almost no frequency shift. The force on the cantilever does not depend on the sign of the voltage difference (since it is proportional to V²). For example, an attractive force (negative frequency shift) is evident above the unshielded gate for both -10 V and +15 V. Because of the long range of electrostatic forces as compared to topographic forces, these images suggest a means for helping to locate a device.²⁸ 

Because of the flexibility of the software and hardware we are using, it would be straightforward to expand the imaging and measurement modes of this instrument beyond cantilever force detection. For example, using a biased conducting tip, the device conductance could be monitored as a function of tip position (scanning gate imaging).^1,2,29 Alternatively, the Hall voltage of a device such as that used in Fig. 11 could be monitored in order to quantify the stray magnetic field of a MFM tip.⁴ We plan to use the microscope to create a spin map of a lateral spin valve by monitoring the effect of a magnetic cantilever tip on the device's non-local voltage, as in scanning spin-precession imaging.^30,31 Additional measurement protocols could be added in order to perform sensitive measurements. For example, the cantilever oscillations could be used as a lock-in reference, while monitoring the device voltage. Again, the modularity of the PXI chassis, the reprogrammability of the FPGA and control software, and the ease of interfacing LabVIEW with external instrumentation will make such measurements possible and relatively easy to implement.

Scanning probe microscopy plays a central role in micro- and nano-scale characterization of samples and devices. Combining scanned probes with operational devices is not a capability well-supported by commercial SPM solutions. The variety of transport measurements and effects that can be studied puts a premium on reconfigurability. LabVIEW places measurement control in the hands of the experimenter, enabling nearly endless combinations of scanning and transport measurements and protocols. FPGA-based operation is a perfect fit for imaging tasks because of its speed and deterministic hardware execution. As such, the combination of FPGA and LabVIEW enables low-cost, versatile in operando SPM solutions. Using this platform, we have demonstrated fast and accurate frequency shift detection and imaging, straightforward and reliable incorporation of transport measurements, and the flexibility to pursue unique and innovative measurement schemes for investigation of electronic and spintronic systems.

This research was supported by funding from the Center for Emergent Materials: a National Science Foundation (NSF) MRSEC, Award No. DMR-1420451 and by the (U.S.) Army Research Office (USARO), Award No. W911NF-12-1-0587. Technical support was provided by the NanoSystems Laboratory at OSU.