Time jitter is an important means for evaluating the performance of high-speed communication systems. Current high-speed digital designs require faster edge speeds and smaller effective data windows. Therefore, analysis of the root cause of jitter has become the key factor in determining the success or failure of a design. To analyze the jitter source of the whole link, the jitter is usually extracted and analyzed by software or hardware at the receivers. To verify the accuracy of jitter extraction at the receivers, many instrument manufacturing companies have developed oscilloscope software to inject jitter at the transmitters, but the core algorithms for jitter generation are commercially sensitive and the software cannot inject all types of jitter, particularly bounded uncorrelated jitter, into the pure signals. This paper proposes a software jitter modeling and injection algorithm that can be implemented in MATLAB and includes transmitter test signal modeling, jitter generation, and the injection of various types of jitter. Unlike other research and commercial software, the proposed algorithm enables the injection of various types of jitter, notably bounded uncorrelated jitter, into test signals. This algorithm is suitable for integration into real-time oscilloscopes for jitter generation and injection.

1.
Y.-R.
Liang
, “
Note: A new method for directly reducing the sampling jitter noise of the digital phasemeter
,”
Rev. Sci. Instrum.
89
,
036106
(
2018
).
2.
Z.
Chen
,
X.
Wang
,
Z.
Zhou
,
R.
Moro
, and
L.
Ma
, “
A simple field programmable gate array (FPGA) based high precision low-jitter delay generator
,”
Rev. Sci. Instrum.
92
,
024701
(
2021
).
3.
M. P.
Li
,
Jitter, Noise, and Signal Integrity at High-Speed
(
Pearson Education
,
2007
), pp.
18
23
.
4.
Y.
Wu
, “
An improved statistical analysis method for duty cycle distortion jitter analysis
,” in
2013 IEEE International Symposium on Consumer Electronics (ISCE)
(
IEEE
,
2013
), pp.
31
32
.
5.
M.
Marcu
,
S.
Durbha
, and
S.
Gupta
, “
Duty-cycle distortion and specifications for jitter test-signal generation
,” in
2008 IEEE International Symposium on Electromagnetic Compatibility
(
IEEE
,
2008
), pp.
1
4
.
6.
M.
Shitnanouchi
, “
Periodic jitter injection with direct time synthesis by SPP/sub tm/ ATE for serdes jitter tolerance test in production
,”
International Test Conference, 2003. Proceedings. ITC 2003
,
2003
, pp.
48
57
.
7.
B.
Analui
,
J. F.
Buckwalter
, and
A.
Hajimiri
, “
Data-dependent jitter in serial communications
,”
IEEE Trans. Microwave Theory Tech.
53
(
11
),
3388
(
2005
).
8.
J.
Buckwalter
,
B.
Analui
, and
A.
Hajimiri
, “
Data-dependent jitter and crosstalk-induced bounded uncorrelated jitter in copper interconnects
,”
2004 IEEE MTT-S International Microwave Symposium Digest (IEEE Cat. No.04CH37535)
3
,
1627
1630
(
2004
).
9.
J.
Liang
,
A.
Sheikholeslami
,
H.
Tamura
, and
H.
Yamaguchi
, “
Jitter injection for on-chip jitter measurement in PI-based CDRs
,” in
2017 IEEE Custom Integrated Circuits Conference (CICC)
(
IEEE
,
2017
), pp.
1
4
.
10.
J.
Liang
,
A.
Sheikholeslami
,
H.
Tamura
, and
H.
Yamaguchi
, “
On-chip jitter measurement using jitter injection in a 28 Gb/s PI-based CDR
,”
IEEE J Solid-State Circuits
53
(
3
),
750
(
2018
).
11.
K. K.
Kim
,
J.
Huang
,
Y.-B.
Kim
,
F.
Lombardi
, and
M.
Choi
, “
Analysis and simulation of jitter for high speed channels in VLSI systems
,” in
IEEE Instrumentation & Measurement Technology Conference (IMTC)
(
IEEE
,
2007
), pp.
1
4
.
12.
Keysight Technologies
, “
Tx_SingleEnded (channel simulation single-ended transmitter)
,” available at https://edadocs.software.keysight.com/pages/viewpage.action?pageId=5275543.
13.
Keysight Technologies
, “
81133A and 81134A3.35 GHz pulse pattern generators
,” available at https://www.keysight.com/cn/zh/assets/7018-01085/data-sheets/5988-5549.pdf.
14.
A.
Kuo
,
R.
Rosales
,
T.
Farahmand
,
S.
Tabatabaei
, and
A.
Ivanov
, “
Crosstalk bounded uncorrelated jitter (BUJ) for high-speed interconnects
,”
IEEE Trans. Instrum. Meas.
54
(
5
),
1800
(
2005
).
15.
J. F.
Buckwalter
and
A.
Hajimiri
, “
Cancellation of crosstalk-induced jitter
,”
IEEE J. Solid-State Circuits
41
(
3
),
621
(
2006
).
16.
C.
Sui
,
S.
Bai
,
T.
Zhu
,
C.
Cheng
, and
D. G.
Beetner
, “
New methods to characterize deterministic jitter and crosstalk-induced jitter from measurements
,”
IEEE Trans. Electromagn. Compat.
57
(
4
),
877
(
2015
).
17.
IA # OIF-CEI-04.0, Common Electrical I/O (CEI)—Electrical and Jitter Interoperability Agreements for 6G+ bps, 11G+ bps, 25G+ bps I/O and 56G+ bps,
2017
.
18.
G.
Soliman
, “
Improved jitter distribution tail-fitting algorithm for decomposition of random and deterministic jitter
,”
IEEE Trans. Electromagn. Compat.
62
(
5
),
1852
(
2020
).
19.
N.
Ren
,
Z.
Fu
,
D.
Zhou
,
H.
Liu
,
Z.
Wu
, and
S.
Tian
, “
Jitter decomposition by convolutional neural networks
,”
IEEE Trans. Electromagn. Compat.
63
(
5
),
1550
(
2021
).
20.
N.
Ren
,
Z.
Fu
,
D.
Zhou
,
D.
Kong
,
H.
Liu
, and
S.
Tian
, “
Jitter decomposition meets machine learning: 1D-Convolutional neural network approach
,”
IEEE Commun. Lett.
25
(
6
),
1911
(
2021
).
You do not currently have access to this content.