This paper presents a high-speed sample-and-hold circuit (SHC) for very fast signal analysis. Spatial sampling techniques are exploited with CMOS transmission lines in a 0.13 μm standard CMOS process. The SHC includes on chip coplanar waveguides for signal and clock pulse transmission, a clock pulse generator, and three elementary samplers periodically (L = 7.2 mm) placed along the signal propagation line. The SHC samples at 13.3 Gs/s. The circuit occupies an area of 1660 μm × 820 μm and consumes ∼6 mW at a supply voltage of 1.2 V. The obtained input bandwidth is ∼11.5 GHz.
REFERENCES
1.
Y. T.
Geng
, H.
Zou
, C. J.
Li
, J. W.
Sun
, H. B.
Wang
, and P. S.
Wang
, IEEE Trans. Very Large Scale Integr. (VLSI) Syst.
20
, 1553
(2012
).2.
J. W.
Sun
and P. S.
Wang
, Rev. Sci. Instrum.
84
, 106111
(2013
).3.
R. H.
Walden
, IEEE J. Sel. Areas Commun.
17
, 539
(1999
).4.
J.
Chou
, O.
Boyraz
, D.
Solli
, and B.
Jalali
, Appl. Phys. Lett.
91
, 161105
(2007
).5.
G. C.
Valley
, Opt. Express
15
, 1955
(2007
).6.
A.
Khilo
et al., Opt. Express
20
, 4454
(2012
).7.
B.
Chan
, B.
Oyama
, C.
Monier
, and A.
Gutierrez-Aitken
, IEEE J. Solid-State Circuits
43
, 2187
(2008
).8.
R. A.
Kertis
et al., IEEE J. Solid-State Circuits
44
, 2295
(2009
).9.
C.-C.
Huang
, C.-Y.
Wang
, and J.-T.
Wu
, IEEE J. Solid-State Circuits
46
, 848
(2011
).10.
M.
Chu
, P.
Jacob
, J. W.
Kim
, M. R.
LeRoy
, R. P.
Kraft
, and J. F.
McDonald
, IEEE J. Solid-State Circuits
45
, 380
(2010
).11.
F. L.
Lang
, T.
Alpert
, D.
Ferenci
, M.
Grozing
, and M.
Berroth
, in Proceedings of the 7th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME 2011), Trento, 3–7 July 2011
(IEEE
, 2011
).12.
N.
Rolland
, A.
Benlarbi-Delai
, A.
Ghis
, and P. A.
Rolland
, Microwave Opt. Technol. Lett.
44
, 292
(2005
).13.
H. E.
Aabbaoui
, B.
Gorisse
, N.
Rolland
, V.
Allouche
, N.
Fel
, and B.
Riondet
, in Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), Island of Kos, 21–24 May 2006
(IEEE
, 2006
).14.
P. S.
Wang
, H. B.
Wang
, Y. R.
Gao
, Y. T.
Geng
, G.
Thomas
, and C. J.
Li
, Analog Integr. Circuits Signal Process.
66
, 245
(2011
).15.
M.
Buck
, M.
Grözing
, M.
Berroth
, M.
Epp
, and S.
Chartier
, in Proceedings of the IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Seattle, 2–4 June 2013
(IEEE
, 2013
).16.
H.
Orser
and A.
Gopinath
, IEEE Trans. Circuits and Systems-II: Express Briefs
57
, 512
(2010
).© 2014 AIP Publishing LLC.
2014
AIP Publishing LLC
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