The application of binary arithmetic in the computing circuits of a high speed digital computer is discussed in detail. The discussion covers, with numerous examples, the use of complements to represent negative numbers, the corrections necessary in the multiplication process as a result of the use of complements, and additional modifications of the process to simplify mechanization. A special division method well‐adapted to automatic computer use is described, and round‐off procedures are noted briefly. The article is concluded with a discussion of the storage of negative numbers as absolute values with a sign rather than in complement form.

1.
Burks, Goldstine, and von Neumann, Preliminary Discussion of the Logical Design of an Electronic Computing Instrument (Institute for Advanced Study, Princeton, New Jersey, 1947), second edition, Part 1, Vol. 1.
2.
Instructions and numerical quantities are handled interchangeably in both the memory and arithmetic circuits, instructions being modified in the latter circuits by addition or subtraction of constants where necessary. However, an instruction differs from a quantity in that it can be interpreted by the control circuits of the computer and through those circuits can cause predetermined operations to be performed.
3.
An exception to this rule occurs in the case of an improper division, i.e., one in which the dividend is larger than the divisor. In this case, no sign reversal would occur on the tenth operation in the computation of the first quotient digit; it may, in fact, be desirable to perform the tenth operation and institute an automatic corrective procedure if no sign reversal occurs.
4.
See reference 1, p. 20.
This content is only available via PDF.
© 1950 American Institute of Physics.
1950
American Institute of Physics
You do not currently have access to this content.