Thermal environment impact on HfO_x RRAM operation: A nanoscale thermometry and modeling study

Many emerging technologies rely on understanding, manipulating, and making predictions based on large datasets using various machine learning and artificial intelligence algorithms.^1–5 With traditional computing architectures, these data intensive applications suffer from the von Neumann bottleneck, i.e., slow shuttling of data back and forth from memory to the central processing unit.^6,7 Technologies that can compute in memory, such as filamentary oxide-based resistive random-access memory (RRAM), have been proposed to overcome this bottleneck and have attracted considerable attention.^6,8 Electrical biasing across their metal–insulator–metal structure generates a conductive bridge, a filament, across electrodes via the creation of oxygen vacancies in the metal oxide insulator.^9–15 The negatively charged oxygen ions migrate to the positively charged electrode by drift, diffusion, and thermophoresis.^14,16–20 When the bias polarity is reversed, oxygen ions are pushed back into the filament, increasing the resistance. Transition from the low resistance state (LRS) to the high resistance state (HRS) is referred to as “reset” and the transition from the HRS to the LRS is referred to as “set.” Notably, these devices can achieve a continuum of resistance states between the LRS and HRS based on the polarity, amplitude, and duration of applied voltage pulses.^13,21–24 This resistive switching behavior has been observed in many oxides, including HfO₂,^11,15,25,26 TiO₂,^9,27,28 and Ta₂O₅/TaO₂.^{13,14,22,29,30} This study focuses on a device consisting of a sub-stoichiometric HfO_x (x ≈ 1.85) active layer and a titanium capping layer due to its known stable operation and industry readiness.^{10,12,17,26,31} For example, switching retention times exceeding 10 years (>10⁵ cycles) and resistance ratios >10³ Ω have been reported for Ti/HfO_x-based devices.^10,12 The titanium capping layer, in direct contact with HfO_x, acts as an oxygen reservoir, i.e., storing oxygen ions that are removed from the filament and returning them back to the filament upon inversion of bias polarity.^10,12,20 Though this study focuses on a Ti/HfO_x active material, the results presented here extend to other filamentary oxides that experience large localized temperature increases during operation.

Many challenges need to be overcome to harness the full potential of filamentary RRAM analog neuromorphic devices. These challenges include poor linearity of the resistance change with respect to the number of applied pulses, high variability, and asymmetry of resistance changes induced by pulses of opposite polarity.^32–34 These non-idealities make it difficult to achieve specific analog resistance states, limiting the computational accuracy and efficiency of neuromorphic circuits.^32–34 Often, a large resistance change is observed from the first reset pulse when the device is in the low resistance state. After just a few pulses, the resistance change saturates. This large resistance change likely occurs because of the larger current achieved during the first pulse, which leads to the largest Joule heating and temperature rise.³⁴ Since the magnitudes of all three ion migration mechanisms (drift, diffusion, and thermophoresis) increase exponentially with temperature, the largest temperature rise also leads to the highest resistance change.¹⁸ Numerous works have studied the effect of filament thermal environment on the LRS to HRS resistance transition. These studies include introducing thermal enhancement layers/electro-thermal modulation layers,^34–36 changing thermal conductivities (k_th) of the electrodes,³⁷ and varying k_th of the substrate.^17,18,26 Past experiments have shown that the thermal environment impacts the resistance change of these devices; however, characterizing the filament temperature during operation remains a challenge. For example, transient thermoreflectance imaging (TTI) was used to characterize and compare RRAM experimental and simulated temperature rises.^18,38 However, TTI typically requires averaging of many images, precluding its use for characterizing transients in RRAM devices in which the resistance change occurs during the course of a single pulse. Similarly, Raman thermometry has measured steady-state heating, but its spatial resolution is insufficient to map localized heating from filamentary devices.³⁹ AFM-based Scanning Joule Expansion Microscopy (SJEM) was used to estimate temperature rises in TaO_x devices with nanoscale resolution, but SJEM measurements are hardly quantitative, as converting the SJEM signal to temperature is far from trivial.⁴⁰ The high spatial and temperature resolution of scanning thermal microscopy (SThM) was recently used to measure the temperature rise of the top electrode (ΔT_TE) right above the filament in resistive switching devices during biasing.^39,41–44 Such SThM measurements on HfO₂-based devices with single-layer graphene electrodes revealed a filament (≈13 nm diameter) reaching a temperature of approximately 1300 °C.³⁹ Importantly, the authors suggested using low thermal conductivity substrates to reduce the heat transfer between neighboring devices to avoid unintended resistance changes.³⁹ 

Here, expanding on prior works, we developed a comprehensive electro-thermal model to evaluate the impact of thermal conductivities and thermal boundary conductances (G) of constituent materials and interfaces on RRAM devices' resistance change during analog pulsing. ΔT_TE from the model is compared to the SThM measured ΔT_TE during in situ analog pulsing in Ti/HfO_x RRAM devices. In this study, we focus on the effects of the thermal environment on the first reset pulse since it leads to the largest temperature rise and the largest resistance change. The results of this parametric analysis suggest that a capping layer with high thermal conductivity and a high G between the capping layer and the top electrode reduce the magnitude of the resistance change from the first pulse. To ensure the attainability of many resistance states in analog devices, it is important to avoid large resistance changes from a single pulse. Pairing in situ thermal measurements with a simulation that relates temperature and resistance change, this work offers new insights for optimizing the operation of RRAM devices by engineering the devices' thermal environment.

Hafnium oxide-based neuromorphic devices were fabricated on a silicon substrate with a 300 nm thick SiO₂ surface layer. The bottom electrode was patterned with a negative photoresist using maskless UV photolithography. After development, a titanium adhesion layer (≈10 nm) and a gold film (≈70 nm) were deposited by electron beam evaporation (6.7 × 10⁻⁴ Pa or lower). Lift-off of the photoresist in acetone yielded the patterned bottom electrode. The electrodes were rinsed in acetone, methanol, and isopropyl alcohol and further cleaned with an O₂ plasma descum (8 Pa, 150 W, and 8.3 × 10⁻⁷ m³ s⁻¹ O₂ flow rate) right before loading the devices into a preheated (250 °C) atomic layer deposition (ALD) chamber. A 5 nm HfO_x layer was deposited with 55 ALD cycles of alternating water vapor for 0.06 s and tetrakis(dimethylamido)hafnium (TDMA-Hf) for 0.25 s. The thickness of HfO_x was confirmed by ellipsometry after deposition. X-ray photoelectron spectroscopy (XPS) revealed a sub-stoichiometric composition (x ≈ 1.85) of the HfO_x layer. Next, the top electrode was patterned using the same procedure as the bottom electrode. After development, a titanium capping layer (≈5 nm) and a gold electrode (≈150 nm) were deposited by electron beam evaporation (6.7 × 10⁻⁴ Pa or lower). Lift-off in acetone was used to remove the remaining photoresist and obtain the final device pattern. A representative cross-sectional transmission electron microscopy (TEM) image is shown in Fig. 1(a), and an optical micrograph of the 10 × 10 μm² crossbar structure is shown in Fig. 1(b). Additional details for this fabrication process can be found in Basnet et al.¹⁷ and West et al.²⁶ 

A positive voltage sweep from 0 to 3.5 V was applied to the top electrode to form the filament while grounding the bottom electrode. A 0.1 mA current compliance ensured no damage to the device. After forming, negative voltage sweeps were applied, starting at −0.1 V and gradually increasing to −1.5 V, in increments of 0.1 V. After reaching the final reset voltage, the device was switched back into the LRS with a positive voltage sweep from 0 to 1.2 V using a current compliance of 1 mA. The device was cycled between the HRS and LRS with −1.5 and 1.2 V, respectively, to ensure that the device could switch repeatably before thermal and voltage pulse measurements. Pulsing was conducted with devices starting in the LRS (≈550 Ω). Several negative voltage pulses (1 ms pulse width) were applied to the top electrode to gradually reset the device. Though 1 ms is a relatively long pulse for analog RRAM devices, such long pulse widths mimic biological processes and are used for some neuromorphic implementations.^{22,29,45–48}

SThM was used to measure with nanoscale resolution (i) steady state temperature maps, (ii) transient temperatures at selected locations, and (iii) to correlate applied voltages to the measured currents and temperatures [Fig. 2(a)]. Our custom SThM setup consists of custom-modified atomic force microscopy (AFM),⁴⁹ a commercially available SThM probe and a SThM amplifier (30 kHz bandwidth),⁵⁰ a commercially available oscilloscope (200 MHz bandwidth and 2 GS/s sampling rate), and a commercially available semiconductor analyzer. A custom ceramic package was developed to enable wire bonding of neuromorphic devices and electrical biasing during scanning. Commercially available silicon SThM cantilevers⁵⁰ (500 μm long and 50 μm wide) characterized by a 50 nm diameter hollow SiO₂ tip with a thermocouple embedded close to the tip apex were used to sense the temperature rise in the sample while in contact with the top electrode.

The thermocouple voltage was amplified (1000×) with a SThM amplifier. For steady-state temperature mapping, the amplified SThM voltage was input to an atomic force microscopy (AFM) controller and recorded simultaneously with the AFM height (i.e., topography) channel. This way, surface morphological changes (if any) that may be caused by device degradation could be easily detected. After locating the filament position in the SThM map [see, for example, Fig. 2(a)], the tip was positioned above the filament region to measure the sample temperature dynamics in situ during set/reset sweeps and pulse biasing. This was accomplished using an oscilloscope triggered by the output bias of the semiconductor analyzer, which also recorded the device bias concurrently.

The SThM tips were calibrated using ≈200 nm thick gold microheaters on a SiO₂ (≈300 nm)/Si substrate (same as the device substrate). Notably, the microheater/tip and top electrode/tip interfaces are made of same materials. The microheater (1000 × 5 μm² with two contact pads on each side) enables precise four-point measurements [inset of Fig. 2(b)] of the gold microheater’s average resistance. First, the gold microheater was placed in an oven and its temperature coefficient of resistance (TCR) was obtained by determining device resistance as a function of temperature (see Fig. S1 in the supplementary material). Next, the microheater was used to calibrate the SThM tip as follows. The microheater temperature was controlled precisely by using the TCR obtained previously and measuring the heater resistance while supplying a current to it. The SThM probe calibration was obtained by positioning the probe tip at the center of the microheater by measuring the probe voltage (ΔV_tip) as a function of the heater ΔT. A linear fit using a Monte Carlo method was used to extract the tip calibration coefficient and its associated uncertainty [Fig. 2(b)].

Since the heater resistance measured as described above is related to a device-wide spatially averaged temperature while the SThM is a local measurement of the temperature in the center of the heater, such calibration may suffer from systematic errors due to temperature gradients along the microheater length.⁵¹ Therefore, a thermal finite element model (FEM) was developed to quantify the temperature gradient along the microheater (see Fig. S2 in the supplementary material). The maximum discrepancy between the temperature calculated at the center of the microheater (the spot measured by the SThM probe) and the average temperature (based on electrical resistance) was calculated to be 2.41%. This systematic error was corrected by using the FEM calculated temperatures in the heater center in Fig. 2(b) in place of heater average temperatures. Additional efforts to reduce the measurement uncertainty included positioning the cantilever perpendicular to the microheater (this orientation minimized external indirect heating of the probe tip via heating of the cantilever). Finally, to ensure the tip does not act as a heat sink when in contact with the surface, the metal heater’s resistance was monitored before and after engaging the tip onto the surface. No change was detected when engaging the tip, likely due to the tip's low thermal conductivity. (similarly, no change in the RRAM device current was observed when engaging the tip.)

In these equations, a [m] represents the hopping distance for a vacancy, f [Hz] is the hoping frequency, E_a [J] is the activation energy for vacancies, k_B [J K⁻¹] is the Boltzmann constant, and q [C] is the charge of an electron. This FEM multiphysics model is unable to simulate the forming process; therefore, an initial condition of the filament must be assumed. Here, a filament with an inverted conical shape and a diameter varying along its length from 6 to 10 nm was used, consistent with previous works.^52–55 A cross-sectional image of the initial vacancy distribution is shown in Fig. S3 in the supplementary material. The model also assumes that the device is radially axisymmetric with respect to the center of the filament. The only variables that are changed in this study are thermal conductivities of various materials and thermal boundary conductances between the layers. In the model, the interface of the bottom of the substrate with the environment is fixed to room temperature. This boundary was found to have little impact on both the simulated device temperature and the resistance change, thus fixing it to room temperature is a reasonable approximation. All other environmental boundaries of the device assume a convective heat flux with still air using a heat transfer coefficient of 5 W m⁻² K⁻¹.⁵⁶ The values of all other material properties are listed in Table S2 in the supplementary material. A more detailed explanation of this electro-thermal model can be found in the study by Pahinkar et al.¹⁸ 

Scanning thermal microscopy was used to locate the filament, perform in situ thermal measurements of ΔT_TE (top electrode temperature) during voltage sweeps and voltage pulsing, and calibrate a comprehensive electro-thermal model. After the filament formation step and multiple cycling between the LRS and HRS, the device was held at a steady-state power of 1 mW, while scanning the SThM tip. Note that in these conditions, the voltage is too low to induce resistance changes in the device. A representative SThM map [Fig. 3(a)] shows that heat generation is localized to one small filament or filament area, with a maximum ΔT_TE of only 2.79 ± 0.08 K. The temperature rise in this device is modest because the filament is buried under a 150 nm thick top electrode and much of the heat is dissipated through the substrate.^17,18,26 Simulations under same conditions (1 mW steady state power) show a very good agreement with the experimental data [see Fig. 3(a)].

The model captures lateral heat dissipation reasonably well, although the full width at half maximum (FWHM) of the line profile across the hot spot does not exactly match the experimental data. In contrast to the perfectly centrosymmetric hot spot of the model, the measured hot spot is slightly asymmetric and has a larger FWHM, possibly because of the asymmetric heat transfer that results from the formation of the filament near the edge of the device. The relevant thermal parameters that yield such agreement are listed in Table I.

Next, the SThM tip was positioned directly on the hot spot (i.e., above the filament) and held in contact with the sample while the device was cycled between the LRS and HRS to verify that the filament survived the temperature mapping procedure and still exhibits resistive switching. This allows tracking of the top electrode temperature (ΔT_TE) in situ, directly above the filament during both voltage sweeping and pulsing, enabling direct correlation with current and applied voltage that were recorded with the same oscilloscope. Figure 4 shows a typical set/reset hysteresis loop with the measured current (left axis) and ΔT_TE (right axis). As expected, the temperature rise is strongly correlated with the current. During negative biasing, the device starts in the LRS. As the magnitude of the voltage increases, ΔT_TE also increases due to the rising current and Joule heating through the device. At ≈−0.5 V, the device starts to reset since the filament has reached a critical temperature and the bias is large enough to push oxygen ions from the titanium capping layer into the filament by drift. This causes an increase in resistance (i.e., a decrease in the current), which lowers ΔT_TE even as the magnitude of the bias is increased. At the start of positive biasing, the temperature rise is very small because the current is very low in the HRS. The low ΔT_TE measured from 0 to ≈0.8 V shows that the measured tip voltage is not affected by the voltage applied to the device. At ≈0.8 V, there is an abrupt increase in the current and ΔT_TE, which, in turn, promotes the drift, diffusion, and thermophoresis of oxygen vacancies into the filament.

Voltage pulsing was initiated with the devices in the LRS (≈550 Ω). The first pulse is defined as the pulse after the device is put back in the LRS. Figure 5 shows a typical ΔT_TE measured for first −0.7 and −1 V pulses on the same device. Between these two pulses, the device is put back in the LRS with a 0–1.2 V sweep (1 mA current compliance). It is noted that due to a limitation of the pulsing equipment, the voltage pulse is not a square pulse, and the peak voltage is only held for a short time, see Fig. 5 (right axis). As expected, the temperature rise during the −0.7 V pulse (2.16 K ± 0.06 K) is smaller than ΔT_TE obtained for the −1 V pulse (2.62 K ± 0.07 K). Additionally, while the temperature rises monotonically during the −0.7 V pulse, for the −1 V pulse, the temperature starts decreasing while the voltage is still increasing. We interpret this as follows. During the larger −1 V pulse, the resistance increases quickly due to the higher peak temperature that drastically increases the drift, diffusion, and thermophoresis of oxygen vacancies since these processes have an exponential dependence on the temperature [Eqs. (4)–(6)]. In addition, RRAM devices are very sensitive to the applied voltage via the exponential relationship with ionic drift [Eq. (5)]. These two mechanisms act together, quickly increasing the resistance (lowering the current), leading to a reduction in ΔT_TE with time. Consequently, the −0.7 V pulse caused the filament to increase in resistance by only ≈285 Ω, while the −1 V pulse caused a resistance change of ≈5120 Ω.

The voltage pulses from the experiment were applied to the model using the same material parameters that yielded good agreement for the steady state comparison in Fig. 3. Similarly, Fig. 5 shows a good agreement between the modeled and measured ΔT_TE for both −0.7 and −1 V amplitude pulses. For the −0.7 V pulse, the ΔT_TE predicted by the model is 2.18 K, very close to the measured value (≈2.2 K). The maximum simulated ΔT_TE for the −1 V pulse is 2.52 K compared to the measured value of ≈2.6 K, well within the uncertainty of the measurement (≈0.07 K). Besides the peak temperatures, the modeled ΔT_TE follows the measured temperature dynamics reasonably well. That is, the −1 V pulse amplitude causes a fast reduction in temperature during the pulse compared to the lower amplitude pulse. There is, however, a noticeable reduction in ΔT_TE for the −0.7 V pulse in the simulation, which is not observed experimentally (Fig. 5). This can be attributed to the model's overestimation of the resistance change (≈1250 Ω) for the −0.7 V pulse compared to just ≈285 Ω in the experiment. The estimated resistance change (≈4830 Ω) has a much better agreement with the experiment (≈5120 Ω) for the −1 V pulse. Given the large variability of RRAM devices observed in practice, capturing the exact resistance changes in the model is very difficult. The simulation, however, estimates ΔT_TE well and yields the correct trends for the resistance change. This allows for systematically assessing the impacts of various material thermal properties and interfaces on estimated trends in resistance change.

The same simulation can also be used to estimate the relationship between the measured ΔT_TE and the rise in filament temperature. The plot in Fig. 6 compares three different estimated filament region temperatures to the estimated ΔT_TE for powers ranging from 17 to 737 μW. The average filament temperature is defined as the average temperature within the 5 nm filament radius and 5 nm filament height. Similarly, the average titanium capping layer temperature is defined as the average temperature above the filament in the same volume (depicted in Fig. 6 inset). To understand the heat transfer between the filament and the capping layer, the average temperature of their interface is also plotted. According to the linear fit in Fig. 6, a ΔT_TE of just ≈2 to 3 K (depending on the biasing condition) corresponds to a temperature rise of the filament/capping layer interface between ≈883 and ≈1330 K, respectively. For example, ΔT_TE measured by SThM for the −1 V pulse (2.62 K ± 0.07 K) corresponds to a rise in the filament/capping layer interface by 1160 ± 31 K. This filament temperature is similar to other estimates in previous RRAM studies.^18,25 We can estimate the rise in filament temperature with the fits in Fig. 6. For material parameters validated by steady-state experiments (Fig. 3), the average temperatures of the capping layer and the filament are nearly identical. The relationship between these two temperatures and the resistance change will be discussed in a later section of this paper. These large locally confined temperature rises greatly impact the mobility of oxygen vacancies by means of drift, diffusion, and thermophoresis. Therefore, determining which thermal properties of the materials and interfaces in the device affect the device resistance change the most is critical to engineer and improve the device characteristics, particularly with regard to reducing the amount of resistance change from the first reset pulse.

The model was used to independently understand the impact of thermal boundary conductances and thermal conductivities on the predicted resistance change of HfO_x-based filamentary RRAM. There are seven thermal boundaries in the simulated device geometry and five material thermal conductivities as illustrated in Fig. 7.

The thermal conductivity of the titanium capping layer was varied between 0.5 and 17 W m⁻¹ K⁻¹ spanning the range between TiO₂ and titanium metal, respectively.^58,60 The electrode thermal conductivity was varied between 50 and 300 W m⁻¹ K⁻¹ to represent a wide variety of metals, including gold and gold thin films.⁵⁷ The thermal conductivity of non-filamentary HfO₂ was varied from 0.1 to 2 W m⁻¹ K⁻¹, which encompass the typical range for HfO₂ thin films and substoichiometric films.⁵⁹ The substrate thermal conductivity was varied between 1 and 300 W m⁻¹ K⁻¹ to include many possible substrate materials.¹⁸ Since not all G values have been measured previously, the G of each interface was varied over five orders of magnitude from 1 × 10⁵ to 1 × 10⁹ W m⁻² K⁻¹, i.e., within the ranges, typical of the metal/oxide interfaces and encompassing the values assumed in other SThM RRAM works.^39,59,61 For all of these parameters, the resistance was measured with a −0.1 V, 1 ms read pulse before and after the application of a square −0.7 V, 1 ms reset pulse.

Figure 8(a) shows that the thermal conductivity of the capping layer (k_th,capping) has the largest impact on the calculated resistance change, ranging from 215 Ω for k_th,capping = 17 W m⁻¹ K⁻¹ (typical for bulk titanium metal) to 4473 Ω for 0.5 W m⁻¹ K⁻¹ (typical for TiO₂). Over this range, the thermal conductivity of the capping layer has the effect to reduce the average filament temperature rise from 1283 K (k_th,capping = 0.5 W m⁻¹ K⁻¹) to 938 K (k_th,capping = 17 W m⁻¹ K⁻¹), a 27% reduction. Furthermore, the average capping layer temperature decreases even more significantly from 973 to 581 K, a 40% reduction, when k_th,capping is increased. The impact of the capping layer temperature and filament temperature with respect to resistance change will be discussed later. The data in Fig. 8(a) suggest that the thermal conductivity of the electrodes and the substrate have a marginal impact on the device resistance change, compared to the impact of k_th,capping. Though the electrodes and substrate have a significant impact on overall heat dissipation from the device, they have a marginal impact on the local temperature in the regions where the migration of ions occurs. Additionally, Fig. 8(a) shows that the thermal conductivity of the material laterally next to the filament, in this case, the non-filament HfO₂, has a large impact on the resistance change. Although increasing the thermal conductivity of this layer would reduce the resistance change, only few materials are known to have high thermal conductivity but a very low electrical conductivity. The latter is a strict requirement for RRAM devices because if the electrical conductivity is too large, the leakage current would prevent the formation of the filament in the active (HfO₂) layer.

Of the seven boundary locations, only three have significant impacts on the device resistance change: the filament/Au bottom electrode interface, the titanium capping layer/Au top electrode interface, and the filament/surrounding HfO₂ interface [Fig. 8(b)]. The only influential boundary not in contact with the filament is the titanium capping layer to the gold top electrode. A low G between these layers traps the heat within the capping layer, slowing dissipation into the top electrode. Since the capping layer is the device oxygen reservoir and T strongly affects the migration of oxygen ions, maintaining a high temperature in the capping layer induces large changes in the device resistance. Most of the temperature rise is generated by the filament, not the capping layer. Therefore, the transfer and dissipation of heat to/from the capping layer crucially affect its temperature rise. If the heat from the filament is allowed to dissipate quickly, the capping layer temperature may be too low for any significant migration of oxygen ions, leading to small resistance changes.

A closer look at the varied thermal boundary conductance of the filament and capping layer interface (G_{filament/capping}) is needed to further understand the importance of the capping layer temperature. G_{filament/capping} is the only interface in Fig. 8(b) that shows an increase in the device resistance with an increase in G. This can be explained by G_{filament/capping} having a proportionally small effect on the filament temperature rise (from ≈1398 to ≈1293 K) but a much larger effect on the capping layer temperature rise (from ≈354 to ≈714 K), which, in turn, has a large effect on resistance change [Fig. 9(a)]. Figure 9(b) shows vacancy distributions after the reset pulse for the cases with G_{filament/capping} of 1 × 10⁵ and 1 × 10⁹ W m⁻² K⁻¹. For low G_{filament/capping}, a higher concentration of vacancies remains in the top portion of the filament and accumulates just above the filament in the titanium layer. In contrast, the high G_{filament/capping} allows for higher temperatures in the titanium layer, facilitating the migration of vacancies further from the filament. Remarkably, this suggests that reducing the capping layer temperature and confining the heat to the filament can reduce the large resistance change typically observed from the first reset pulse. Furthermore, by identifying the thermal properties with the greatest effect on the device resistance change, this study also identifies the thermal properties that should be measured with the greatest possible accuracy to aid in the engineering of RRAM devices. Therefore, this study calls for the development of novel measurement techniques capable of measuring thermal properties with nanoscale spatial resolution and high accuracy.⁶² 

In this study, we analyze the effects of the thermal environment on the magnitude of resistance changes in oxide-based RRAM devices during the first reset pulse. SThM was used to measure the top electrode temperature during steady-state measurements providing the basis for the reasonable estimates of thermal conductivities and thermal boundary conductances in our RRAM device. The estimated thermal properties were validated by comparing a comprehensive electro-thermal model with a top electrode temperature measured in situ with SThM during voltage pulsing. Furthermore, parametric studies of thermal conductivities and thermal boundary conductances in HfO_x neuromorphic devices identify the thermal conductivity of the capping layer as the most important thermal property in these devices. A low thermal conductivity capping layer, a low thermal boundary conductance between the capping layer and the top electrode, and a high thermal boundary conductance between the filament and the capping layer, all promote large resistance changes in the device due to the resulting higher capping layer temperature. Therefore, the novel guidance provided by this study is to thermal engineer oxide-based RRAM devices with a low capping layer temperature to mitigate undesirable large resistance changes during the first reset pulse. Furthermore, by identifying which thermal properties most critically affect the device behavior, we also highlight proper targets for novel, nanoscale, low uncertainty thermal property measurements of materials and interfaces that may change between the resistance states.

See the supplementary material for S1–S3, Table S1–S2, and Equations S1–S3. More information on the SThM calibration procedure and multiphysics model are available in the supporting information.

This work was supported by the Air Force Office of Scientific Research MURI entitled, “Cross-disciplinary Electronic-ionic Research Enabling Biologically Realistic Autonomous Learning (CEREBRAL)” under Award No. FA9550-18-1-0024. This work was performed in part at the Georgia Tech Institute for Electronics and Nanotechnology, a member of the National Nanotechnology Coordinated Infrastructure (NNCI), which is supported by the National Science Foundation (NSF) (No. ECCS-2025462). This material is based upon the work supported by the National Science Foundation Graduate Research Fellowship under Grant No. DGE-1650044.

The authors have no conflicts to disclose.

Matthew P. West: Conceptualization (equal); Data curation (equal); Formal analysis (equal); Investigation (equal); Methodology (equal); Writing – original draft (equal); Writing – review & editing (equal). Georges Pavlidis: Data curation (equal); Investigation (equal); Writing – original draft (equal); Writing – review & editing (equal). Robert H. Montgomery: Methodology (equal). Fabia Farlin Athena: Investigation (supporting); Methodology (supporting). Muhammad S. Jamil: Formal analysis (supporting); Validation (supporting). Andrea Centrone: Investigation (equal); Supervision (equal); Writing – review & editing (equal). Samuel Graham: Funding acquisition (equal); Supervision (supporting); Writing – review & editing (supporting). Eric M. Vogel: Funding acquisition (equal); Project administration (equal); Resources (equal); Supervision (equal); Writing – review & editing (equal).

The data that support the findings of this study are available from the corresponding author upon reasonable request.