Understanding and improving the contact resistance of two-dimensional materials for the fabrication of next-generation devices is of vital importance to be able to fully utilize the new physics available in these materials. In this work, eight different contact metals (Ag, Au, Cr, Cu, In, Mo, Ni, and Ti) have been investigated using the same sample of monolayer MoS2. Through the fabrication and testing of multiple, identically sized field-effect transistor devices per contact metal, we compensate for large variability in electrical properties of as-grown chemical vapor deposition MoS2 and deduce the relative performance of each metal. The general trend of lower work function metals having lower contact resistance holds with In, Ag, and Ti performing the best of the metals tested. Our results are compatible with recent research suggesting that the contact resistance in undoped, monolayer MoS2 is dominated by a lateral junction resistance, and we provide context for how this manifests in device-to-device variation. Multiple orders of magnitude differences in contact resistance are observed between metals and can be explained by this lateral barrier operating in the thermionic-field emission regime.
I. INTRODUCTION
Two-dimensional (2D) semiconductors are of interest to the electronic devices world as their 2D nature enables aggressively scaled devices and facilitates pristine or engineered interfaces.1–4 Molybdenum disulfide (MoS2) has become a prototypical 2D semiconductor and is widely available via various growth methods or by exfoliation from bulk crystals.5 However, field-effect transistor (FET) performance using 2D monolayers, like MoS2, as the semiconducting channel is often limited by the metal–semiconductor contact resistance (Rc).6–8 Ideally, the work function of the contact metal, compared to the electron affinity of the semiconductor, determines whether the metal–semiconductor contact is ohmic or Schottky. In practice, Fermi level pinning occurs at many semiconductor-metal interfaces,9 leading to a Schottky barrier that can be difficult to predict. Since current depends exponentially on the barrier height, understanding the pinning behavior is important to gain insight into device performance.10 For metal contacts evaporated onto MoS2, Fermi level pinning near the conduction band of MoS2 is observed.11,12 While efforts have been made to de-pin the interface via various buffer layers8,13,14 or performing stamping of metals,15 this has generally not led to a lower contact resistance than that attained via standard metal evaporation.16,17
Looking at the literature for contact metals to MoS2, one challenge is that it is often difficult to make accurate comparisons; published results incorporate different material growth processes, layer counts, dimensions, substrates/dielectric environments, fabrication processes, and testing procedures, and sometimes are limited in the data or details provided. Device-to-device variation in the channel material or contact can also further obscure results.
In the previous MoS2-metal interface research, there is also a relative lack of information when it comes to the contact resistance to monolayer MoS2. The contact nature is fundamentally different between monolayer and multilayer devices,6,8 requiring separate investigation for monolayers. Previous experiments on device contact resistance were often performed with mechanically exfoliated MoS2, and due to the difficulty of finding monolayer flakes, most studies on exfoliated MoS2 are limited in terms of investigating monolayer device performance. Alternatively, MoS2 grown via chemical vapor deposition (CVD) provides a reliable route to investigate large-area, monolayer MoS2.
Low resistance contacts are important at the monolayer limit for any application wishing to take advantage of the direct bandgap or lower off-current available in monolayer MoS2. Understanding metal contact performance as-deposited (that is, without additional processes like high-temperature annealing, doping, interfacial layers, etc.) is important for situations where those processing steps are unavailable or incompatible and to establish a baseline performance level before higher doping levels that typically improve electron injection.
Most previous work characterizes the metal-2D contacts in the thermionic emission regime at different temperatures to extract the Schottky barrier height. However, this barrier height extraction is prone to error18 and can be time-consuming, often lowering the number of devices represented in the data. On the other hand, when the devices are fully turned on and the contacts are operating in a regime with significant tunneling, room-temperature FET metrics such as current density may be extracted for multiple devices and should reflect the contact performance if devices are limited by the contact. Focusing on these room-temperature FET metrics allows us to quickly measure multiple devices to help compensate for the expected device variation when working with CVD MoS2.19
This study aims to provide an improved assessment of eight potential contact metals (Ag, Au, Cr, Cu, In, Mo, Ni, and Ti) evaporated onto monolayer MoS2 grown by CVD. We fabricate and test multiple back-gated FETs for each type of metal using the same starting CVD growth sample. FET metrics are compared to indirectly qualify the contact performance of each metal. We present our data with an emphasis on the need for multiple devices per metal to draw accurate conclusions and provide context for large device-to-device variability. Our data reinforce the high performance seen in the literature from Ti, In, and Ag contacts and provide practical information for constructing monolayer MoS2 devices with a scalable growth method and with widely available fabrication processes.
A. Interface considerations
The physical and chemical interaction between the metal and the MoS2 monolayer during metal deposition is an important factor. While lower work function metals have closer alignment with the conduction band for n-type semiconductors, they are also more reactive in general and come with additional processing considerations such as potential metal oxidation during the deposition process and metal reaction with the MoS2 layer.
Previous research by McDonnell et al.20 highlighted the importance of deposition conditions when it comes to evaporating Ti, as it can oxidize. Ti deposited at a pressure of <3 × 10−9 Torr did not oxidize and reacted with the MoS2 layer, while Ti deposited at 3 × 10−6 Torr oxidized during deposition and did not react with the MoS2 layer. In this study, our deposition pressure for Ti was ∼7 × 10−7 Torr, and the deposition rate was ∼2 Å/s, meaning our Ti layer was partially oxidized based on data provided in a study on Ti contact resistance to graphene.21 In another study with partially oxidized Ti on a monolayer material,16 they found evidence of metallic Ti, oxidized Ti, and Ti reacted with MoS2 using x-ray photoelectron spectroscopy.
While Ti and other low work function metals like Cr22 often react with the MoS2 layer upon deposition, Ag23 has been demonstrated to form epitaxially on the MoS2 crystal, and In layers were deposited without seeing any chemical interactions.24 Although Ag was not found to chemically react with the MoS2 layer, physical damage to the layer from the evaporation process was noticed by Shauble et al. They correlated the amount of damage induced by various metals to their melting point.16,25
Taking advantage of the low evaporation temperature of In, less physical damage to the MoS2 lattice is to be expected from In evaporation compared to most metals used as contacts. A clean In-MoS2 interface has been demonstrated via transmission electron microscopy with pure In26 and an In/Au alloy,24 both showing low contact resistance.
B. Other metals in literature
Similarly to In, another metal with low melting temperature, Sn, has demonstrated linear contact behavior at single-Kelvin temperatures27 and high current densities in FETs.28 For both In and Sn, the metals form as clusters on MoS2 during standard metal evaporation instead of a smooth metal film. To remedy this, samples are cooled during metal evaporation26,27 or rely on a subsequent deposition of Au to remelt Sn28 or alloy with In.24 Another report demonstrated using the semimetal bismuth deposited by e-beam evaporation as a contact to MoS2.17 The use of a semimetal contact changed the metal-induced gap states' character, raising the Fermi level into the conduction band for MoS2 beneath the Bi contact. While the low melting point metals limit the damage to the MoS2 monolayer, they come with considerations regarding processing incompatibility. Potential improvements to the thermal stability such as alloying with Au25 or using the semimetal Sb29 have been demonstrated so far.
This progress in evaporating metals with lower melting points to monolayer MoS2 is impressive; however, similar performance (linear IDS–VDS at 1.7 °K) has also been achieved with direct deposition of Ti(5 nm)/Au(65 nm) contacts.30 The recent demonstrations of good performance of In and Ti contacts agree with the results shown in this study, even though these metals are on the opposite side of the spectrum concerning their physical and chemical impacts on the MoS2 monolayer; the common denominator between the metals is their low work function.
II. EXPERIMENT AND METHODS
A. MoS2 growth and experimental plan
MoS2 growth took place in a tube furnace using elemental sulfur and molybdenum trioxide (MoO3) powder precursors. Sulfur powder was loaded into an alumina crucible placed upstream, out of the hot zone of the furnace. Another alumina boat in the center of the furnace had MoO3 powder spread along the base of the boat and four samples (15 × 16 mm2) placed across the top of the boat. The sulfur temperature (250 °C) was controlled via a heating tape, the furnace temperature was 700 °C, and the growth time was 10 min. More details on the growth process are provided in the supplementary material.
A single sample (15 mm × 16 mm2) of CVD-grown MoS2 was used to reduce the impact of growth variability on the results of this study. The sample was cleaved into four pieces, with two metals investigated per piece via back-gated FET performance (Fig. 1).
To further limit variation due to fabrication or testing procedures, devices were batch processed when possible, left in a nitrogen box when not in process, and were all tested at the same time. Transfer length measurement (TLM) structures and 600 nm FETs were fabricated to compare contact metal performance. A second FET design was also chosen with the purpose to keep the TLM devices exposed to only a low drain-source bias electric field (0.17–1 kV/cm) to prevent any impact from device heating or high electric fields, while the 600 nm FETs were used to investigate performance when exposed to higher lateral fields (83.3 kV/cm).
B. Device fabrication
Targeted lithography was performed at specific areas of clean, monolayer MoS2 via e-beam lithography (Vistec EBPG 5000+) using poly(methyl methacrylate) (950A4, MicroChem) and a base dose of 750 μC/cm2. Samples were developed in methyl isobutyl ketone/isopropyl alcohol (10 ml/25 ml) for 75 s and then dried with nitrogen. MoS2 channels were formed through reactive ion etching using a Cl2/O2 plasma process. Metals were deposited by e-beam or thermal evaporation after an overnight pump-down (10−6–10−7 Torr), followed by lift-off in acetone. To make sure we were using monolayer MoS2, we performed Raman and photoluminescence (PL) measurements to confirm the characteristic Raman peak separation and PL emission. Additional details on the optical characterization and metal evaporations can be found in the supplementary material.
C. FET design 1: TLM
The first design for measuring contact resistance was a TLM structure with a channel width of 5 μm; channel lengths of 1, 2, 3.5, and 6 μm; and a contact length of 2.5 μm (Fig. 2). In general, the metal-MoS2 contact geometry is classified as either a top contact, edge contact, or a combination of the two.6,31 The devices fabricated for this study have both, with the area of top contact and length of edge contact kept the same across each metal-MoS2 contact area. The drain–source current (IDS) was measured between each adjacent pair of contacts at a fixed drain-source bias (VDS) of 100 mV while sweeping the gate–source voltage (VGS) in 1 V steps from 0 to 70 V, down to −30 V, and back up to 0 V. From these IDS–VGS sweeps, we extract contact resistance (RcW, where W is the channel width) and sheet resistance (Rsh) via the TLM method,32 the maximum current through the 1 μm channel, and a field-effect mobility (μFE) for each channel length, all at a VGS of 70 V. Devices were compared at the highest gate voltage to mitigate differences in performance based on the variation of threshold voltages.
D. FET design 2: 600 nm FET
In this section, we use a FET with a shorter channel length (600 nm) and a larger channel width (10 μm) to investigate contact resistance. Traditionally, TLM devices are used to extract contact resistance; however, inconsistencies in the channel material and metal-MoS2 contact can make these measurements difficult to perform.4,18 A FET with a larger channel width/length ratio was also fabricated (Fig. 3), where details about the contact can be inferred from the total device resistance since the contact resistance is more dominant. The 600 nm FETs were tested by sweeping the VDS in 50 mV steps from 0 to 5 V, to −5 V, to 0 V at VGS voltages of 0, 20, 40, and 60 V. From these IDS–VDS sweeps, we extract an upper bound for contact resistance, maximum current, and IDS–VDS linearity at a VGS of 60 V.
E. Electrical characterization
All devices were tested together, in the dark, in a Lake Shore vacuum probe station at a pressure around 1 μTorr. A Keithley 4200-SCS was used to perform the electrical measurements. A 48-h vacuum anneal at 400 °K was done to limit the impact of ambient molecules such as water and oxygen on FET performance.33 Only post-anneal data are used in this main text, and more details about the impact of the anneal on FET performance can be found in the supplementary material.
III. RESULTS AND DISCUSSION
This section includes the results of the FET testing, followed by a discussion covering a comparison of the metals investigated and a model to describe contact resistance variation.
A. Results: FET design 1 (TLM)
The IDS–VGS curves (Fig. 2) for all contact metals show n-type behavior, indicative of the expected pinning near the conduction band. TLM devices where the channel length dependence of the total resistance was sufficiently linear (with the linear regression parameter r2 > 0.85) were used to extract sheet resistance [Fig. 4(a)] at a VGS of 70 V. Ni and Cu contacts had fewer acceptably linear devices, and Cr had none, implying highly inconsistent contact behavior for these metals. The extracted sheet resistances vary within each metal, but across metals, the values overlap in the hundreds of kΩ to single MΩ range. The contact resistance, on the other hand, shows significant differences when changing contact metals [Fig. 4(b)]. For TLM devices with either insufficient linearity or a negative y-intercept, an upper bound for the contact resistance was estimated by using half of the total resistance for the smallest channel length (1 μm).34 The contact resistance was normalized to the contact width (5 μm) to get units of Ω μm. Clearly, the large difference in contact resistance (multiple orders of magnitude) cannot be explained by the variation of measured sheet resistances. For example, the extracted sheet resistances for Mo and Ni fall within the range of extracted sheet resistances of In and Ti [Fig. 4(a)]; however, the contact resistances extracted for Mo and Ni are all significantly larger than the extracted contact resistances of In and Ti [Fig. 4(b)]. Combined with the large separation in total current between the metals [Fig. 4(c)], this indicates that the contact resistance, not the sheet resistance, is the main factor determining device performance. Looking at contact resistance vs the metal work function, a general trend arises of lower work function metals having lower contact resistance (a caveat here for all plots involving metal work function is that the Au layer had a 1 nm adhesion layer of Ti deposited but is plotted using Au's work function). The order of magnitude variation within devices using the same contact metal corresponds to the differences in metrics such as threshold voltage, mobility, and contact resistance. However, the three to four order of magnitude changes across metals takes the previously mentioned variability and superimposes it on the top of the exponential dependence that RcW has on Schottky barrier height, which depends on the contact metal.
The contact resistance plot [Fig. 4(b)] includes data extracted via two different techniques, the TLM method and half of smallest channel resistance approximation. To get a direct comparison, we plot the maximum current flowing through the smallest channel length at VGS = 70 V [Fig. 4(c)]. The maximum current plot qualitatively looks very similar to the inverse of the contact resistance plot, as expected. Additionally, as desired, the differences between metal performance spread out as the channel length decreases (see supplementary material), indicating the higher influence of the contact resistance. This provides validity to our assumption that the MoS2 material is of similar enough quality across samples and that the contact is the dominating variable, given the large differences in contact resistance and current measured.
While the contact resistance and maximum current metrics provided insight into contact metal performance, the number of data points was limited and relied heavily on either the linearity of the TLM method or the performance of the smallest channel length. Therefore, to get a performance metric for every channel length, two-terminal field-effect mobility for the TLM devices was extracted for each neighboring pair of contacts at a gate voltage of 70 V [Fig. 4(d)] using the formulas:
where L is the channel length, W is the channel length, is the gate-channel capacitance per unit area, is the relative permittivity of the gate dielectric (3.9), is the permittivity of free space (8.854 × 10−12 F/m), and is the gate dielectric thickness (220 nm).
B. Results: FET design 2 (600 nm FET)
The IDS–VDS curves (Fig. 3) for all metals were highly linear over the range of ±0.5 V (Fig. S5 in the supplementary material), agreeing with results seen in the literature. As others have noted, the linear behavior of the IDS–VDS curves does not mean that a Schottky barrier is absent.11 In our devices, although the data are linear for every contact metal, the slope of the line (1/resistance) varies by —two to three orders of magnitude. The maximum current for the FETs was taken at VDS = 5 and VGS = 60 V [Fig. 5(a)].
An upper bound for the contact resistance in the FETs was estimated in a similar manner at a gate voltage of 60 V by using half of the total resistance [Fig. 5(b)]. For these FETs, the total resistance was calculated by fitting the slope of the IDS–VDS curve in the region of −0.5 V ≤ VDS ≤ 0.5 V. The fitting of this slope was also used to characterize the linearity of the contact conduction [Fig. 5(c)]. The deviations away from linear IDS–VDS behavior in Cr, Ni, and Cu seen in Fig. 5(c) coincide with the inability to get multiple accurate TLM results [Fig. 4(a)]. A compilation of device data and statistics can be found in Table I.
Metal . | ΦM (eV) . | TLM . | 600 nm FET . | ||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
μFE (cm2/V s) . | IMax (μA/μm) . | RcW (kΩ μm) . | R2 . | . | |||||||||||||||
Med. . | . | Max . | Min . | n . | Avg. . | . | Max . | Min . | Avg. . | . | Max . | Min . | Avg. . | . | Max . | Min . | n . | ||
In | 4.12 | 6.9 | 1.6 | 25.1 | 2.2 | 19 | 22.4 | 8.9 | 57.5 | 5.2 | 305 | 99 | 623 | 48 | 0.999 88 | 9.3 × 10−5 | 0.999 99 | 0.999 46 | 5 |
Ag | 4.26 | 4.3 | 0.7 | 13.4 | 0.7 | 23 | 15.4 | 4.0 | 36.1 | 3.0 | 435 | 138 | 1 188 | 87 | 0.999 87 | 3.9 × 10−5 | 0.999 99 | 0.999 69 | 8 |
Ti | 4.33 | 5.9 | 0.7 | 11.0 | 1.6 | 13 | 42.5 | 13.5 | 71.2 | 11.9 | 92 | 30 | 163 | 32 | 0.999 98 | 4.8 × 10−6 | 0.999 99 | 0.999 97 | 4 |
Cr | 4.5 | 0.9 | 0.6 | 11.3 | 0.1 | 30 | 3.5 | 0.3 | 4.4 | 2.7 | 2 200 | 454 | 3 251 | 838 | 0.985 52 | 0.00 63 | 0.998 11 | 0.968 64 | 4 |
Mo | 4.6 | 1.3 | 0.2 | 5.2 | 0.0 | 31 | 0.3 | 0.1 | 0.6 | 0.1 | 27 137 | 9 786 | 67 696 | 8 839 | 0.997 27 | 0.000 32 | 0.998 52 | 0.996 38 | 5 |
Cu | 4.65 | 1.9 | 0.8 | 13.1 | 0.4 | 20 | 4.5 | 0.6 | 6.8 | 3.1 | 530 | 55 | 753 | 299 | 0.999 51 | 0.000 30 | 0.999 99 | 0.998 06 | 6 |
Au | 5.1 | 2.0 | 0.2 | 4.0 | 0.3 | 18 | 11.6 | 3.0 | 24.8 | 1.7 | 250 | 82 | 620 | 93 | 0.999 80 | 0.000 13 | 0.999 99 | 0.999 11 | 6 |
Ni | 5.15 | 0.2 | 0.1 | 1.5 | 0.0 | 18 | 0.9 | 0.3 | 1.8 | 0.4 | 14 549 | 4 617 | 25 771 | 1 586 | 0.989 51 | 0.004 54 | 0.999 99 | 0.971 94 | 5 |
Metal . | ΦM (eV) . | TLM . | 600 nm FET . | ||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
μFE (cm2/V s) . | IMax (μA/μm) . | RcW (kΩ μm) . | R2 . | . | |||||||||||||||
Med. . | . | Max . | Min . | n . | Avg. . | . | Max . | Min . | Avg. . | . | Max . | Min . | Avg. . | . | Max . | Min . | n . | ||
In | 4.12 | 6.9 | 1.6 | 25.1 | 2.2 | 19 | 22.4 | 8.9 | 57.5 | 5.2 | 305 | 99 | 623 | 48 | 0.999 88 | 9.3 × 10−5 | 0.999 99 | 0.999 46 | 5 |
Ag | 4.26 | 4.3 | 0.7 | 13.4 | 0.7 | 23 | 15.4 | 4.0 | 36.1 | 3.0 | 435 | 138 | 1 188 | 87 | 0.999 87 | 3.9 × 10−5 | 0.999 99 | 0.999 69 | 8 |
Ti | 4.33 | 5.9 | 0.7 | 11.0 | 1.6 | 13 | 42.5 | 13.5 | 71.2 | 11.9 | 92 | 30 | 163 | 32 | 0.999 98 | 4.8 × 10−6 | 0.999 99 | 0.999 97 | 4 |
Cr | 4.5 | 0.9 | 0.6 | 11.3 | 0.1 | 30 | 3.5 | 0.3 | 4.4 | 2.7 | 2 200 | 454 | 3 251 | 838 | 0.985 52 | 0.00 63 | 0.998 11 | 0.968 64 | 4 |
Mo | 4.6 | 1.3 | 0.2 | 5.2 | 0.0 | 31 | 0.3 | 0.1 | 0.6 | 0.1 | 27 137 | 9 786 | 67 696 | 8 839 | 0.997 27 | 0.000 32 | 0.998 52 | 0.996 38 | 5 |
Cu | 4.65 | 1.9 | 0.8 | 13.1 | 0.4 | 20 | 4.5 | 0.6 | 6.8 | 3.1 | 530 | 55 | 753 | 299 | 0.999 51 | 0.000 30 | 0.999 99 | 0.998 06 | 6 |
Au | 5.1 | 2.0 | 0.2 | 4.0 | 0.3 | 18 | 11.6 | 3.0 | 24.8 | 1.7 | 250 | 82 | 620 | 93 | 0.999 80 | 0.000 13 | 0.999 99 | 0.999 11 | 6 |
Ni | 5.15 | 0.2 | 0.1 | 1.5 | 0.0 | 18 | 0.9 | 0.3 | 1.8 | 0.4 | 14 549 | 4 617 | 25 771 | 1 586 | 0.989 51 | 0.004 54 | 0.999 99 | 0.971 94 | 5 |
C. Discussion
1. Metal comparison
The three lowest work function metals (In, Ag, and Ti) consistently performed the best across all the metrics and biasing regimes tested. This generally agrees with what is expected via the simple metal–semiconductor band alignment model [Fig. 5(d)] and the pinning factors measured.11,12,15
Au, on the other hand, has been demonstrated as a good contact choice even with its relatively high work function.37 In the present study, devices with Au contacts also perform well, but not as good as devices with Ti contacts (as mentioned previously, in our “Au” devices, we deposited a 1 nm adhesion layer of Ti prior to Au deposition). A similar conclusion was also reached in another study, with In/Au and Sn/Au contacts leading to FETs with lower contact resistance and higher overall current than FETs with pure Au contacts.25
Cr and Ni are both common choices for contacts to MoS2; however, the relative performance between metals varies substantially across the literature. For example, in studies that perform Schottky barrier height measurements for multiple devices to compare Ti or Cr contacts, both Ti38 and Cr12 have been demonstrated to have a smaller barrier. Possible reasons for different barrier heights include the importance of oxidation when depositing the metal20 or the impact of edge contacts.39
Also contradictory is the performance of Ni contacts; in our study, Ni had the second-lowest current, whereas other studies have shown Ni contacts carrying one hundred times more current than Ti.17 While the specific cause for this discrepancy is unclear, we note that significantly improved FET performance with Ni contacts was observed when fabricating devices on the transferred material instead of the as-grown material40 and that Ni edge contact performance was correlated to the gases the MoS2 edges were exposed to during processing.41 Additionally, the non-flat nature of Ni deposited by physical vapor deposition onto MoS2 was shown by other researchers and the importance of metal wettability on MoS2 was highlighted as a future area to explore further.42
Mo contacts were touted in 2014;43 however, few results were published using Mo contacts afterward and our devices did not achieve the same high-quality contact behavior.
Cu is another potential metal contact with limited device information available in the literature, but the available data generally agree with the results of our study. The authors of Ref. 15 saw FETs with Cu contacts carry less current than FETs with Ag or Au contacts but more than Pt contacts.15
To the best of our knowledge, this study represents the largest number of metals directly compared via electrical measurements of monolayer MoS2 FETs. Given that the performance of metals is often contradictory throughout the literature or has limited comparisons, we hope that our data can serve as a valuable reference point for others, and we believe the processing performed in our experiments is widely available to many researchers. While our devices were fabricated for the purpose of comparing metal performance and lack the necessary carrier density to compete with state-of-the-art monolayer contact resistance and current density metrics, we, nonetheless, provide a comparison with that data in the supplementary material.
2. Contact resistance variation
Significant device-to-device performance discrepancies are not uncommon in monolayer CVD MoS2 FETs. For example, Alharbi et al.19 determined that increased interaction with the substrate degrades the performance and increases the variability of monolayer MoS2 transistors. This substrate coupling and variability were highest for the as-grown material and decreased once transferred from the growth substrate. While many factors can impact the overall device performance, this discussion focuses on the impact of the contact.
To provide a possible explanation for the large variation in contact resistance seen in our results, we discuss the impact of a variable Schottky barrier height. The electron transport at the metal–MoS2 junction can be convoluted due to different contact geometries and possible interface reactions. However, according to some theoretical work, the monolayer MoS2 under the metal contacts is often metalized, leading to no vertical Schottky barrier.44 Other work has suggested that at the monolayer limit, the current flow under the metal contact is heavily suppressed and current injection into monolayers is mainly occurring at the edge of the metal contact.31,45 Elucidating the exact nature of the barrier and its location is beyond the scope of this paper,46 but the assumption of one dominating lateral Schottky barrier helps simplify the situation to model contact resistance variation.
For bulk metal–semiconductor Schottky barriers, a characteristic tunneling energy can be expressed as9
where q is the elementary charge, is the reduced Planck constant, N is the doping concentration, m is the tunneling effective mass, and is the permittivity of the semiconductor. The intuition behind the equation for is that as doping increases, the width of the Schottky barrier or the depletion region narrows, increasing the likelihood of tunneling. The value of relative to the thermal energy determines the barrier transport regime of operation and analytical expressions for the contact resistance as a function of barrier height and have been derived.47–49 However, applying this analysis to a metal-2D junction is not straightforward. For example, a scanning photocurrent microscopy study in 2015 tried using the standard 3D equation for Schottky barrier width to extract carrier density but noted their extracted densities did not match the expected carrier density based on their FET electrostatics.50 This implied the inaccuracy of using the standard bulk equation for metal-2D junctions. Nonetheless, this approach is still commonly used in the literature. The impact of reduced dimensionality on the depletion region width has been studied, with the main result being that the depletion width changes from having a dependence in 3D to a dependence in 2D, where is the sheet charge density.51,52 While calculating from N, , and m requires many assumptions (to best of our knowledge, this framework has not been fully developed), has been used to fit experimental data.
Alharbi and Shahrjerdi53 fit their monolayer MoS2 FET data of Rc vs Schottky barrier height and Rc vs temperature and extract to be around 24 meV at a carrier density of 7.5 × 1012 cm−2. Their data are useful as a comparison to the data presented in this paper, as a carrier density of 7.5 × 1012 cm−2 corresponds to an overdrive voltage of 76.5 V in our devices. For thermionic-field emission (thermally assisted tunneling, ), the contact resistance can be expressed as9,49
where is the Schottky barrier height. When increases beyond , the denominator of the exponential in Eq. (4) approaches , leading to the expression for field emission, whereas when decreases below , the denominator approaches , leading to the expression for thermionic emission. We see that a small difference in barrier height leads to an exponential difference in contact resistance and plot the contact resistance vs the range of experimentally reported Schottky barrier heights for [Fig. 6(a)]. Since Eq. (4) is a proportional expression, the specific y-axis values in Fig. 6(a) are non-critical; we chose the pre-exponential factor of Eq. (4) to be unity for simplicity. An order of magnitude change in contact resistance is equivalent to a 76 meV change in .
At this point, it is worthwhile to briefly revisit previous research on the causes in the variation of the metal–MoS2 interface and possible amounts of barrier height variation. McDonnell et al.54 studied the intrinsic defects in MoS2 via scanning probe techniques, noticed significant changes in the current at defect locations, and developed a parallel conduction model to show the impact of defect areal density on electrical properties. Bampoulis et al.55 characterized the normal areas of MoS2 (filled with sulfur vacancies) and “metal-like” defect sites via conductive atomic force microscopy, extracting a pinning factor, S, of 0.3 and 0.1, respectively. Moon et al.56 showed that a Gaussian distribution of Schottky barrier heights fits their data more closely. They showed that top-contacted devices have a larger variation in barrier height (σs = 93.8 meV) compared to edge-contacted devices (σs = 49.0 meV). Xie et al.38 extracted the Schottky barrier heights for many monolayer FETs using Cr or Ti contacts, extracting a range of 70–140 meV for Ti and 120–290 meV for Cr. Based on this, the contact resistance changing by an order of magnitude within a subset of devices using the same metal is not unreasonable. Looking now at the case for different metals evaporated on MoS2, a typical pinning factor around 0.1 is found,11,12,15 but the range of barrier heights is 150–300 meV. This corresponds to a two to four orders of magnitude difference in contact resistance, which is in line with the results shown in this paper. An exponential fit to the TLM data using Eq. (4) and results in a pinning factor of 0.093 [shown in Fig. 6(b)]. We stress that this model of contact resistance vs Schottky barrier height is an approximation, but nonetheless, it serves as a valuable reference point in terms of both expected variation and also for useful qualitative intuition (for example, as doping increases, the performance difference between contacts with different barrier heights becomes less noticeable49) based on recent research into how contacts operate at the monolayer limit.31,46
IV. CONCLUSIONS
In summary, we evaporated eight different metals (Ag, Au, Cr, Cu, In, Mo, Ni, and Ti) onto monolayer MoS2 grown by CVD to investigate their performance in two different FET structures as metal contacts. All metals showed n-type conduction, indicative of the common Fermi level pinning upon metal evaporation. The lower contact resistance measured in the low work function metals (Ag, In, and Ti) agrees with results in the literature. Significant variation in device-to-device performance was observed, requiring the characterization of multiple FETs to determine the relative performance of each contact metal. By using reported values of Schottky barrier heights for metal-MoS2 contacts and a characteristic tunneling energy extracted in the literature from devices with a carrier density similar to the devices in this study, we were able to develop a simple semi-quantitative model to provide a possible explanation for the large difference in device performance between different metal contacts. This model is based on a single, lateral barrier operating in the thermionic-field emission regime and is consistent with recent research on how contacts to monolayer MoS2 operate.
SUPPLEMENTARY MATERIAL
See the supplementary material for more details on the MoS2 growth process, separate material characterization, deposition details for each metal, the impact of the probe station anneal, a comparison between the shortest and longest channel of the TLM structure, example IDS–VDS curves at low biases showing the linear behavior, and a comparison with state-of-the-art contact research in the literature.
ACKNOWLEDGMENTS
Research was supported by the Army Research Laboratory and was accomplished under Cooperative Agreement No. W911NF-22-2-0029. The views and conclusions contained in this document are those of the authors and should not be interpreted as representing the official policies, either expressed or implied, of the Army Research Laboratory or the U.S. Government. The U.S. Government is authorized to reproduce and distribute reprints for Government purposes notwithstanding any copyright notation herein.
AUTHOR DECLARATIONS
Conflict of Interest
The authors have no conflicts to disclose.
Author Contributions
A. Mazzoni: Conceptualization (equal); Formal analysis (lead); Investigation (lead); Methodology (lead); Visualization (lead); Writing – original draft (lead); Writing – review & editing (equal). R. Burke: Investigation (supporting); Resources (lead); Visualization (supporting); Writing – review & editing (supporting). M. Chin: Investigation (supporting); Resources (supporting); Writing – review & editing (supporting). S. Najmaei: Conceptualization (equal); Formal analysis (supporting); Writing – review & editing (equal). M. Dubey: Funding acquisition (lead); Supervision (equal); Writing – review & editing (supporting). N. Goldsman: Conceptualization (equal); Supervision (equal); Writing – review & editing (equal). K. Daniels: Conceptualization (equal); Supervision (equal); Writing – review & editing (equal).
DATA AVAILABILITY
The data that support the findings of this study are available from the corresponding author upon reasonable request.