Analysis of square-law detector for high-sensitive detection of terahertz waves

In recent years, there has been an increasing interest in the use of terahertz (THz) waves in many fields, such as high-speed communication,¹ security,² and drug discovery.³ In addition to high resolution, terahertz waves penetrate into several materials, such as plastic, ceramic, and clothing.⁴ Furthermore, the absorption spectra of most chemical substances are present in terahertz frequencies.⁵ Therefore, imaging utilizing terahertz frequencies is highly attractive.

Some reports described terahertz imaging by mechanical scanning.^4,6,7 A terahertz spectroscopic imaging visualized and identified chemical substances contained in a compressed tablet.⁴ 0.65 THz waves were detected by Si-MOSFETs and revealed contents of a paper envelope such as a key ring, a cellophane tape, and a grape-sugar bar.⁶ Imagers using Schottky diodes for the detection of 0.28 THz and 0.86 THz waves were able to visualize contents of a floppy disk.⁷ However, mechanical scanning requires a large amount of time, for example, approximately 7 h to obtain one picture.⁴ Developing a real-time terahertz imaging device operating at room temperature has remained a challenge owing to a lack of sensitivity of detectors. There have been proposed novel device structures such as plasmonic detectors^8–10 and unipolar nanodiodes.¹¹ Among various terahertz wave detectors, square-law detectors composed of an FET are attractive, because they can be easily implemented in CMOS and other FET circuits. In fact, we have recently developed a square-law detector using a HEMT that is capable of detecting 1.0 THz waves.¹² To design and implement high-sensitive detectors for real-time imaging, a circuit model that describes the responsivity of an FET and its dependence on design parameters, such as the channel width/length, is required. The responsivity of an FET to terahertz waves has been analyzed using hydrodynamic equations.¹³ The model well describes the output voltage of an FET when measured under the open-output condition. However, FET should drive an external circuit in an imaging device, where the magnitude of the output signal becomes dependent on the device design.¹⁴ 

In this paper, we develop a circuit model of the square-law detector, where damping of the signal traveling in the channel from the source to the drain and the presence of the external circuit are taken into account. The analysis reveals that subthreshold slope and gate length in addition to the carrier mobility of FETs are key parameters to improve the sensitivity of the detector. Experiments are conducted to detect 1.0 THz waves using our newly developed HEMT detectors on glass, which verify the validity of the model.

Under the condition where the cutoff frequency of an FET is well above the frequency of the input signal, a circuit of the square-law detector is drawn using a lumped constant circuit, as in Fig. 1(a). In this case, the quasistatic (QS) analysis can be applied to derive the output signal. The external coupling capacitor between the gate and the drain provides the longitudinal voltage. Meanwhile, when a signal whose frequency is above or similar to the cutoff frequency, the FET is described by a distributed constant circuit, as in Fig. 1(b). At higher frequencies, the internal gate-insulator capacitor provides the longitudinal voltage, while at lower frequencies the coupling capacitor between the gate and the drain does so.⁶ In this case, the circuit becomes nonquasistatic (NQS), and the input signal may damp as it travels from the source to the drain. Time evolution of the potential distribution in the channel of FET has been investigated by applying a distributed constant circuit and in the way described in Ref. 6. The detailed way applied for the calculation is described in  Appendix A, and the parameters used for the calculation are described in Sec. IV. It is noteworthy that the distributed constant circuit is equivalent to the nonresonant detection¹⁴ of the Dyakonov–Shur theory based on the hydrodynamic Euler equation and the continuity equation.^15,16

The mobility of carriers in the InAs channel HEMT described in the following section is 3200 cm$2$/V s, which gives the momentum relaxation time of carriers $τ=42$ fs from the relation $τ=mμ/q$⁠, where $m$ is the effective mass (⁠$m=0.023m0$ for InAs where $m0$ is the electron rest mass), $μ$ is the mobility, and $q$ is the elementary charge. For 1.0 THz waves, $ωτ=0.26<1$⁠, where $ω$ is the angular frequency. Thus, the analysis in the nonresonant regime is reasonable.

When gate voltage $Vg$ of the FET is biased near the threshold voltage $Vth$ where the maximum output is obtained,^6,12,13 the diffusion current component in addition to the drift component may contribute to the total current. Therefore, the calculation of the potential distribution in the channel was carried out for these two current components. Figures 2(a) and 2(b) show the calculated gate to channel potential distributions at $Vg=Vth$ for the drift and the diffusion component, respectively. In the calculation, the carrier mobility was assumed to be 3200 cm$2$/V s, and the channel length was set at 0.4 $μ$m. In general, diffusion is a slower process than drift; therefore, the signal propagation of diffusion [Fig. 2(b)] is delayed compared to that of drift [Fig. 2(a)]. However, even the drift component of the rf signal damps within the distance approximately 0.2 $μ$m from the source. This suggests that signal mixing that produces dc component from rf signal takes place in the region near the source side, and the rest of the region in the drain side only provides a pathway for the dc signal to the drain end.

Based on this knowledge, we build a circuit model for the NQS condition. Under the QS condition, an equivalent circuit of square-law detectors for dc components is drawn as shown in Fig. 3(a). The dc current source $I$ is composed of drift component $Idri$ and diffusion component $Idif$⁠. Derivations of equations for $Idri$ and $Idif$ starting from the unified charge control model (UCCM)¹⁷ are described in  Appendixes B and C, respectively. The two components of the channel conductance, $Gdri$ and $Gdif$⁠, are also derived from the UCCM. From the current and conductance, the dc output voltage of drift and diffusion components, $Vdri$ and $Vdif$⁠, are described as follows:

where $VRF$ is the amplitude of input rf signal, and $S$ is the subthreshold slope of the FET. It is noteworthy that Eq. (1) is identical to the equation derived by Knap et al.¹³ for a gate-leakage-free FET from the hydrodynamic Euler equation. It is also noted that the generation of the dc signal from the diffusion component is owing to the nonlinearity of the gradient of the channel carrier density, $dn/dx$⁠, induced by the gate voltage. Thus, the output voltage obtained under the open-output condition is a function of the subthreshold slope but independent of the device geometry such as the gate length $L$⁠. The improved voltage responsivity with $S$ has been verified using a dynamic threshold voltage MOSFET.¹⁸ 

Under the NQS condition, an equivalent circuit of the detector can be drawn like Fig. 3(b), where conductance is added in series in the output path to the drain. This additional parasitic conductance is the channel conductance in the region of the drain side where the rf amplitude damps and, therefore, no mixing takes place. The dc current source, the conductance in the mixing region, and the parasitic conductance are evaluated for the drift and diffusion components. The length of the mixing region is defined as exponential decay, where the amplitude of the gate to channel potential becomes $1/e$ times that of input signals. The mixing lengths of drift and diffusion in this case are evaluated to be $Ldri=85$ nm and $Ldif=55$ nm, respectively. The conductances can be expressed as follows using the formulae described in  Appendix B. $Gmdri$ is the conductance associated with mixing where $L=Ldri$ in Eq. (B11). $Gpdri$ is the parasitic conductance where $L$ is replaced with $L−Ldri$⁠. $Idri$ is determined by mixing and, therefore, it associates only with $Gmdri$⁠. In other words, $Gpdri$ causes a voltage drop. The diffusion current component is similarly described. Besides, the load resistance or conductance $Gload$ that detects output signals is connected with the circuit of the detector. Consequently, the equivalent circuit of square-law detectors taking drift, diffusion, and load resistance into consideration is drawn as shown in Fig. 4.

From the superposition principle, dc current $Id$ detected by the load resistance is given by

where $Gdri$ and $Gdif$ are Eqs. (B11) and (C3), respectively. Voltage $Vd$ applied to the load resistance is described by

Because voltage responsivity $Rv$ is determined from the output voltage and the input power $Pin=VRF2/Rin$⁠, where $Rin$ is the real part of the detector input impedance,

$Gdri$(⁠$Gdif$⁠) includes the influence of $Gmdri$(⁠$Gmdif$⁠) and $Gpdri$(⁠$Gpdif$⁠) when the thermal noise is considered. Therefore, NEP is given by

Thus, Eq. (6) becomes

Equations (3)–(7) show the complete set of equations describing detection characteristics considering all circuit components. Although the effects of an external load resistance were discussed,¹⁹ we also clarify the influence of parasitic resistances inside the detector. In addition, our analysis can express how much drift and diffusion contribute to each characteristic. The first term on the right side of Eqs. (3)–(7) represents the contribution of drift, and the second indicates that of diffusion. Equation (4) suggests that the output voltage also depends on the ratio of mixing length to gate length as a result of considering the channel conductance being composed of mixing conductance and parasitic one, while there is no dependence of $L$ in Eqs. (1) and (2). In addition, Eqs. (3)–(7) become the QS model if $Ldri=L$ and $Ldif=L$⁠.

Figure 5(a) shows a schematic illustration of the cross section of the fabricated device. A double-barrier InAs quantum-well (QW) HEMT on quartz was fabricated. The transistor has the gate dielectric made of aluminum oxide such as a MOSFET. Therefore, the transistor is hereafter designated as MOS-HEMT. The device was fabricated using the layer transfer technology,²⁰ where the epitaxial layer was transferred from an InP substrate to a quartz substrate using the direct bonding technique. The detector has a two-finger gate topology. To implement the gate/drain coupling capacitor $Cgd$⁠, the gate electrode was partially overlapped to the drain. However, the experimental results showed that the change in the gate-drain overlap length did not affect the detection performance, which indicates that the internal gate-insulator capacitance provides the longitudinal voltage. Figure 5(b) shows a photograph of a detector with dc signal terminals (⁠$Vg$⁠, $Vout$⁠, and $VGND$⁠) and contact pads for the ground-signal-ground (GSG) THz probe. The dc blocking capacitor $Cblock$ was also implemented using the metal/insulator/metal structure. The InAs QW MOS-HEMT on quartz indicated a maximum transconductance $gmmax$ of 29.5 mS/mm. The effective gate-oxide capacitance was carefully measured with a capacitance-voltage method. The peak electron mobility was 3200 cm$2$/V s, which is approximately five times higher than that of Si MOSFETs, as shown in Fig. 6.

Figure 7 shows the schematic of the measurement setup for the detection of 1.0 THz waves. Terahertz waves were generated by a signal generator (Keysight, N5173B EXG) (⁠$f0=12.35$ GHz) and $×$81 frequency multiplier (Virginia Diodes Inc., WR1.0SGX). The 1.0 THz wave was modulated in amplitude at 100 kHz frequency $fmod$⁠. The modulated signal was input to the pad extended from the gate of the device through the GSG THz probe (Cascade Microtech Inc., T1100-GSG-25). External dc gate bias can be applied to adjust the detection point by changing the channel conductance. The drain current response (I mode) and voltage response (V mode) were measured with a lock-in amplifier (NF, LI5660), while sweeping dc gate voltage. We found that the potential of the G of the GSG probe was slightly different from the potential of the ground of the measurement system. Therefore, as shown in Fig. 5(b), we made a slit in each of the metallization connected to G to isolate the ground lines of GSG THz probe from the dc ground terminal, while the signal line of GSG THz probe was connected to the gate of the FET. The input power of terahertz waves was carefully measured. For example, transmission losses of the terahertz probe, the coplanar waveguide, the slit incorporated ground, and the gate coupling capacitor were experimentally evaluated and taken into account. Consequently, the input power of 1.0 THz waves was evaluated to be $−49$ dBm.

Theoretical consideration conducted in Sec. II is verified by comparing the measured detection characteristics with the calculated ones using Eqs. (3)–(7). The static characteristics of the transistor are measured by sweeping the dc gate voltage and applying 0.05 V at the drain. The obtained transistor and device parameters are summarized in Table I. The parameters are applied for the calculation. The input impedance $Rin$ is assumed to be 4 k$Ω$⁠. Figure 8 shows the comparison between the measured results (solid line) and calculated ones (dashed line). Figure 8(a) shows the output current and voltage of the detector as a function of dc gate voltage $Vg$⁠. The horizontal axis is $Vg$⁠. The vertical axis is the dc current and voltage appeared at the drain of a MOS-HEMT. The maximum outputs are found near the threshold voltage $Vth$⁠. Voltage responsivity was evaluated by taking the input power of terahertz waves into consideration. NEP was evaluated from the voltage responsivity and the internal resistance of the MOS-HEMT. Figure 8(b) shows voltage responsivity and NEP as a function of $Vg$⁠. The maximum voltage responsivity and minimum NEP also appear near $Vth$⁠. The comparisons prove that our theoretical analysis expresses the detection characteristics of the square-law detector well.

Figure 9 shows the calculated contribution of both drift and diffusion to the drain output. These results indicate that both drift and diffusion affect detection characteristics, while the contribution of drift is greater than that of diffusion. The reason is that diffusion is a slower process than drift, as described.

The dependence of the sensitivity on transistor parameters, such as subthreshold slope and gate length, is investigated. In the following, the change in the output voltage with transistor parameters is examined.

First, to confirm the effect of the subthreshold slope, detection tests were conducted using MOS-HEMTs with the same structure, such as a ratio of the gate width to the gate length $W/L=80$ $μ$m$/0.4$ $μ$m, but subthreshold slopes ranging from about 100 mV/dec to about 200 mV/dec. Figure 10(a) shows the switching characteristics of MOS-HEMTs that have the smallest or the largest subthreshold slope in test devices. The MOS-HEMTs show on/off current ratio over five decades.

The smallest subthreshold slope among five transistors was 105 mV/dec. Meanwhile, the largest subthreshold slope was 202 mV/dec. Figure 10(b) shows the response characteristic of these transistors (i.e., square-law detectors) to 1.0 THz waves. The results clearly indicate that the use of the MOS-HEMT that has a smaller subthreshold slope gives a higher output voltage.

Figure 11(a) shows the variation of the maximum voltage responsivity with the subthreshold slope, $S$⁠, of the transistor. The plots are measured values and the dashed line is the fitted curve according to the theoretical analysis described in Sec. II. Figure 11(b) shows the minimum NEP plotted as a function of $S$⁠. Similarly, the plots are measured values and the line is a fitted curve. The results clearly demonstrate that NEP decreases, i.e., improves with the decrease of $S$⁠. Thus, the results in Fig. 11 prove that a small subthreshold slope leads to a high-sensitive detection.

Next, MOS-HEMTs with gate lengths of 0.4, 0.6, 0.8, and 1.0 $μ$m were fabricated to investigate the effect of the gate length on the sensitivity of the detector. The subthreshold slope of these MOS-HEMTs was approximately 110 mV/dec. Therefore, the effect of the subthreshold slope is negligible. Figure 12 shows the output voltage of each detector as a function of $Vg−Vth$⁠. Figure 12 obviously indicates that a shorter gate length leads to a higher output voltage. From these results, the maximum voltage responsivity and minimum NEP are evaluated in Fig. 13. The curves in Figs. 13(a) and 13(b) are curves fitted using the analytical results. These results also demonstrate that a short gate length improves the sensitivity of square-law detectors.

The dependence of detection characteristics on the subthreshold slope and the gate length can be described as follows. The subthreshold slope can improve the output of the detectors. The current of an FET that has a small subthreshold slope increases sharply near the threshold voltage. The significant characteristics, such as maximum voltage responsivity and minimum NEP, are also obtained in this region, as shown in Fig. 8(b). This means that the effect of nonlinearity in the transfer characteristic of an FET is high near the threshold voltage. In other words, the ac output of an FET with a steep slope includes larger nonlinear elements, such as the second term in Eq. (B8). Because the nonlinear term is a source of dc output components when rf signals are input, a smaller subthreshold slope leads to a higher output.

Meanwhile, shrinking the gate length leads to the reduction of the parasitic resistance and the thermal noise. In general, as the gate length of an FET decreases, the channel resistance also decreases and then the current increases. The dc currents $Idri$ and $Idif$ are inversely proportional to the gate length $L$⁠, as indicated in Eqs. (B10) and (C2). The channel conductances $Gdri$ and $Gdif$ described by Eqs. (B11) and (C3) are also inversely proportional to $L$⁠. Therefore, the effect of the gate length on the output voltage at the drain is canceled as in Eqs. (1) and (2) in the QS model. However, parasitic conductance appears in addition to the signal mixing region, as shown in Fig. 3(b), when terahertz waves are applied. Shortening the gate length reduces the parasitic resistance causing a voltage drop. Thus, a shorter gate length gives a higher detected voltage, as shown in Fig. 12. Shortening the gate length also reduces the thermal noise, as described in Eqs. (B13) and (C5).

The above results suggest that a small subthreshold slope and a short gate length lead to a high-sensitive detection. The subthreshold slope is mainly determined from the interface trap density. Therefore, a process technology improving the interface state is required. In addition, process shrink is necessary to realize nanometer scale devices. However, it must be noted that the shrinking gate length can cause the short channel effect, which degrades the subthreshold slope.

Considering drift and diffusion current separately, mathematical formulae that express a circuit model of square-law detectors have been derived. In addition, the behavior of the detector for terahertz waves is considered. The model provides a complete set of equations that describe the impact of transistor parameters on the sensitivity. The equations suggest that subthreshold slope and gate length are significant parameters to realize a high-sensitive detection. Use of high-electron-mobility transistors is also highly demanded to reduce parasitic resistance in the channel, which causes the generation of the voltage (also current) loss and noise. Experimental investigation has been carried out using a square-law detector made of InAs QW MOS-HEMT on the glass substrate, which is able to detect 1.0 THz waves. The results well agreed with the calculated results and proved that the subthreshold slope and gate length of the transistor significantly affected the voltage responsivity and NEP of the detector.

The authors are grateful to Dr. E. Kume of IRspec for his invaluable discussion of this work. They also thank Dr. Hattori and Dr. W.-H. Chang of AIST and Mr. Y. Mukai of Kyushu University for their useful discussions and technical help. This work was partly supported by Japan Science and Technology Corporation (JST) CREST (No. JPMJCR1431).

Each segment $N$ of the distributed circuit, as shown in Fig. 1(b), behaves as a square-law detector. From Fig. 1(b), Kirchoff’s current law gives

The current $ig,N$ flowing through conductance $gN$ is described by Eq. (A2) using the local gate to channel potential $vN$⁠,

where $gN$ can be given by a conductivity per unit length $Gv(x,t)$⁠, which depends on the gate to channel voltage $v(x,t)$ and the segment length $Δx$⁠,

Here, the carrier density of UCCM given by Eq. (A4) is applied,¹⁷ 

where $n$ is the channel carrier density, $Cox$ is the gate capacitance per unit area, $q$ is the elementary charge, $kB$ is Boltzmann’s constant, $T$ is the temperature, $Vg$ is the gate voltage, $Vth$ is the threshold voltage, and $η$ is the ideality factor. $η$ is related to the subthreshold slope $S$ as²¹ 

The current $iC,N$ flowing through each capacitance $CN=CoxWΔx$ is given by Eq. (A6),

where $W$ is the gate width. Using Eqs. (A1)–(A3), and (A6), the partial differential Eq. (A7) is obtained,⁶ 

The conductances expressed by Eqs. (B11) and (C3) are applied to $Gv(x,t)$ in Eq. (A7) to describe drift and diffusion components, respectively. The boundary conditions are¹³ 

Here, $j(x,t)$ is the current per unit width.

For square-law detectors in the QS model, the rf signal is applied to both the gate and the drain through the coupling capacitor between the gate and the drain.⁶ 

In general, the drift current $idri(t)$ is expressed as the product of carrier density $n$ and carrier velocity $ν$⁠,

The velocity is described by

where $vc(x,t)$ is the local channel potential at $x$⁠.

Using Eqs. (A4) and (B2), Eq. (B1) becomes

The $vc(x,t)$ at the source (⁠$x=0$⁠) and the drain (⁠$x=L$⁠) are $vc(0,t)=0$ and $vc(L,t)=vds(t)$⁠, respectively. In this case, the gate voltage $vgs(t)$ and the drain voltage $vds(t)$ applied to the FET are given by the following equations:

Integrating Eq. (B3) from $0$ to $L$⁠, $idri(t)$ becomes

The Taylor series expansion to the first order at an arbitrary point $a$ as a function of $x$ described by Eq. (B7) is applied to approximate the integrand under the small signal condition. Note that the squared term of $(x−a)$ on the right side of Eq. (B7) is not taken into consideration, because it contains no dc component after the integration,

The following equations for the input signal $vRF(t)=VRFsin⁡ωt$ are derived using Eqs. (B7) and (B6):

Therefore, the dc current $Idri$ is obtained as

From Eqs. (A5) and (B9), it becomes

The channel conductance $gdri(t)$ is given by $gdri(t)=∂idri(t)/∂vds(t)=∂idri(t)/∂(VRFsin⁡ωt)$ in Eq. (B8). Extracting dc components from $gdri(t)$ leads to the dc channel conductance $Gdri$⁠,

The dc voltage at the drain $Vdri$ as described in Eq. (1) is derived from $Idri/Gdri$⁠. Voltage responsivity $Rvdri$ and NEP$dri$ are also obtained as mentioned in the text,

The authors have previously derived mathematical formulae expressing detection characteristics of the diffusion component of square-law detectors.¹⁸ The solved differential equation of the diffusion current is given by

where $Dn$ is the diffusion coefficient.

When the rf signal $vRF(t)=VRFsin⁡ωt$ is applied to the detector, the dc components between the drain and the source such as the current $Idif$ and the channel conductance $Gdif$ are as follows:¹⁸ 

The dc voltage $Vdif$ at the drain is generated by $Idif$ and $Gdif$ as described in Eq. (2) in the text. Voltage responsivity $Rvdif$ and NEP$dif$ are obtained as follows: