Temperature dependent simulation of diamond depleted Schottky PIN diodes

Recent developments in controlling both the growth quality and doping concentration in diamond grown using plasma enhanced chemical vapor deposition (PECVD) have led to the fabrication of a variety of diamond devices such as Schottky diodes,¹ p-n diodes,² field effect transistors (FETs),^3,4 and more recently bipolar junction transistors.^5,6 Diamond has several desirable properties for high power electronics applications, such as a high theoretical breakdown field,⁷ high electron and hole mobilities at room temperature in lightly doped diamond,^8–10 high thermal conductivity and extremely low intrinsic carrier concentration at room temperature. These properties lead to diamond having high potential figures of merit in both active devices, such as high-frequency field-effect transistors (FETs) and high-power switches, and passive devices such as Schottky and PIN diodes.¹¹ The ability to accurately simulate such devices and predict the theoretical limits is therefore important. Prior attempts using Silvaco Atlas for diamond device simulations have been reported,¹² but with limited success when attempting to experimental device data.

In this work, we attempt to explain the early turn-on voltage measured in p-i-n diamond diodes assuming a Schottky contact to the top P-doped n-layer which is depleted. A similar device has been reported¹³ and is referred to as an SPND (Schottky PN diode). The difference from an SPND device is that due to the presence of a thin lightly doped n-layer, the n-layer is completely depleted. Transport is then solely due to thermionic emission of holes making the device a unipolar device with a low turn-on voltage. 3D Atlas simulations with appropriately modified models for hopping transport in diamond were performed and fit to experimental temperature dependent I-V measurements, which verify this Schottky model for device performance.

In the following, Section II summarizes the growth and fabrication of diamond the PIN diodes compared to here. Section III discusses the simulation methodology including all the models that need to be added/modified to correctly simulate transport in P- and B-doped diamond materials. Section IV discusses the fitting of the simulated results to the experimental data for different devices including temperature dependent I-V data showing a good fit between theory and experiment, followed by conclusions in Section V.

The growth and fabrication of the PIN diodes compared to here is discussed in Ref. 14. To summarize, the semiconducting layers are grown using the PECVD technique. The B doped layer of the diode is grown with a concentration of ∼10²⁰cm⁻³ on a 3 mm × 3 mm type II-a insulating single crystal diamond (100) substrate at the Fraunhofer USA Center for Coatings and Diamond Technologies (CCD). The intrinsic layer was grown using 2 sccm methane (CH₄) as the carbon source and 398 sccm of hydrogen (H₂) as the carrier gas. To grow the P doped layer (n-layer), a gas mixture of H₂ and Trimethylphosphine P(CH₄)₃ (200 ppm/10 sccm) is used as the P source. The surface is treated with an acid mixture (HNO₃:H₂S0₄ = 1:3) to remove any surface conductive layer. Metal contacts to the P doped layer using Ti/Pt/Au/Ni with 50 nm/50 nm/150 nm/50 nm thicknesses, respectively, were deposited using bi-layer photolithography. Square shaped contacts ranging from 50 μm × 50 μm to 300 μm × 300 μm and circular diodes with diameters of 50 μm–300 μm were deposited on the P doped layer. To reduce the impact of side-wall leakage, a single p-layer contact was placed at the edge of the sample as shown in Fig. 1. The B doped layer was contacted using Ti/Pt/Au with 50 nm/50 nm/150 nm thicknesses, respectively. Two approaches were explored for growing the intrinsic layers in these devices. The first approach involved growing the intrinsic layer in a chamber used for growing N doped diamond (Diode A). The second approach involved growing an intrinsic layer in the same chamber used for growing the P doped layer for both the samples (Diode B). We compare the measured I-V characteristics of these two samples with device simulations in Section IV.

The simulations performed in this work use Silvaco Atlas. Atlas uses the drift-diffusion method to simulate the electrical, optical, and thermal behaviors of semiconductor devices. To properly simulate devices made from diamond, various material models had to be added and/or modified within Atlas. Our simulator incorporates the hopping transport model¹² for carriers trapped in impurity states reported by Marechal et al. Due to the high reported activation energies (several hundred meV) for both n-type (P doped) and p-type (B doped) diamonds, it is essential to include an incomplete ionization model to correctly capture the free and trapped carrier concentrations. The free carrier concentrations are calculated during runtime using the charge neutrality equation,

where p and n are the hole and electron free carrier concentrations, N_A and N_D are the acceptor and donor concentrations, GVB = 4.0 and GCB = 0.5 are the appropriate degeneracy factors for the valence band (⁠$EV$⁠) and conduction band (⁠$EC$⁠) of diamond, EAB and EDB are the activation energies for acceptors and donors, respectively, and $EFn$ and $EFp$ are the electron and hole quasi-fermi levels, respectively. In the case of P doped diamond, a constant value of 0.57 eV for the activation energy is used,^15,16 while for the B doped diamond, a significant variation in the activation energy as a function of the B doping concentration has been reported.¹⁷ To account for the variation in an analytical way, the activation energy as a function of doping concentration was fit to the Pearson and Bardeen model¹⁸ according to

The parameters are chosen to get 0.362 eV activation energy¹⁹ at N_A = 1 × 10¹⁸cm⁻³ and zero at the metal-insulator transition²⁰ of 4.5 × 10²⁰cm⁻³. In modeling the behavior of diamond devices, another important parameter is the low-field mobility of electrons and holes. In general, they depend on the doping concentrations and the lattice temperature of the diamond. An empirical model is used which is fit to experimental Hall measurements for holes²¹ and for electrons.⁹ The empirical model is given by¹² and is implemented in Atlas using the built-in C language interpreter. The temperature dependence of the band gap can also play a role at high temperatures. The model is given by²² 

where $Eg(300)$ = 5.45 eV is the band gap at zero temperature, S = 2.31 is a dimensionless coupling constant, and $⟨ℏω⟩$ = 94.0 meV is an average phonon energy.

It has been reported in homoepitaxially grown diamond that hopping conduction is prominent at high doping concentrations. In diamond with a B concentration between 10¹⁹cm⁻³ and 3 × 10²⁰cm⁻³, it has been reported that the conduction is of the variable range hopping (VRH) type.²³ In Phosphorus doped diamond with a doping concentration between 10¹⁸cm⁻³ and 10¹⁹cm⁻³, the conduction is reported to be nearest neighbor hopping (NNH) conduction.²⁴ To model devices with both n-type and p-type diamonds therefore requires an accurate model of NNH and VRH conduction. These models have been implemented in Silvaco via a built-in C language interpreter. The equivalent electron mobility including NNH hopping mobility in P doped (n-type) diamond is given by

where $μhop,NNH$ is the nearest neighbor hopping mobility and $nhop$ is the hopping carrier concentration given by $nhop=ND−n$ where n is the free electron concentration. The localization length of the wave function $α−1$ is assumed to be 1.8 nm for donor impurities. $Whop=51 meV$ is the thermal activation energy for the hopping process, $Rhop=Nd−1/3$ is the mean distance between impurities, and $νph=2×1011 s−1$ is a factor related to the phonon frequency.

In Equation (5), if $2αRhop$ is not negligible compared to $qWhop/kT$⁠, the hopping probability is a maximum when $2αRhop+qWhop/kT$ is a minimum. This regime is called variable range hopping. On the assumption that the density of states near the Fermi energy is constant $gF$⁠, the mobility for VRH conduction in B doped (p-type) diamond is given by

where $μhop,VRH$ is the variable range hopping mobility and $phop$ is the hopping hole concentration given by $phop=NA−p$ where p is the free hole concentration and

where $β=7.6$ is given by Mott²⁵ and $κ$ is the dielectric constant of diamond. $α−1$ is assumed to be 1.0 nm for acceptor impurities and $νph=2×1013 s−1$⁠. To simulate the effect of hopping conduction, a 1D resistor with uniformly doped n-type or p-type diamond was simulated in Silvaco and the resistance is extracted from the slope of the I-V curves for very low voltages.¹² Figure 2 shows the fit between the resistivity obtained from Silvaco and the experimental data¹⁹ as a function of temperature. A compensation of 10% was used for all doping concentrations. At low temperatures, the resistivity is significantly lowered due to the presence of hopping conduction.

In Fig. 3, the range of doping concentrations where hopping conduction is dominant at room temperature is shown in Boron doped diamond. Depending on the percentage of compensation of diamond, the resistivity can vary significantly. At very high doping (∼3.0 $×$ 10²⁰cm⁻³–4.5 $×$ 10²⁰cm⁻³), the material becomes metallic in nature.

Verification of the numerical models was accomplished by fitting the experimental data of diamond p-i-n diodes¹⁴ with simulation of the same device structures in Atlas. As discussed earlier, the diodes consist of a 5.0 μm thick p-type diamond with a B concentration of ∼10²⁰cm⁻³, an intrinsic layer and then a thin lightly doped n-type layer with a P doping concentration between 5 × 10¹⁶ cm⁻³ and 1 × 10¹⁸ cm⁻³. Using the depth profile analysis technique,²⁶ the total thickness of the intrinsic layer and n-type layer can be determined from the C-V data using

where $κ$ is the dielectric constant of diamond. The depth profile analysis technique is very useful when the doping profile is unknown or slowly varying. Unfortunately the doping profile near the surface cannot be determined this way as the capacitance required would be too large. As shown in Fig. 4, the depth at which the highly doped p-type layer present is around 0.65 μm in Diode A and 1.3 μm in Diode B. The higher carrier concentration in the intrinsic layer of Diode A as compared to Diode B is also shown. These results indicate that Diode A has a higher impurity concentration compared to Diode B due to the different approaches used in growing the intrinsic layer.¹⁴ 

The device structure consists of many small n-layer contacts and one large p-layer sidewall contact to minimize the sidewall leakage current. The current-voltage curves of two such devices from diode B is shown are Fig. 5.

To accurately simulate the series resistances, 3D simulations were performed using Silvaco incorporating the models described in Sec. III. 3D simulations were necessary since due to the side-wall contact, the transport of current in these diodes are not strictly vertical and the effect of current crowding on the series resistance near the side-wall contact may not be neglected. The side-wall contact to the p-layer extends along the whole side for 3 mm. The top n-layer contacts are of different sizes depending on the device. The p-layer contact is on the side as shown in Fig. 1. The thickness of the n-layer was assumed to be 50 nm thick with a peak Phosphorus doping concentration of 10¹⁷cm⁻³ at the surface.

Figure 6(a) shows the fit between experimental data and Silvaco simulations at room temperature. A Schottky contact at the n-layer with barrier height of 1.27 eV was found to provide a good fit to the early turn on voltage of the device. The formation of a Schottky barrier diode is attributed to the low P doping concentration and thinness of the n-layer¹³ which causes the entire n-doped layer to be depleted. The n-layer causes a small band bending as shown in Fig. 6(b), but due to its low doping and small thickness, it is completely depleted. This is similar to the SPND device reported by Makino et al.¹³ except that in the SPND device, there is a thick n-layer which causes the device to be bipolar and have a greater than 4.0 V turn on voltage. A shunt resistance of R_sh = 4 × 10⁸ Ω was added to account for the side-wall leakage and other leakage paths and to reproduce the low voltage resistance, before the diode turns on. An ideality factor of 1.08 was obtained, which is very close to the ideal value signifying a very smooth Schottky contact.²⁷ A background trap density of 10¹⁵cm⁻³ in the intrinsic layer at an energy level of 0.34 eV above the valence band was included in the simulation to account for impurities during the growth process.

For diode B, the temperature dependent IV curves obtained experimentally for the L-400 device are shown in Fig. 7.

In an ideal Schottky diode, the current is given by

where $S$ is the surface area of the contact, $A*$ is the Richardson constant, $T$ is the temperature, $ϕb$ is the barrier height of the Schottky contact, and $V$ is the applied voltage. According to Equation (8), a plot of $ln(I/T2)$ vs $(1/kT)$ should be a straight line with a slope given by

The Richardson plot and the corresponding barrier height calculated using Eq. (8) is shown in Figs. 8(a) and 8(b). The straight line in Fig. 8(a) indicates the diode current is limited by thermionic emission as shown in Equations (8) and (9). This agrees with the Silvaco simulation of Diode A.

The variation of the barrier height with voltage also signifies the deviation from ideal Schottky diode behavior. This leads to an ideality factor n > 1.²⁷ If the barrier height $ϕb$ depends on voltage, then based on Eq. (8), the ideality factor n is given by

Therefore, a positive variation in barrier height with voltage will lead to a larger than 1.0 ideality factor according to Equation (10). The reason behind the variation in barrier height with voltage has been widely studied.^27–29 Tung's model²⁷ attributes barrier height inhomogeneities to the non-ideal behavior of Schottky diodes. When a region of low barrier height is surrounded by high barrier regions, the low barrier region can become “pinched” off by the high barrier region. This pinch off causes the effective barrier height to vary with voltage as well as temperature depending on the nature of the low barrier regions. Using Silvaco, 3D simulations of the L-400 device in Diode A were simulated and fit to the experimental data. Figure 9 shows the experimental and simulated data at different temperatures.

A shunt resistance of 1.6 × 10⁵ Ω was added to the simulation to account for the side-wall leakage. In order to obtain the fit, the barrier height had to be varied with voltage and temperature as shown in Table I. Similar trends in barrier height with voltage and temperature is predicted by Tung's model²⁷ and is observed in a variety of Schottky devices.

The reverse characteristics of the devices in Diode A and Diode B are shown in Fig. 10. The inset of Fig. 10 shows the forward characteristics of the devices. The cross-section of the device shown in Diode A is a circular diode of diameter equal to 113 μm and the device shown as Diode B is a square diode of side 150 μm. Due to the Schottky contact at the P doped layer, the leakage current is higher than that from a PIN device. Nevertheless, the diodes show rectification behavior with an on to off ratio of over 10⁷ at 4 V.¹⁴ Recent developments in the growth of the P doped layer and using a thicker intrinsic layer have reduced the reverse leakage of these diodes and devices with breakdown voltages >600 V reported.³⁰ 

There are several advantages to a diamond depleted Schottky PIN diode over both the Schottky p-diamond diode and the bipolar diamond diodes. Due to the unipolar nature of the depleted Schottky PIN diode, the ideality factor is close to 1.0 which is advantageous in switching applications over the bipolar device in which the ideality factor is limited by recombination. Also, having a low turn-on voltage leads to higher forward current densities at low voltages. The diamond depleted Schottky PIN diodes have been reported to have a greater than 100 A/cm² current density at a forward voltage of 4.0 V (Ref. 14) which is higher than any reported bipolar diamond diode. Also, having an intrinsic layer leads to a high breakdown voltage which is advantageous over a simple Schottky p-diamond diode. A reverse breakdown field of greater than 600 V has been reported in a diamond depleted Schottky PIN diode.³⁰ Having a low turn-on voltage while maintaining a high reverse breakdown field is desired in high power rectifying applications to minimize the power loss in the forward direction.

Recent developments in the fabrication of depleted Schottky PIN diodes show a high forward current density at low voltages due to an early turn-on voltage and high reverse breakdown voltages. These are desirable properties to have in high power rectifying applications. In this work, 3D Silvaco simulations of depleted Schottky PIN diamond diodes have been accurately fit to experimental data for the first time by the addition of models such as hopping conduction and partial ionization of impurities. The hopping conduction, low-field hall mobility, and other temperature dependent models have been extracted from experimental data. Temperature analysis of the diamond diodes has shown it to be Schottky in nature due to the low doping concentration of the n-layer and Silvaco simulations have verified this claim. Variations in barrier height and ideality factor with temperature and voltage have been explained using Tung's fluctuating barrier model.

This research was supported by the ARPA-E SWITCHES Program under Grant No. “DE-AR0000453.”