Amorphous silicon enables the fabrication of very high-efficiency crystalline-silicon-based solar cells due to its combination of excellent passivation of the crystalline silicon surface and permeability to electrical charges. Yet, amongst other limitations, the passivation it provides degrades upon high-temperature processes, limiting possible post-deposition fabrication possibilities (e.g., forcing the use of low-temperature silver pastes). We investigate the potential use of intrinsic amorphous silicon carbide passivating layers to sidestep this issue. The passivation obtained using device-relevant stacks of intrinsic amorphous silicon carbide with various carbon contents and doped amorphous silicon are evaluated, and their stability upon annealing assessed, amorphous silicon carbide being shown to surpass amorphous silicon for temperatures above 300 °C. We demonstrate open-circuit voltage values over 700 mV for complete cells, and an improved temperature stability for the open-circuit voltage. Transport of electrons and holes across the hetero-interface is studied with complete cells having amorphous silicon carbide either on the hole-extracting side or on the electron-extracting side, and a better transport of holes than of electrons is shown. Also, due to slightly improved transparency, complete solar cells using an amorphous silicon carbide passivation layer on the hole-collecting side are demonstrated to show slightly better performances even prior to annealing than obtained with a standard amorphous silicon layer.

Very efficient crystalline silicon (c-Si) solar cells can be obtained when thin intrinsic and doped hydrogenated amorphous silicon (a-Si:H) layers are used for passivation and carrier selectivity.1,2 A well known loss mechanism of such a-Si:H/c-Si heterojunction devices is parasitic absorption of blue light in the a-Si:H layers on the light-entering side.3–6 Several strategies are being followed to side-step this problem including thinner layers, wider- or indirect-bandgap materials, and interdigitated back-contact designs as used in the recent world record device.4–9 

Another less reported limitation is the observed degradation of the passivation quality provided by the a-Si:H layers after heating the device at elevated temperatures. This degradation typically limits all the process steps following a-Si:H deposition to temperatures below 250 °C. Whereas the ability to make good cells with low-temperature processing is an advantage of this technology, the inability to use higher temperatures prevents the use of high-temperature, low-resistivity silver pastes (typically requiring annealing at over 400 °C (Ref. 10)), and of silicon-nitride passivating and anti-reflecting coatings, which could be of interest for back-contacted devices.11 Also, higher-temperature steps could be required in fabricating tandem devices using a heterojunction bottom cell, since the process flows to fabricate most top cell candidates require high temperature steps (typically above 400 °C).12–15 The temperature-induced degradation of a-Si:H is especially drastic for layers with a Fermi level close to the valence band, whether because of doping (p-type layers) or the presence of an electric field (intrinsic layers adjacent to a high-work-function material). It was notably shown that, in the case of a stack of intrinsic and p-type a-Si:H (i/p stack), passivation starts to degrade at lower temperatures than for an intrinsic a-Si:H layer only.16 This effect was attributed to the fact that the nominally intrinsic layer of the i/p stack has its Fermi level shifted towards the valence band due to the presence of the p-type layer, decreasing the energy for defect creation due to bond breaking in this layer. Improving the temperature stability of the chemical passivation of such an i/p stack would thus require a modification of the intrinsic a-Si:H layer on which the passivation relies, since any good hole-collecting layer will shift the Fermi level in the intrinsic a-Si:H layer towards the valence band.

Amorphous silicon carbide (a-SiCx:H) is an excellent candidate to improve temperature stability according to the studies from Refs. 17 and 18: Upon carbon incorporation into an a-Si:H film, the hydrogen incorporation increases, the diffusion coefficient of hydrogen decreases, and the temperatures of both hydrogen effusion peaks increase. All these effects, linked to the stronger bonding of hydrogen to carbon than to silicon, would tend to reduce the formation of dangling bonds due to hydrogen effusion upon annealing. Also, incorporating carbon in the a-Si:H matrix widens the bandgap, reducing parasitic absorption of short-wavelength light for a given layer thickness. The expected challenges when using intrinsic a-SiCx:H in lieu of a-Si:H are maintaining sufficient passivation, since the density of dangling bonds increases with the carbon incorporation, and good collection of carriers despite the larger band offsets resulting from the wider bandgap.

Though passivation of c-Si with a-SiCx:H layers has been demonstrated by several groups in the last 15 years,19–23 the passivation quality reported has not reached that obtained with a-Si:H.2,24,25 Also, in most studies, substantially thicker layers than typically used in devices were used to enable efficient passivation, and the few reported results on complete silicon heterojunction solar cells showed moderate efficiencies and did not investigate improved transparency and thermal stability.22,23,26,27

We investigate in this article the passivation performance of device-relevant stacks of intrinsic a-SiCx:H and doped a-Si:H, evidencing strong effects upon annealing. We show that silicon-rich a-SiCx:H can be used as a passivating layer in high-efficiency c-Si heterojunction devices with open-circuit voltages (Voc) up to 730 mV. We find a slight improvement in transparency with no loss in electrical performance when using an a-SiCx:H layer of appropriate thickness as a passivating layer below an a-Si:H p-type hole-collecting layer. These devices also exhibit improved stability upon post-fabrication annealing steps up to 350 °C.

We investigated intrinsic a-SiCx:H layers deposited by plasma-enhanced chemical vapor deposition (PECVD) at a temperature of 250 °C and a pressure of 4.3 mbar from a mixture of silane, methane, and hydrogen (SiH4, CH4, and H2). The methane flow ratio (RCH4), defined as the mass flow rate of CH4 divided by the sum of CH4 and SiH4 mass flow rates, was varied from 0% to 75%, and the flow of H2 was kept at 400 sccm except when specifically mentioned. 50-nm-thick layers were used for ellipsometry characterization and some specific lifetime measurements, and 4-nm- to 10-nm-thick layers were used in cells. Except for ellipsometry measurements which were performed on a single-side-polished wafer, layers were deposited on 170–μm-thick pyramidally textured n-type wafers with resistivities of 1 Ω cm to 10 Ω cm that were cleaned prior to deposition with piranha, RCA-B, and buffered oxide etch (BOE).

For complete silicon heterojunction cells, boron-doped and phosphorous-doped PECVD a-Si:H layers with a nominal thickness of 10 nm were used as p- and n-type contacts. The front electrode consisted of a 75-nm-thick sputtered indium tin oxide (ITO) layer followed by a 500-nm-thick silver grid sputtered through a shadow-mask; the back electrode consisted of a 150-nm-thick ITO layer followed by a 250-nm-thick, full-area sputtered silver layer. Whereas this metalization enables reasonably low series resistances for the 4-cm2 and 1-cm2 devices used here, the front grid shadows approximately 15% of the area with 10% variability between samples. Active-area short-circuit current densities (Jsc) are therefore reported and were calculated by integrating the product of the external quantum efficiencies and the AM1.5G spectral irradiance. Lifetimes were measured with a Sinton lifetime tester on the samples with no ITO or silver, from which implied current-voltage (IV) parameters were extracted; a continuous-illumination Newport sun simulator was used to acquire actual IV curves. Note that except when otherwise stated, IV measurements are reported after annealing at 200 °C for 20 min, occasionally causing Voc values to exceed the corresponding implied Voc values. Ellipsometry measurements of a-SiCx:H layers were made with a Woolam M2000 system and a Cody-Lorentz model was used in the analysis, similarly to Ref. 28. A better fit of the data was obtained than with a Tauc-Lorentz model, especially for high RCH4, probably due to the large band tails in this material which are better reproduced with a Cody-Lorentz model.

Secondary ion mass spectrometry (SIMS) analysis revealed that very little carbon is incorporated in the layer: The layer with a RCH4 of 50% had an atomic ratio C/(C+Si) of only 4%, and it dropped to 2% for the film with a RCH4 of 25%. This poor carbon incorporation is usual for a-SiCx:H films and has been attributed mostly to the higher sticking coefficient of silicon radicals compared to carbon radicals.17 Diluting the plasma with H2 was shown to further reduce the carbon incorporation in the film by further lowering the sticking coefficient of the precursors, making the divergence between the gas stoichiometry and film stoichiometry larger. A stronger deviation in stoichiometry was also reported in earlier papers when increasing the deposition temperature, though no strong influence was seen in more recent work for temperatures between 130 °C and 300 °C.22,29 Since we did not perform SIMS analysis on all samples, RCH4 (gas flow ratios) are reported instead of actual carbon content in the film throughout this paper.

Fig. 1(a) shows the refractive index n and the extinction coefficient k obtained from ellipsometry measurements of 50-nm-thick layers grown on polished wafers with different RCH4. Despite the aforementioned poor carbon incorporation, a significant decrease in n is seen for higher RCH4, linked with a slight decrease in k. The bandgap obtained from fitting the Cody-Lorentz model to the data increased accordingly from 1.7 eV to 2.3 eV in accordance with to previous reports.18,19,29,30

FIG. 1.

n and k values as a function of the wavelength for a-SiCx:H layers with (a) different CH4 to (CH4 + SiH4) ratios (H2 flow of 400 sccm) and (b) different H2 flows (RCH4 of 75%).

FIG. 1.

n and k values as a function of the wavelength for a-SiCx:H layers with (a) different CH4 to (CH4 + SiH4) ratios (H2 flow of 400 sccm) and (b) different H2 flows (RCH4 of 75%).

Close modal

Fig. 2(a) shows the effective lifetime of textured wafers with both sides passivated with identical 50-nm-thick intrinsic a-SiCx:H layers for successive 20-min annealing steps in a furnace in ambient air. Increasing the RCH4 degrades the initial (pre-annealed) lifetime by up to two orders of magnitude. We attribute this to a lower-quality chemical passivation of the c-Si surface due to an increase in the mid-gap defect density in the carbon-richer a-SiCx:H layers.17,18 Upon annealing, whereas the lifetime of wafers passivated with pure a-Si:H changes little below 300 °C and then decreases, an improvement is seen up to 300 °C followed by a drop when using carbon-containing layers. Changes in lifetime upon annealing are usually linked to hydrogen redistribution in the network,16 so that initial improvements suggest that the initially present dangling bonds get passivated by hydrogen. The high-temperature degradation can, on the other hand, be attributed to hydrogen effusion,16 with a lower relative degradation for higher carbon content because of stronger hydrogen bonding.17 Modifying the atmosphere during annealing is expected to influence these results, and annealing under forming gas atmosphere was shown to enable a stable lifetime at higher temperatures for carbon contents similar to the ones investigated here.21 

FIG. 2.

Lifetimes after successive 20-min annealing steps at increasing temperatures for textured wafers with (a) both sides coated with 50-nm-thick a-SiCx:H films prepared with various RCH4 and (b) the back side coated with a 50-nm-thick a-Si:H film and the front side coated with two successive 10-nm-thick intrinsic a-SiCx:H layers with a RCH4 of either 0% (pure a-Si:H) or 75% as sketched in (c). (c) Sketches of the hydrogen motion in such stacks (left to right: 0%/0%, 0%/75%, 75%/0%, and 75%/75%) during the first stages of moderate-temperature annealing.

FIG. 2.

Lifetimes after successive 20-min annealing steps at increasing temperatures for textured wafers with (a) both sides coated with 50-nm-thick a-SiCx:H films prepared with various RCH4 and (b) the back side coated with a 50-nm-thick a-Si:H film and the front side coated with two successive 10-nm-thick intrinsic a-SiCx:H layers with a RCH4 of either 0% (pure a-Si:H) or 75% as sketched in (c). (c) Sketches of the hydrogen motion in such stacks (left to right: 0%/0%, 0%/75%, 75%/0%, and 75%/75%) during the first stages of moderate-temperature annealing.

Close modal

Fig. 2(b) presents lifetime evolution upon annealing of wafers having their back side passivated with a 50-nm-thick a-Si:H layer and their front side passivated with a stack of two 10-nm-thick layers, each one being either a-Si:H or a-SiCx:H prepared with a RCH4 of 75%. a-Si:H/a-Si:H stacks and a-SiCx:H/a-SiCx:H stacks give results similar to those in Fig. 2(a). The a-Si:H-only and the a-Si:H/a-SiCx:H stack give similar passivation for annealing temperatures below 300 °C, indicating that the passivation of a given stack is determined by the first 10 nm of material after the interface. Yet, starting at an annealing temperature of about 300 °C, passivation from the stack drops more severely, indicating that a-Si:H degrades more when capped by an a-SiCx:H layer than when capped by an a-Si:H layer. We speculate that such behavior can be understood from the strong decrease in the diffusion coefficient of hydrogen in a-SiCx:H compared to a-Si:H (a drop by more than an order of magnitude was reported when increasing the carbon content in the a-SiCx:H layer from 0% to 10%, which corresponds to the range of carbon concentration used in this experiment18,31): upon annealing, whereas an equal quantity of hydrogen is diffusing out of the first 10-nm-thick layer in both cases, it is partly compensated by hydrogen diffusing into it from the capping layer as sketched in Fig. 2(c). If this layer is made of a-Si:H with identical hydrogen-bonding properties, this capping layer will act as a buffer preventing hydrogen loss from the interface, whereas when a-SiCx:H is used as a capping layer, much less hydrogen is coming in from the a-SiCx:H layer because of its has stronger hydrogen-bonding properties, reducing its protecting effect. Testing these hypotheses would require analyzing the hydrogen environment and hydrogen bonding in each case, which is delicate given the thin layers and layer stacks at stake. Careful measurements of dedicated samples with SIMS and Fourier-transform infrared spectroscopy (FTIR) would though be appropriate tools to probe these properties.32,33

Similarly, a better lifetime is observed when the a-SiCx:H/ a-Si:H stack is used compared to the pure a-SiCx:H stack, with a much improved temperature stability. The capping a-Si:H layer acts in this case as a source of hydrogen at annealing temperatures below 300 °C, reducing desorption from the a-SiCx:H layer. A beneficial effect is thus seen upon annealing when using a-SiCx:H/a-Si:H stacks, similarly to recent reports.34 This phenomenon is already expected to happen during the hydrogen-rich plasma deposition of the a-Si:H layer, explaining the higher initial lifetime of an a-SiCx:H/a-Si:H stack compared to an a-SiCx:H only stack. This particular case is to be kept in mind when considering intrinsic a-SiCx:H/doped a-Si:H stacks in the following discussion.

Fig. 3(a) shows the lifetimes of textured wafers with both sides coated with identical stacks of 10-nm-thick intrinsic a-SiCx:H and 10-nm-thick p-type a-Si:H (i/p stack); Fig. 3(b) shows the same results but when using identical stacks of 10-nm-thick intrinsic a-SiCx:H and 10-nm-thick n-type a-Si:H (i/n stack). The RCH4 during the deposition of the intrinsic a-SiCx:H layers was again varied between 0% and 75% (the doped layer being pure a-Si:H in all cases). For the pure a-Si:H i/p stack (Fig. 3(a)), the lifetime degrades monotonically with increasing annealing temperatures, dropping below 300 μs for 300 °C. When carbon is incorporated in the intrinsic layer, a lower initial lifetime is observed but the drop upon annealing is smaller (an increase is even observed for a RCH4 of 75%), making the lifetime higher for higher carbon content above 300 °C. For the pure a-Si:H i/n stack (Fig. 3(b)), the lifetime improves upon annealing up to 250 °C, followed by a drop. For increased carbon content in the intrinsic layer, though the initial lifetime decreases, a stronger improvement is seen upon annealing, making the lifetimes increase with increasing RCH4 above 300 °C.

FIG. 3.

Lifetimes after successive 20-min annealing steps at increasing temperatures for textured wafers with both sides coated with a stack of 10-nm-thick intrinsic a-SiCx:H prepared with different RCH4 and (a) a 10-nm-thick p-type a-Si:H layer or (b) a 10-nm-thick n-type a-Si:H layer.

FIG. 3.

Lifetimes after successive 20-min annealing steps at increasing temperatures for textured wafers with both sides coated with a stack of 10-nm-thick intrinsic a-SiCx:H prepared with different RCH4 and (a) a 10-nm-thick p-type a-Si:H layer or (b) a 10-nm-thick n-type a-Si:H layer.

Close modal

The lifetime behavior upon annealing for thick intrinsic i/p stacks, and i/n stacks of a-Si:H stacks is similar to that detailed by De Wolf and Kondo who observed an enhanced degradation for i/p stacks due to the position of the Fermi level close to the valence band in the intrinsic a-Si:H layer.16 For a-SiCx:H i/a-Si:H i/p stacks, the observed behavior is consistent with a superposition of this Fermi-level effect with the influence of the carbon-content on the passivation of intrinsic a-SiCx:H/a-SiCx:H stacks detailed as discussed previously in this section.

For i/p stacks, carbon incorporation helps somewhat to maintain high lifetimes at high annealing temperatures—an order of magnitude higher lifetime is observed for a RCH4 of 75% than for pure a-Si:H after annealing at 400 °C—but all lifetimes dive below 1 ms after annealing at temperatures higher than 200 °C. As shown in Fig. 4, different injection-dependence is yet observed for different RCH4 upon annealing, especially apparent after annealing at 300 °C: the pure a-Si:H case performs best upon high injection, whereas it shows the poorest lifetime at low injection, possibly indicating that recombination and passivation mechanisms are different. Further analysis on a wider injection range would be required to fully analyze these behaviors.35 On the other hand, for i/n stacks, an initial improvement in lifetime followed by a drop is seen for all cases (Fig. 3(b)), with the peak value decreasing from 5 ms to 2 ms when increasing the RCH4 from 0% to 75%. The position of this peak also shifts from 250 °C to 350 °C for increasing RCH4. This temperature shift is also present in Fig. 2 for intrinsic stacks, and we speculate that this is caused by diffusion of hydrogen from a-Si:H to a-SiCx:H. Compared to i/p stacks, the carbon incorporation helps to a larger extent to maintain high lifetimes at high annealing temperatures, with a value close to 2 ms after annealing at 400 °C for the RCH4 of 75% (compared to 0.2 ms for pure a-Si:H). No strong difference in the injection dependency (not shown) was observed for such stacks contrarily to the i/p stacks case.

FIG. 4.

Lifetimes as a function of injection level for textured wafers with both sides coated with a stack of 10-nm-thick intrinsic a-SiCx:H prepared with different RCH4 and a 10-nm-thick p-type a-Si:H layer after successive 20-min annealing steps at (a) 200 °C, (b) 300 °C, and (c) 400 °C.

FIG. 4.

Lifetimes as a function of injection level for textured wafers with both sides coated with a stack of 10-nm-thick intrinsic a-SiCx:H prepared with different RCH4 and a 10-nm-thick p-type a-Si:H layer after successive 20-min annealing steps at (a) 200 °C, (b) 300 °C, and (c) 400 °C.

Close modal

With the increased bandgap of a-SiCx:H, and thus the inevitable increase of the band offsets at the c-Si/a-SiCx:H interface, transport of charges from the wafer to the electrode might be impeded compared to a-Si:H. To probe the collection of holes through the a-SiCx:H layer, silicon heterojunction cells were made with a standard a-Si:H i/n stack but an i/p stack consisting of an intrinsic a-SiCx:H layer with a RCH4 of 0% to 75% followed by a p-type a-Si:H layer. The reverse configuration was also made to probe electron transport, with a standard a-Si:H i/p stack but a-SiCx:H in the intrinsic layer of the i/n stack. The Voc and fill factor (FF) (implied values and actual values from illuminated IV measurements) after annealing at 200 °C for 20 min are shown in Fig. 5.

FIG. 5.

Implied and actual Voc and FF as obtained from lifetime and IV measurements of silicon heterojunction cells with an intrinsic a-SiCx:H layer deposited between (a) the p-type a-Si:H layer and the n-type c-Si wafer or (b) the n-type a-Si:H layer and the n-type c-Si wafer. The 10-nm-thick a-SiCx:H layers were deposited with a RCH4 of 0% to 75% and a H2 flow of 400 sccm. Each symbol represents the best value out of three cells, and the bar indicates the average of the three cells.

FIG. 5.

Implied and actual Voc and FF as obtained from lifetime and IV measurements of silicon heterojunction cells with an intrinsic a-SiCx:H layer deposited between (a) the p-type a-Si:H layer and the n-type c-Si wafer or (b) the n-type a-Si:H layer and the n-type c-Si wafer. The 10-nm-thick a-SiCx:H layers were deposited with a RCH4 of 0% to 75% and a H2 flow of 400 sccm. Each symbol represents the best value out of three cells, and the bar indicates the average of the three cells.

Close modal

When using intrinsic a-SiCx:H in the i/p stack (Fig. 5(a)), the Voc is remarkably insensitive to carbon content and remains above 700 mV. A FF above 70% is also obtained in all cases. A slight Voc loss is seen for the highest RCH4, especially for a ratio of 50%, and is attributed to the poorer passivation also seen in Fig. 3. This reproducibly lowest lifetime and Voc for a RCH4 of 50% could be due to the competition between increased defect density and improved field-effect passivation when increasing the RCH4, the latter taking over for the RCH4 of 75%.19 A more detailed study of the injection-dependence of the lifetime curves would be required to analyze this effect.36,37

Turning to Fig. 5(b), the implied and actual Voc also exceed 700 mV for low RCH4 in the intrinsic layer of the i/n stack, but the actual Voc degrades to 500 mV for a RCH4 of 75%, the implied Voc staying at 675 mV as anticipated from the lifetime in Fig. 3. A degradation of FF is also observed for increasing RCH4, and is accompanied by an S-shaped IV curve for RCH4 of 50% and 75%. This indicates impeded transport of electrons through the a-SiCx:H intrinsic layer for high carbon contents, which is also responsible for the difference between the implied and actual Voc values for the RCH4 of 75%. Since the FF drop when increasing the RCH4 in the intrinsic layer was smaller for the i/p stack than for the i/n stack, the increased bandgap difference between c-Si and the a-SiCx:H layer with increasing RCH4 appears to consist mostly of a larger conduction-band offset. Different conduction-band offset values are found in literature for the a-SiCx:H/c-Si heterostructure depending on the study, with a strong dependence on the hydrogen content (as is also observed for a-Si:H/c-Si heterostructures).30,38–43 The large band tails and disorder of a-SiCx:H, which are due to its amorphous nature, complicate the band offset definition and might also contribute to the asymmetry in performance of the cells requiring electron and hole extraction through the a-SiCx:H layer.44,45

In an attempt to engineer the valence- and conduction-band offsets between c-Si and a-SiCx:H to favor hole or electron collection through intrinsic a-SiCx:H layers, we varied the H2 dilution during the growth of the intrinsic a-SiCx:H layers; the electron affinity of a-Si:H films is known to increase with their hydrogen content accompanying the widening of the bandgap.46 Instead of a similar bandgap increase, a slight decrease was actually observed for a-SiCx:H layers, as indicated by a slight increase in both n and k for 50-nm-thick intrinsic layers deposited with a RCH4 of 75% (Fig. 1(b)). This bandgap narrowing is attributed to lower carbon incorporation when using a higher H2 dilution, as previously reported.29 Compared to the influence of the RCH4, all layers deposited with a RCH4 of 75% and various H2 dilutions exhibit optical properties that are between the ones of layers having a RCH4 of 75% and 50% CH4 in Fig. 1(a). The improved electrical performance when using larger H2 flows observed in Fig. 6 can thus mostly be attributed to a slight bandgap narrowing rather than to a change in electron affinity only (without bandgap modification), since collection of both electrons and holes (though to a lesser extent) is improved. Thus, varying the H2 dilution seems to allow little leverage in tuning the electron affinity compared to the influence of the RCH4 on the overall bandgap.

FIG. 6.

Implied and actual Voc and FF as obtained from lifetime and IV measurements of silicon heterojunction cells with an intrinsic a-SiCx:H layer deposited between (a) the p-type a-Si:H layer and the n-type c-Si wafer or (b) the n-type a-Si:H layer and the n-type c-Si wafer. The 10-nm-thick a-SiCx:H layers were deposited with a H2 flow of 200 sccm to 1600 sccm, and a RCH4 of 75%. Each symbol represents the best value out of three cells, and the bar indicates the average of the three cells.

FIG. 6.

Implied and actual Voc and FF as obtained from lifetime and IV measurements of silicon heterojunction cells with an intrinsic a-SiCx:H layer deposited between (a) the p-type a-Si:H layer and the n-type c-Si wafer or (b) the n-type a-Si:H layer and the n-type c-Si wafer. The 10-nm-thick a-SiCx:H layers were deposited with a H2 flow of 200 sccm to 1600 sccm, and a RCH4 of 75%. Each symbol represents the best value out of three cells, and the bar indicates the average of the three cells.

Close modal

Fig. 7 shows the electrical parameters of silicon heterojunction devices using a-Si:H for the p-type layer and the i/n stack but an intrinsic a-SiCx:H passivating layer in the i/p stack with a RCH4 of 0%, 25%, or 75%, and a thickness of 4 nm, 7 nm, or 10 nm. The Jsc values were extracted from EQE measurements between the front metal grid fingers and do not include the 15% shadow loss from the metal grid; the efficiencies reported in Fig. 7(d) were calculated based on this current density as active-area efficiencies.

FIG. 7.

(a) Voc, (b) FF, (c) Jsc, and (d) active area efficiency of silicon heterojunction cells with an intrinsic a-SiCx:H layer in the i/p stack. The RCH4 in this layer was varied from 0% to 75%, a H2 flow of 400 sccm was used and for each ratio, cells with 4-, 7-, and 10-nm-thick layers are shown from left to right. Implied and actual values are reported for Voc and FF, and the pseudo-FF is also included. Each symbol represents the best value out of three cells, and the bar indicates the average of the three cells.

FIG. 7.

(a) Voc, (b) FF, (c) Jsc, and (d) active area efficiency of silicon heterojunction cells with an intrinsic a-SiCx:H layer in the i/p stack. The RCH4 in this layer was varied from 0% to 75%, a H2 flow of 400 sccm was used and for each ratio, cells with 4-, 7-, and 10-nm-thick layers are shown from left to right. Implied and actual values are reported for Voc and FF, and the pseudo-FF is also included. Each symbol represents the best value out of three cells, and the bar indicates the average of the three cells.

Close modal

Fig. 7(a) shows that passivation improves with a-SiCx:H thickness for layers prepared with a RCH4 of 0% or 25% but is similar for all three thicknesses for the layer prepared with a RCH4 of 75%. From Fig. 7(b), we can see that the FF is best for thinner layers when increasing the RCH4. For the layers deposited with a RCH4 of 75%, this is due to a barrier to charge transport arising for too thick layers, possibly due to a too small conductivity of the layer, as seen for the 10-nm-thick layers in Figs. 5 and 6. This is confirmed by the high pseudo-FF value, measured with a Sinton instrument,47 as commonly observed.48 We see here though that this barrier to hole extraction disappears for thin enough layers, with a FF of 76% for the 4-nm-thick layer. For pure a-Si:H, the 4-nm-thick layer appears to be too thin to ensure a high FF, at least partly due to an increase in surface recombination as indicated by the Voc loss (Fig. 7(a)). Devices with a RCH4 of 25% in the i a-SiCx:H layer maintain high FF values above 76% for all thicknesses, with a highest value of 78% for the 4-nm-thick layer. The slight FF drop for increasing thicknesses is linked to a higher value of open-circuit resistance. This is likely due to impeded charge extraction, similarly but less severely than observed for the highest RCH4 due to the smaller bandgap.

The Jsc values shown in Fig. 7(c) follow the expected trend: higher current densities are obtained for thinner intrinsic layers. This gain getting lower for the most transparent layers with the RCH4 of 75%. For cells using a passivation layer with a RCH4 of 75%, the reflection over most of the spectrum slightly increased (by this layer due to its lower refractive index (Fig. 1)), which balances the gain in the blue part of the spectrum due to improved transparency. Larger Jsc gains are to be expected when using a more transparent p-type (or other hole-collecting) layer, which was not investigated in this study, since most blue light is absorbed in this layer. The efficiencies in Fig. 7(d) mostly follow the FF and interestingly show an overall maximum for the 7-nm-thick a-SiCx:H layer with a RCH4 of 25%. The optimum thickness decreases when increasing the RCH4, which can be explained by a combination of more efficient passivation for thin layers and more severe series resistance (eventually giving an S-shape IV curve) for thick layers as the a-SiCx:H bandgap widens. Whereas these results are for room temperature, a better temperature coefficient is expected for the higher RCH4 due to improved thermionic emission which might make such layers more interesting for field applications.5,6,49

Fig. 8 shows the implied and actual Voc of the complete solar cells presented in Fig. 7 after successive 20-min annealing steps in ambient air at increasingly higher temperatures. As anticipated from Fig. 3, Voc stability is improved when increasing the RCH4 in the intrinsic layer of the i/p stack. This is especially true for thin intrinsic layers for which the observed degradation is much more severe when no carbon is incorporated. A Voc of 700 mV (680 mV) is maintained up to an annealing temperature of 350 °C when using a 10-nm-thick (4-nm-thick) intrinsic a-SiCx:H layer with a RCH4 of 75%, whereas devices with a 10-nm-thick (4-nm-thick) a-Si:H intrinsic layer degraded to 670 mV (600 mV). Though implied and pseudo FF values did not change much upon annealing, the actual FF degraded strongly, independent of the RCH4, which we attribute to degradation of the thin metalization which was visually observable.

FIG. 8.

Implied and actual Voc as a function of annealing temperature for heterojunction cells with an intrinsic a-SiCx:H layer in the i/p stack. The a-SiCx:H layers were deposited with a RCH4 of 0% to 75% (variation across columns), a thickness of 4 nm to 10 nm (variation across rows), and a H2 flow of 400 sccm. For the actual Voc, each symbol represents the best value out of three cells, and the bar indicates the average of the three cells.

FIG. 8.

Implied and actual Voc as a function of annealing temperature for heterojunction cells with an intrinsic a-SiCx:H layer in the i/p stack. The a-SiCx:H layers were deposited with a RCH4 of 0% to 75% (variation across columns), a thickness of 4 nm to 10 nm (variation across rows), and a H2 flow of 400 sccm. For the actual Voc, each symbol represents the best value out of three cells, and the bar indicates the average of the three cells.

Close modal

Note that the same temperature study applied to cells with the intrinsic a-SiCx:H layer on the i/n side (not shown here) confirms the trend observed in the lifetime study in Fig. 3: the initial implied Voc decreases with increasing RCH4, but all implied Voc values converge at annealing temperatures between 250 °C and 300 °C. For higher temperatures, passivation from the i/p stack begins to degrade rapidly and limits the overall Voc.

In summary, we showed that low-carbon-content intrinsic a-SiCx:H layers can be used in high-efficiency c-Si-based heterojunction cells. The lifetime with as-deposited a-SiCx:H layers decreased with increasing RCH4, but increases upon annealing at 200 °C to 400 °C were observed. When the passivating a-SiCx:H layer was capped with an a-Si:H layer, a further increase in lifetime was observed upon annealing, which we attributed to hydrogen moving from the a-Si:H layer to the a-SiCx:H layer. Passivation using device-relevant stacks of intrinsic a-SiCx:H and doped a-Si:H are more resilient to annealing at temperatures above 250 °C compared to equivalent stacks using a-Si:H only. For complete cells, poor carrier transport resulting in S-shaped IV curves was observed when increasing the carbon content in the intrinsic layer of the i/n stack. However, good FF values were maintained when using intrinsic a-SiCx:H layers in the i/p stack even for layers prepared with a RCH4 of 75%, provided a thin-enough layer was used. Because of good passivation and improved transparency of the front stack, cells employing a passivating layer prepared with a RCH4 of 25% reached slightly higher efficiencies than those with pure a-Si:H. Also, better stability of Voc after annealing at elevated temperatures was shown for such carbon-containing passivating layers.

As a-SiCx:H passivating layers can withstand higher temperatures than a-Si:H layers—up to 350 °C—they might allow for a wider range of post-deposition cell fabrication processes. Whereas strong lifetime degradation was still observed for 20-min annealing in air at temperatures above 400 °C, shorter exposures or different atmospheres were not investigated and a-SiCx:H layers may be beneficial in such cases. Further studies are required to fully understand the passivation mechanism for c-Si/a-SiCx:H structures and, in particular, the role of hydrogen, as well as carrier transport across the hetero-interface. To fully benefit from the improved transparency of intrinsic a-SiCx:H layers, more transparent hole-extracting layers would be required. Finally, a-SiCx:H passivating layers may be further improved by using multilayers, by optimizing the deposition conditions, and by investigating alternative post-deposition treatments such as annealing under controlled atmosphere or exposure to a hydrogen plasma.

The information, data, or work presented herein was funded in part by the U.S. Department of Energy, Energy Efficiency and Renewable Energy Program, under Award No. DE-EE0006335. We acknowledge Stanislau Herasimenka for initial developments of the a-Si:H layers used here, and Jianwei Shi and Kate Fisher for their support in wafer preparation.

1.
S.
De Wolf
,
A.
Descoeudres
,
Z. C.
Holman
, and
C.
Ballif
,
Green
2
,
7
(
2012
).
2.
M.
Taguchi
,
A.
Yano
,
S.
Tohoda
,
K.
Matsuyama
,
Y.
Nakamura
,
T.
Nishiwaki
,
K.
Fujita
, and
E.
Maruyama
,
IEEE J. Photovoltaics
4
,
96
(
2014
).
3.
Z. C.
Holman
,
A.
Descoeudres
,
L.
Barraud
,
F. Z.
Fernandez
,
J. P.
Seif
,
S.
De Wolf
, and
C.
Ballif
,
IEEE J. Photovoltaics
2
,
7
(
2012
).
4.
K.
Ding
,
U.
Aeberhard
,
F.
Finger
, and
U.
Rau
,
Phys. Status Solidi RRL
6
,
193
(
2012
).
5.
J. P.
Seif
,
A.
Descoeudres
,
M.
Filipič
,
F.
Smole
,
M.
Topič
,
Z. C.
Holman
,
S.
De Wolf
, and
C.
Ballif
,
J. Appl. Phys.
115
,
024502
(
2014
).
6.
C.
Battaglia
,
S. M.
De Nicolas
,
S.
De Wolf
,
X.
Yin
,
M.
Zheng
,
C.
Ballif
, and
A.
Javey
,
Appl. Phys. Lett.
104
,
113902
(
2014
).
7.
J.
Sritharathikhun
,
F.
Jiang
,
S.
Miyajima
,
A.
Yamada
, and
M.
Konagai
,
Jpn. J. Appl. Phys., Part 1
48
,
101603
(
2009
).
8.
M.
Lu
,
S.
Bowden
,
U.
Das
, and
R.
Birkmire
,
Appl. Phys. Lett.
91
,
063507
(
2007
).
9.
M. A.
Green
,
K.
Emery
,
Y.
Hishikawa
,
W.
Warta
, and
E. D.
Dunlop
,
Prog. Photovoltaics: Res. Appl.
23
,
1
(
2015
).
10.
N.
Mizumura
and
K.
Sasaki
, in
2014 International Conference on Electronics Packaging (ICEP)
(
IEEE
,
2014
), pp.
526
531
.
11.
A. G.
Aberle
,
B.
Kuhlmann
,
R.
Meyer
,
A.
Hübner
,
C.
Hampe
, and
R.
Hezel
,
Prog. Photovoltaics: Res. Appl.
4
,
193
(
1996
).
12.
J. M.
Ball
,
M. M.
Lee
,
A.
Hey
, and
H. J.
Snaith
,
Energy Environ. Sci.
6
,
1739
(
2013
).
13.
P.
Qin
,
S.
Tanaka
,
S.
Ito
,
N.
Tetreault
,
K.
Manabe
,
H.
Nishino
,
M. K.
Nazeeruddin
, and
M.
Grätzel
,
Nat. Commun.
5
,
3834
(
2014
).
14.
N. C.
Strandwitz
,
D. B.
Turner-Evans
,
A. C.
Tamboli
,
C. T.
Chen
,
H. A.
Atwater
, and
N. S.
Lewis
,
Adv. Energy Mater.
2
,
1109
(
2012
).
15.
K. N.
Yaung
,
J. R.
Lang
, and
M. L.
Lee
, in
2014 IEEE 40th Photovoltaic Specialist Conference (PVSC)
(
IEEE
,
2014
), pp.
0831
0835
.
16.
S.
De Wolf
and
M.
Kondo
,
J. Appl. Phys.
105
,
103707
(
2009
).
17.
W.
Beyer
and
H.
Mell
,
in Disordered Semiconductors, Institute for Amorphous Studies Series
, edited by
M. A.
Kastner
,
G. A.
Thomas
, and
S. R.
Ovshinsky
(
Springer US
,
1987
), pp.
641
658
.
18.
A.
Shah
,
Thin-Film Silicon Solar Cells
(
EPFL Press
,
2010
).
19.
I.
Martín
,
M.
Vetter
,
M.
Garín
,
A.
Orpella
,
C.
Voz
,
J.
Puigdollers
, and
R.
Alcubilla
,
J. Appl. Phys.
98
,
114912
(
2005
).
20.
M.
Vetter
,
I.
Martín
,
A.
Orpella
,
J.
Puigdollers
,
C.
Voz
, and
R.
Alcubilla
,
Thin Solid Films
451
,
340
(
2004
).
21.
C.
Ehling
,
J. H.
Werner
, and
M. B.
Schubert
,
Phys. Status Solidi C
7
,
1016
(
2010
).
22.
A.
Gaufrès
,
F.
Husser
,
E.
Fourmond
, and
M.
Lemiti
,
Energy Procedia
38
,
823
(
2013
).
23.
D.
Pysch
,
M.
Bivour
,
M.
Hermle
, and
S. W.
Glunz
,
Thin Solid Films
519
,
2550
(
2011
).
24.
A.
Descoeudres
,
Z. C.
Holman
,
L.
Barraud
,
S.
Morel
,
S.
De Wolf
, and
C.
Ballif
,
IEEE J. Photovoltaics
3
,
83
(
2013
).
25.
S. Y.
Herasimenka
,
W. J.
Dauksher
, and
S. G.
Bowden
,
Appl. Phys. Lett.
103
,
053511
(
2013
).
26.
R.
Ferre
,
I.
Martín
,
P.
Ortega
,
M.
Vetter
,
I.
Torres
, and
R.
Alcubilla
,
J. Appl. Phys.
100
,
073703
(
2006
).
27.
S.
Janz
,
S.
Riepe
,
M.
Hofmann
,
S.
Reber
, and
S.
Glunz
,
Appl. Phys. Lett.
88
,
133516
(
2006
).
28.
D.
Zhang
,
D.
Deligiannis
,
G.
Papakonstantinou
,
R.
van Swaaij
,
M.
Zeman
 et al,
IEEE J. Photovoltaics
4
,
1326
(
2014
).
29.
G. D.
Cesare
,
F.
Galluzzi
,
G.
Guattari
,
G.
Leo
,
R.
Vincenzoni
, and
E.
Bemporad
,
Diamond Relat. Mater.
2
,
773
(
1993
).
30.
J. M.
Essick
,
Z.
Nobel
,
Y.-M.
Li
, and
M. S.
Bennett
,
Phys. Rev. B
54
,
4885
(
1996
).
31.
W.
Beyer
,
J. Non-Cryst. Solids
266
,
845
(
2000
).
32.
A.
Smets
,
W.
Kessels
, and
M.
Van de Sanden
,
Appl. Phys. Lett.
82
,
1547
(
2003
).
33.
T.
Schulze
,
L.
Korte
, and
B.
Rech
,
Thin Solid Films
520
,
4439
(
2012
).
34.
I. P.
Sobkowicz
, “
Study and optimization of the growth of a-Si:H on wet-chemically textured c-Si substrates for the enhancement of a-Si:H/c-Si heterojunction solar cells
,” Ph.D. thesis (
Ecole Doctorale Polytechnique
,
2014
).
35.
D.
Suwito
,
T.
Roth
,
D.
Pysch
,
L.
Korte
,
A.
Richter
,
S.
Janz
, and
S.
Glunz
, in
Proceedings of the 23rd European Photovoltaic Solar Energy Conference
(
2008
), pp.
1023
1028
.
36.
S.
Olibet
,
E.
Vallat-Sauvain
, and
C.
Ballif
,
Phys. Rev. B
76
,
035326
(
2007
).
37.
C.
Leendertz
,
R.
Stangl
,
T.
Schulze
,
M.
Schmidt
, and
L.
Korte
,
Phys. Status Solidi C
7
,
1005
(
2010
).
38.
L.
Martín-Moreno
and
J.
Vergés
,
Philos. Mag. B
61
,
237
(
1990
).
39.
F.
Evangelisti
,
J. Non-Cryst. Solids
77–78
, Part 2,
969
(
1985
).
40.
T. M.
Brown
,
C.
Bittencourt
,
M.
Sebastiani
, and
F.
Evangelisti
,
Phys. Rev. B
55
,
9904
(
1997
).
41.
S.
Knief
and
W.
von Niessen
,
J. Non-Cryst. Solids
255
,
242
(
1999
).
42.
J.
Robertson
,
Philos. Mag. B
66
,
615
(
1992
).
43.
T.
Enomoto
,
R.
Hattori
, and
J.
Shirafuji
,
Sol. Energy Mater.
23
,
340
(
1991
).
44.
A.
Kanevce
and
W. K.
Metzger
,
J. Appl. Phys.
105
,
094507
(
2009
).
45.
T.
Schulze
,
L.
Korte
,
F.
Ruske
, and
B.
Rech
,
Phys. Rev. B
83
,
165314
(
2011
).
46.
C. G.
Van de Walle
and
L.
Yang
,
J. Vac. Sci. Technol., B
13
,
1635
(
1995
).
47.
R.
Sinton
and
A.
Cuevas
, in
16th European Photovoltaic Solar Energy Conference
(
2000
), Vol. 25, pp.
1152
1155
.
48.
M.
Bivour
,
M.
Reusch
,
S.
Schroer
,
F.
Feldmann
,
J.
Temmler
,
H.
Steinkemper
, and
M.
Hermle
,
IEEE J. Photovoltaics
4
,
566
(
2014
).
49.
M. W.
van Cleef
,
F. A.
Rubinelli
,
R.
Rizzoli
,
R.
Pinghini
,
R. E.
Schropp
, and
W. F.
van der Weg
,
Jpn. J. Appl. Phys., Part 1
37
,
3926
(
1998
).