We carried out a series of simulations analyzing the dependence of mirror reflectance, threshold current density, and differential efficiency on the scattering loss caused by the roughness of tin-doped indium oxide (ITO) intracavity contacts for 405 nm flip-chip III-nitride vertical-cavity surface-emitting lasers (VCSELs). From these results, we determined that the ITO root-mean-square (RMS) roughness should be <1 nm to minimize scattering losses in VCSELs. Motivated by this requirement, we investigated the surface morphology and optoelectronic properties of electron-beam (e-beam) evaporated ITO films, as a function of substrate temperature and oxygen flow and pressure. The transparency and conductivity were seen to increase with increasing temperature. Decreasing the oxygen flow and pressure resulted in an increase in the transparency and resistivity. Neither the temperature, nor oxygen flow and pressure series on single-layer ITO films resulted in highly transparent and conductive films with <1 nm RMS roughness. To achieve <1 nm RMS roughness with good optoelectronic properties, a multi-layer ITO film was developed, utilizing a two-step temperature scheme. The optimized multi-layer ITO films had an RMS roughness of <1 nm, along with a high transparency (∼90% at 405 nm) and low resistivity (∼2 10−4 Ω-cm). This multi-layer ITO e-beam deposition technique is expected to prevent p-GaN plasma damage, typically observed in sputtered ITO films on p-GaN, while simultaneously reducing the threshold current density and increasing the differential efficiency of III-nitride VCSELs.
III-nitride light-emitting diodes (LEDs) commonly employ tin-doped indium oxide (ITO) as the transparent current spreading layer and p-GaN contact. Additionally, ITO has been shown to allow one to avoid exposing multi-quantum wells (MQWs) to excessively high p-GaN growth temperatures in III-nitride edge-emitting laser diodes (EELDs), thereby preventing MQW degradation.1 In the case of III-nitride vertical-cavity surface-emitting lasers (VCSELs), ITO is the most common intracavity contact employed to date,2–12 allowing uniform current spreading across the aperture. Each application requires high transparency, low resistivity, and low contact resistance. However, the surface roughness requirements are different for LEDs, EELDs, and VCSELs. For LEDs, surface roughness enhances extraction efficiency, thereby improving device performance.13–16 For EELDs, the transverse mode does not reach the surface of the ITO, thus the surface roughness is not important. However, in the case of VCSELs, the axial mode does not decay until passing through the ITO layer into the p-side distributed Bragg reflector (p-DBR). If the p-DBR is deposited using conformal deposition techniques, any surface roughness in the ITO will potentially be propagated into the p-DBR layers, leading to scattering loss at every interface. The natural roughness of the p-DBR layers alone may also contribute to a significant amount of scattering loss. The dependence of mirror reflectance (i.e., scattering loss) as a function of surface roughness was thoroughly investigated several decades ago for infrared and microwave applications, using scalar models17 and vector models.18–25 In Section II, we use theoretical models developed by these researches, coupled with the transmission matrix method model, to investigate how ITO surface roughness affects the p-DBR mirror reflectance. Based on these results, we determined that an ITO root mean square (RMS) roughness of ≤1 nm is required for minimizing scattering loss. With this in mind, we carried out a deposition temperature study discussed in Section III, and oxygen flow and pressure series, described in Section IV, for electron-beam (e-beam) deposited ITO. From these results, we designed a multi-layer ITO deposition technique that yields <1 nm RMS roughness, with good optoelectronic characteristics (Section V).
II. THE EFFECT OF ITO SURFACE ROUGHNESS ON p-DBR MIRROR REFLECTANCE AND VCSEL PERFORMANCE
To investigate how ITO surface roughness affects the p-DBR mirror reflectance, we build on the standard transmission matrix method (TMM) model.26 To account for scattering at an interface, the TMM model can be modified by multiplying the complex amplitude reflection coefficient of light passing from layer 1 to layer 2, , by a scattering factor, , as is shown in the equation below
where and are the complex refractive indices for layer 1 and 2, respectively. The scattering factor, , depends on the roughness profile of the interface, which can be described by the RMS roughness, , and the correlation length, . If , where is the wavelength of interest, the scattering factor has the form27,28
If , the scattering factor has the form28
Both of these scattering factor approximations assume , and the surface roughness is random in nature.27,28 The exponential form expresses the phase shift caused by the change in the surface from its mean value. This general model also assumes that volumetric scattering losses are negligible, which is valid in most cases.29 The correlation length can often be determined by analyzing the autocovariance, , of a film measured using atomic force microscopy (AFM), then fitting the data with a Gaussian function of the form
where is the autocorrelation distance.30 The autocovariance function accounts for variations in the amplitude and period of a film's surface features, giving a measure of the average correlation between two points separated by a distance .28 The distance at which the autocovariance function equals 1/e of its initial value is defined as the correlation length, 28 A more complicated analysis of the correlation length can be carried out by representing the autocovariance function as the sum of a Gaussian and exponential term.25,29,31 This yields a term for the long-range correlation length, as well as the short-range correlation length, which can describe surfaces composed of small surface features overlain on larger hillocks. This greatly complicates the general analysis, and thus, we do not employ such a method here.
Using this theoretical framework, we modeled two primary cases: (1) a p-DBR where the ITO surface roughness propagates through the p-DBR stack, also referred to as fully correlated interface roughness,24,32 and (2) the case of the interface roughness gradually decreasing with distance from the ITO interface. To model the second case, we assume the surface roughness as a function of thickness has the form , where is the distance from the ITO surface, is the ITO RMS roughness, and is a roughness factor. Fig. 1(a) shows a plot of the normalized RMS roughness, , as a function of the distance from the ITO interface, for various roughness factor () values. A number of experimentally measured points are also plotted for 38 nm thick e-beam deposited ITO films on m-plane LED epitaxial structures, with roughnesses ranging from 0.6 to 3.2 nm. The 0.6 nm film was an optimized multi-layer film discussed in Section V, while the other samples were single-layer films deposited under various temperatures, discussed in Section III. The roughness was measured on a 1 μm × 1 μm AFM scan. Following the ITO deposition, an 1/8th-wave (λ = 405 nm) layer of Ta2O5 was deposited and the surface was re-analyzed using AFM. Finally, a 1/4-wave layer of SiO2 was deposited and the surface was analyzed, giving the experimental results for the normalized RMS roughness vs. distance from ITO interface (Fig. 1(a)). The SiO2 and Ta2O5 deposition was carried out using a Veeco Nexus Ion Beam Deposition (IBD) system. For the case of IBD deposited DBR layers, the surface roughness decreases with increasing distance from the ITO interface. Other deposition techniques, such as e-beam deposition or plasma-enhanced chemical-vapor deposition (PECVD), are likely to yield rougher DBR layers and the natural roughness of the DBR layer itself is likely to vary among different dielectrics. The exponential function for the decreasing surface roughness was chosen to simplify the boundary condition rules in the simulation. The case of the ITO roughness propagating through all the DBR layers corresponds to a roughness factor .
Next, the modified TMM model was used to analyze the case of a flip-chip p-DBR. This p-DBR is representative of the case of the 405 nm VCSEL reported by Holder et al.2,3 A schematic of the modeled structure can be seen to the right of the plot in Fig. 1(c). The general structure consisted of a p-GaN/ITO interface, a 1/4-wave ITO layer, a 1/8th-wave Ta2O5 spacer, periods of SiO2 and Ta2O5 1/4-wave layers, an SiO2 phase matching layer, a 10 nm Ti layer, and a Au half-space layer. The complex refractive indices for each layer were defined as: , , , , , and . The p-GaN, Ti, and Au refractive indices are taken from Refs. 33, 34, and 35, respectively, while the SiO2, Ta2O5, and ITO indices are taken from ellipsometer measurements. The SiO2 film was fit using a Cauchy film on a Si substrate model, with the form . The Ta2O5 film was fit using a Cauchy film on a Si substrate model, with the form . The ITO films were fit using a Tauc-Lorentz oscillator model, discussed in more detail in Section III. For this part of the analysis, the ITO was assumed to be non-absorbing (lossless) to separate the effects of absorption loss from scattering loss.
The results for the case of are shown in Figs. 1(b) and 1(c). Fig. 1(b) shows the mirror reflectance as a function of the number of mirror periods and roughness factor, for various ITO RMS roughness values, . As the roughness factor decreases, the p-DBR mirror reflectance increases. This shows that if the initial ITO RMS roughness is ∼4 nm, then the roughness must reduce to ∼35% of its initial value within the first 100 nm of the DBR layers ( nm, Fig. 1(a)), in order to achieve >99.5% p-DBR mirror reflectance, which is a common requirement for the back-side VCSEL mirror. Fig. 1(c) shows the case of . For p-DBRs with a fully correlated roughness, the reflectance drops to < 99.5% at >1 nm RMS roughness.
The results for the case of are shown in Fig. 2. For this case, it is necessary to know the correlation length for the surface of interest. To find , AFM measurements were carried out on a number of e-beam deposited ITO surfaces with RMS roughnesses ranging from 0.6 nm to 4 nm. The autocovariance of the surface was then analyzed using Gwyddion 2.36, a free surface probe analysis software package,36 and the data were fit using Eq. (4). The average correlation length was ∼25 6 nm, thus we simulated the case of nm. The correlation length showed no trend with RMS roughness for multi-layer and single-layer films analyzed. Figure 2(a) shows the p-DBR reflectance as a function of the number of mirror periods, m, and the roughness factor, , for ITO RMS roughnesses ranging from 0 to 7 nm. Comparing Fig. 1(b) with Fig. 2(a), we see that the ITO surface roughness has much less of an effect on scattering loss in the case of . Fig. 2(b) shows the case of for . In contrast to Fig. 1(c), where , we see that at 4 nm RMS roughness the p-DBR reflectance is ∼99.5%, showing that the scattering loss from the ITO is not as detrimental as the case of suggests. Nevertheless, surfaces often have long-range and short-range correlation lengths,25,29,31 and the measured correlation length (25 nm) and wavelength of interested (405 nm/∼2) do not strictly satisfy the condition , thus the true p-DBR mirror reflectance value will likely sit somewhere between the case of and . The case of and thus give the upper and lower bounds of the potential surface roughness scattering loss.
To investigate the effect of ITO RMS roughness on VCSEL performance, we carried out a 1D TMM simulation of the cavity mode in a single longitudinal mode 405 nm VCSEL with a 3 QW, 8 nm QW width, 1 nm barrier, and 5 nm electron-blocking layer (EBL) design. The relevant material constants are shown in Table I. Table II states the relevant cavity parameters used in determining the VCSEL performance metrics, with being the effective n-DBR penetration depth, being the effective p-DBR penetration depth, being the effective cavity length, being the enhancement factor, being the fill factor, being the lateral confinement factor, being the total confinement factor, being the n-DBR reflectance, being the p-DBR reflectance without scattering or absorption accounted for (i.e., lossless, ideal mirror), being the internal loss, and being the ideal mirror loss. The lateral confinement factor is assumed to be 1. The ITO layer is aligned to a null of the cavity mode in order to minimize the internal absorption loss.
|VCSEL material constants .|
|Layer .||Thickness (nm) .||Refractive index, n .||Absorption coeff., (cm−1) .|
|10P n-DBR (SiO2 + Ta2O5)||10 × (66.8 + 45.6)||2.21 + 1.516||0|
|3× MQW(405 nm)||InGaN||8||2.72||-gth|
|16P p-DBR (SiO2 + Ta2O5)||16 × (66.8 + 45.6)||2.21 + 1.516||0|
|VCSEL material constants .|
|Layer .||Thickness (nm) .||Refractive index, n .||Absorption coeff., (cm−1) .|
|10P n-DBR (SiO2 + Ta2O5)||10 × (66.8 + 45.6)||2.21 + 1.516||0|
|3× MQW(405 nm)||InGaN||8||2.72||-gth|
|16P p-DBR (SiO2 + Ta2O5)||16 × (66.8 + 45.6)||2.21 + 1.516||0|
|VCSEL cavity properties .|
|VCSEL cavity properties .|
To calculate the threshold material gain, the scattering loss can be coupled into the mirror loss, , through the change in p-DBR reflectance as a function of ITO RMS roughness (Figs. 1 and 2). However, to calculate the differential efficiency, we must separate the mirror loss resulting from the scattering of light caused by roughness, from the mirror loss in the ideal, non-absorbing, non-scattering (lossless, ideal) mirror. This scattering loss, , can be written as
For a DBR, the scattering factor, , can be most easily determined using Eq. (1), which can be re-written for this particular case of interest, as , where is the p-DBR reflectance with scattering accounted for, plotted in Figs. 1 and 2. Separating the scattering loss, , from the ideal mirror loss, , is not necessary for determining the threshold gain because all losses additively contribute to the threshold modal gain, which has the form . However, separating the scattering loss from the ideal mirror loss is necessary for determining the top-side differential efficiency because it has the basic form , where is the fraction of stimulated emission emitted out the top-side of the device, and is the injection efficiency.26 As can be seen in this equation, if one couples the scattering loss with the ideal mirror loss, the differential efficiency of the device would be predicted to increase with increasing roughness, which is illogical. Scattered light does not transmit through a mirror in-phase with the stimulated emission of the cavity, thus it is not a useful form of emission for a VCSEL. In contrast, the ideal mirror loss term can be seen as a useful form of loss because a lower mirror reflectance results from fewer DBR mirror periods allowing more in-phase (stimulated) emission to be transmitted through the mirror, leading to an increased differential efficiency and higher output power. This logic leads to a modified function for top-side differential efficiency, written as
Figure 3 summarizes the effect of the ITO RMS roughness on the scattering loss, threshold material gain, threshold current density, and differential efficiency for the modeled 405 nm VCSEL described in Tables I and II. Figure 3(a) shows a breakdown of the various sources of modal loss present in the cavity. For the case of and , the scattering loss is seen to become greater than the ideal mirror loss, when the ITO RMS roughness increases to >1 nm. The large absorption coefficient (2000 cm−1) of the ITO layer at 405 nm leads to a high internal loss, which lowers the fraction of the total modal loss contributed by the scattering loss. Shorter wavelength VCSELs would operate nearer to the absorption edge for ITO, leading to a higher ITO absorption coefficient and a higher internal loss. Longer wavelength VCSELs would operate further from the ITO absorption edge, where the ITO absorption would be due to free carrier absorption, typically much less than band-edge absorption,37,38 causing the scattering loss to contribute to a larger percentage of the total cavity loss.
Using the results of Fig. 3(a), we determine the threshold material gain, , vs. ITO RMS roughness, shown in Fig. 3(b). To convert the threshold material gain into threshold current density, we assumed the modeled structure would have a material gain vs. current density trend () identical to that reported in Ref. 39. This is a reasonable assumption because the structure modeled here has the same number of QWs and QW width as is reported in Ref. 39. The threshold current density, , and top-side differential efficiency, vs. ITO RMS roughness are shown in Fig. 3(c), where the top-side differential efficiency was calculated using Eq. (6). For both cases ( and ), we see that having <1 nm RMS roughness ITO intracavity contacts will minimize the threshold current density. For , having >2 nm RMS roughness will yield a threshold current density >10 kA/cm2, effectively preventing CW operation. For , having >3 nm RMS roughness will yield >10 kA/cm2, thus the effect of scattering loss is not as catastrophic. Comparing the and trends, shown in Fig. 3(c), we see that for low roughness values, the scattering loss has a more significant effect on than on . Specifically, for a 1 nm RMS roughness, there is a ∼6%–23% reduction in the differential efficiency, while there is a ∼6%–12% increase in the threshold current density. The stronger dependence of on scattering loss, for low roughness values, is a result of the differential efficiency being directly proportional to the scattering loss (Eq. (6)), while the threshold current density, , is related to the threshold material gain, , through the phenomenological equation , where is the transparency current density, is the linearity parameter, and is the empirical gain coefficient.26,39 Overall, this demonstrates that in both cases ( and ) having <1 nm RMS roughness is critical for maximizing the differential efficiency and output power, even though the threshold current density is not as heavily dependent on the RMS roughness for the case of .
In summary, for the case of and , it is evident that surface roughness plays an important role in determining the scattering loss for VCSELs. Because VCSELs have a very low loss budget, due to the high number of round trip passes necessary to achieve gain in very narrow cavities, it is critical to reduce any potential sources of loss in such devices. Thus minimizing the ITO roughness to <1 nm RMS can help reduce mirror scattering loss in VCSELs.
III. ITO TEMPERATURE DEPENDENT MORPHOLGICAL AND OPTOELECTRONIC PROPERTIES
As a result of the strict optoelectronic and morphological requirement for the intracavity contact (ITO), nearly every published III-nitride VCSEL has employed ITO deposited by companies, including MES AFTY Co.,2 Nichia Co.,4–6 Canon Co.,9–11,40 and Evatec Co.8 Of these, only the MES AFTY ITO deposition technique is specifically identified as electron-cyclotron-resonance (ECR) plasma deposition,41 however, it is likely that all are using a remote plasma41,42 or an ion assisted e-beam deposition technique.43 Beyond the requirement for very smooth ITO, remote plasma or physical vapor deposition techniques are necessary to prevent p-GaN plasma damage,44–47 thus restricting researchers from employing conventional direct plasma sputtering tools for ITO deposition. While these advanced techniques do yield high quality ITO films with low surface roughness, without damaging p-GaN, they are relatively complex and expensive. Thus a method for achieving high quality ITO using a conventional e-beam is important for reducing the cost and complexity of III-nitride VCSELs research. Furthermore, other devices, such as organic LEDs (OLEDs), III-nitride LEDs, or EELDs would also benefit from depositing ITO using e-beam evaporation, rather than sputtering. However, in these cases, the requirement for low surface roughness is not as strict as it is in the case of VCSELs, making obtaining highly transparent and conductive e-beam deposited ITO films less of a challenge.
In general, e-beam deposited ITO films typically have RMS roughnesses on the order of 0.5–6 nm, transparencies of ∼80% at 405 nm, resistivities slightly higher than those achieved using sputtering techniques (10−3–10−4 Ω-cm), and p-GaN contact resistances lower than those reported for many sputtered contacts (10−2–10−3 Ω-cm2).40,48–61 As observed in this study, when ITO is deposited at room temperature, the films are typically smooth with 1 nm RMS roughness, however, they exhibit poor optoelectronic properties, which would lead to large absorption losses and poor current spreading in the aperture of a VCSEL.57–59,61 There are many reports on improving the optoelectronic properties of e-beam deposited ITO films by varying the post deposition annealing conditions, however, this generally results in increasing the RMS roughness to >1 nm, making such post-deposition annealing processes inappropriate for VCSELs.49–54,57,58,60,61
With this in mind, we analyzed the dependence of resistivity (ρ) and sheet resistance (Rs), percent transmission (%T), relative contact resistance, and surface morphology on the substrate temperature and oxygen flow during ITO deposition. Based on these results, we combined the high quality optoelectronic properties of high temperature ITO films, with the low surface roughness (σ) properties of the low temperature films by depositing a thin low temperature (LT) ITO film, followed by a thick high temperature (HT) ITO film. To determine the optimal thickness for the thin, LT ITO layer in the multi-layer films, we varied the LT layer thickness, while holding the total thickness constant in the multi-layer ITO films, and analyzed the optoelectronic and morphological properties for each film.
A standard bell jar e-beam chamber was used to evaporate In2O3/SnO2 (90/10 wt. %) source material purchased from Kurt J. Lesker (Part No. EVMITO40). The source-substrate distance was ∼29 cm. Substrate heating was achieved using a custom built resistive heater wired to a Variac AC controller. The maximum heater temperature was ∼285 °C. The heat-up and cool-down rate was 5 V/5 min. Samples were held using clips and the temperature was measured using a thermocouple inserted into the metal chuck between the heating block and the substrate. The chamber was evacuated to <3 10−6 Torr before introducing O2. The chamber pressure was controlled by the oxygen flow. Following the deposition, the O2 flow and chamber pressure were held constant until <100 °C was reached, then the samples were unloaded in atmosphere. The deposition rate was monitored in-situ using a quartz crystal monitor (QCM). Ex-situ thickness measurements were made using a J. Woollam M-2000 DI Variable Angle Spectroscopic Ellipsometer. A number of test samples also used confocal microscopy and stylus profilometry to confirm the deposition rate measured by the QCM. The ellipsometer measured thickness was used to calculate the resistivity from the 4-point probe measured sheet resistance, discussed in detail below. Prior to deposition, each sample was dipped in 1:1 HCl:H2O solution for 30 s, rinsed in DI water, and dried with N2.
The ITO ellipsometer measurements were carried out at angles of 55°, 65°, and 75°, over a spectral range of 270 nm–1000 nm. CompleteEASE software from J. Woollam was used to analyze the measured Ψ and Δ vs. wavelength information. The model consisted of a Si substrate and a generic oscillator (Tauc-Lorentz) layer representing the modeled ITO film. This yields a 5 parameter fit. The relative standard deviation of the fit parameters between all measured films was 5%.62,63 For the specific case of the 38 nm multi-layer ITO film with a 5.5 nm low-temperature layer, shown in Fig. 7, the Tauc-Lorentz oscillator model had a high frequency dielectric constant, , of 2.866 eV, a UV pole amplitude, AUV, of 18.32, a UV pole energy, E, of 5.463 eV, an IR pole amplitude, AIR, of 2.0473, an oscillator amplitude, A, of 11.899, a broadening term, Br, of 1.042, a resonance energy, E0, of 4.559, and an absorption onset energy, Eg, of 2.564 eV.62,63 The mean-square-error (MSE) over the measured spectral range was <10 for all films. The MSE was calculated using the weighted N, C, and S model describe in the CompleteEASE user manual,62 where an MSE of ∼1 implies an ideal fit. The error in the measured thickness was typically less than 0.05 nm. A number of more complicated models, which accounted for surface roughness and possible gradients in refractive index through the ITO films,62 were also tested. While these models did yield significantly different refractive index dispersion profiles, there was little variation in the measured thickness, compared to the simplified Tauc-Lorentz oscillator model. Also, these additional layers of complication did not significantly reduced the MSE, thus we chose to use the more simplified model. Details on the determination of the MSE can be found in the CompleteEASE user manual, along with additional details on fitting ellipsometer data and building ellipsometer models generally.62
For each series, three substrates were co-loaded: (1) double-side polished (DSP) sapphire, (2) (100) polished Si, and (3) GaN LEDs (405 nm emission wavelength, λ) grown by atmospheric pressure metal-organic chemical vapor deposition on free-standing m-plane GaN substrates manufactured by Mitsubishi Chemical.64–66 The n-GaN, MQW, and p-GaN structure was similar to that describe by Holder et al. (with the substrate and n-GaN template still in place, and no sacrificial MQW layer present).2,3 A CDE ResMap 4-point probe was used to measure the ρ and Rs on the ITO/DSP sapphire samples. The ellipsometer measurements were carried out on the ITO/Si samples. A Carry 500 Spectrophotometer was used to measure the transparency on the ITO/DSP sapphire samples, after normalizing to a bare DSP sapphire substrate. The transparency measurement error was 0.5%. An Asylum MFP-3D Atomic-Force Microscope (AFM) (<50 pm noise floor), equipped with an AppNano Forta (single crystal silicon) AFM probe, was used to measure the surface morphology on the ITO/LED samples. Measuring the same area on a representative test sample three times gave an RMS roughness standard deviation of 6 pm. After AFM analysis, 40 μm radius ITO contacts were etched using a methane-hydrogen-argon etch on the ITO/LED samples. Pd (10 nm)/Au (200 nm) p-contacts and blanket Ti (10 nm)/Au (200 nm) backside n-contacts were then deposited via e-beam evaporation. Pulsed current-voltage (I-V) measurements were made at 1% duty cycle with pulse width of 1 μs and the voltage at 1 kA/cm2 was recorded to give an idea of the relative contact resistance. The p++GaN layer in all LED samples was optimized in a method similar to that reported in Ref. 67, where a specific contact resistivity of ∼4 10−4 Ω-cm2 is reported for Pd/p++GaN contacts. The standard deviation between multiple 4-point probe measurements and I-V measurements, on the same samples, was generally within the size of the symbolic markers in the plotted data, thus error bars are not included.
To analyze the optoelectronic and morphological dependence of the ITO films on the substrate temperature, 18 nm ITO films were deposited at 30 sccm O2 flow (0.27 mTorr), at a rate of 0.15 Å/s, over a range of temperatures from 45 °C to 250 °C. Figure 4 shows the results of the dependence of the optoelectronic characteristics on temperature. Figure 5 shows the morphological dependence on temperature. At 45 °C and 96 °C, the films appear to be amorphous with periodically spaced large crystalline clusters (Fig. 5(a)). This agrees with the literature, where a crystallization temperature of ∼150 °C is commonly reported, which is close to the melting point of In metal (157 °C).54,68,69 Additionally, transmission electron microscopy (TEM) analyses reported by Muranaka et al.70 and x-ray diffraction measurements by Sun et al.69 on a similar temperature series show that low temperature films are amorphous with periodic crystalline island regions. With the large crystalline clusters excluded, the amorphous regions on films deposited at 45 °C and 96 °C have an RMS roughness of <0.5 nm. Figure 5(b) shows the RMS roughness with the large crystalline clusters included in the measurement, where one can see the crystalline clusters cause the RMS roughness to be >1 nm for the 45 °C film. The dominant amorphous nature of these films leads to a high resistivity and voltage at 1 kA/cm2 of ∼1 10−2 Ω-cm and ∼7 V (Figs. 4(a) and 4(b)). Additionally, Habermeier71 has suggested that increasing the deposition temperature may also increase the oxygen vacancy concentration, thereby contributing to the reduction in the resistivity. It should also be noted that hydrogen interstitials have recently been shown to act as donors in indium oxide.72–76 The transparency increases with temperature from 45 °C to 96 °C (Figs. 4(c) and Fig. 5(b)). This can be attributed to a marginal increase in the crystallinity. At 135 °C the onset of crystallization is evident, with a high density of grains surrounded by amorphous regions (Fig. 5(a)). At this temperature, the nucleation of grains leads to an increase of the surface roughness to ∼3.5 nm (Fig. 5(b)). As the temperature is increased further to 163 °C and 194 °C, the grain size increases and the amorphous regions are no longer visible (Fig. 5(a)). At 194 °C, with the largest grains seen in the series, the RMS roughness is ∼5.5 nm (Fig. 5(b)). Above 194 °C the grain size and RMS roughness begins to decrease (Fig. 5). This trend in the grain size vs. temperature is counterintuitive to traditional models of grain growth vs. temperature.77 The reason for this is that ITO initially grows in an amorphous state and crystallizes as thickness increases, regardless of the substrate temperature.69,70 As temperature increases, the density of crystalline nucleation sites embedded in the amorphous region increases, and the thickness at which the crystallites begin to form decreases.69,70 This implies that at intermediate temperatures, (i.e., 163 °C and 195 °C), there is a relatively low density of nucleation sites when the films are very thin, which allows the formation of larger grains as films grow thicker. However, at high temperatures (i.e., 229 °C), there is a high density of nucleation sites when the films are very thin, resulting in smaller, more uniform grains when the final thickness of 18 nm is reached. By ∼250 °C, the film morphology is homogeneous, with an RMS roughness of ∼2.5 nm. Muranaka et al.70 report a saturation of the grain size at >300 °C, which implies that the trend of reducing grain size and RMS roughness, observed in this study, would not continue at higher temperatures.
In general, a linear decrease of ρ, Rs, and voltage at 1 kA/cm2 is observed with increasing temperature, resulting in a resistivity of ∼2 10−4 Ω-cm and a voltage at 1 kA/cm2 (∼50 mA) of ∼4.5 V, which is ∼0.5 V greater than the voltage measured on samples with Pd/Au contacts to p-GaN (Figs. 4(a) and 4(b)). Because Sn does not contribute carriers (i.e., it acts as a neutral impurity) when ITO is amorphous,78 the relative change in sheet resistivity corresponds to the relative reduction in the amorphous area of the films with increasing temperature. Assuming the differential resistance of the 405 nm LED samples is dominated by the contact resistance, we estimate a specific contact resistivity of ∼7.8 10−4 Ω-cm2 for the Pd/Au contact, and ∼1.3 10−3 Ω-cm2 for the ITO contacts deposited at 251 °C, operating at 4.41 V at 1 kA/cm2. This ITO/p-GaN specific contact resistivity is lower than many values reported in the literature.40,48,51–53 Additionally, these values are an upper bound on the true contact resistivity, as any additional sources of resistance, such as those resulting from band-offsets in the epitaxial layers, would lower the contribution of the contact to the measured voltage of the device, thereby lowering the calculated contact resistivity.
The ITO film deposited at a low temperature of 45 °C shows a low transparency (Figs. 4(c) and 5(b)). Between 96 °C and 194 °C, the transmission spectrum remains relatively unchanged (Fig. 4(c)). This range of temperatures is around the reported crystallization temperature of 150 °C, suggesting that complete crystallization does not occur until >194 °C. This is supported by the AFM images of these samples (Fig. 5(a)), all of which show a gradually increasing area of crystalline regions surrounded by a decreasing area of amorphous regions, with increasing temperature. At 229 °C, the transparency has substantially increased, however, a short wavelength transmission tail, observed in all the films with amorphous regions, is still evident (Fig. 4(c)). At 251 °C, a sharp absorption edge is observed in the transmission spectrum, suggesting that the film is fully crystallized.
In summary, as temperature increased the resistance and resistivity linearly decreased (Fig. 4(a)), the voltage at 1 kA/cm2 decreased to near the value of Pd/Au contacts (Fig. 4(b)), and the transparency increased until saturating at ∼90% at 405 nm (Figs. 4(c) and 5(b)). Additionally, the RMS roughness initially increased, up to a value of ∼5 nm at ∼200 °C, then began to decrease at higher temperatures (Fig. 5(a)). High quality optoelectronic characteristics and <1 nm RMS roughness films could not be simultaneously achieved by depositing single-layer ITO films at one temperature.
IV. ITO O2 FLOW AND PRESSURE DEPENDANCE OF MORPHOLGICAL AND OPTOELECTRONIC PROPERTIES
The effect of oxygen flow and pressure on the morphological and optoelectronic properties of ITO was explored by depositing 35 nm ITO films at 250 °C, at a rate of 0.15 Å/s, for oxygen flows ranging from 30 sccm to 1 sccm, yielding a range of pressures from 0.27 to 0.015 mTorr. The results of this series are shown in Fig. 6. The resistivity and transparency remained relatively constant when the O2 flow was decreased from 30 sccm (0.27 mTorr) to 10 sccm (0.12 mTorr). At 1 sccm O2 flow (0.015 mTorr), the resistivity increased by a factor of 3 (Fig. 6(a)), while the transparency also increased from ∼90% at 405 nm for O2 flows in the range of 10–30 sccm, to ∼95% at 405 nm (Figs. 6(a) and 6(d)), due to the reduction in the free carrier abosrption.56 The RMS roughness consistently increased from ∼4 nm at 30 sccm O2 to ∼32 nm at 1 sccm O2 flow (Figs. 6(c) and 6(d)). This RMS value of 32 nm is the highest reported for ITO and could be useful for LED applications. The trend of RMS roughness vs. O2 flow and pressure (Figs. 6(c) and 6(d)) shows that the ITO roughness cannot be reduced to <1 nm RMS by varying the O2 flow and pressure, at temperatures that yield highly transparent and conductive films.
The slight increase in resistivity and transparency are in good agreement with previous reports on the effects of O2 on ITO.56,79,80 The increase in resistivity with decreasing O2 pressure was shown to be due to a small increase in the carrier concentration, outweighed by a large decrease in the mobility.56,79,80 This effect can be attributed to the increased oxygen vacancy concentration as the O2 pressure is decreased.56,79,80 It is of note that the dependence of resistivity on O2 flow and pressure generally shows a convex parabolic trend, thus it is likely that if we were able to increase the O2 pressure further, without shutting down the e-beam, the resistivity would be seen to increase again, due to the oversaturation of oxygen contributing to the formation of defects and structural imperfections.56,79–82 Furthermore, it is important to recognize that the optimal O2 pressure is dependent on deposition temperature.56
Given that the films deposited at low O2 flow are not only extremely rough, but are also highly transparent (95% at 405 nm) and conductive (ρ∼3.5 10−3 Ω-cm), we believe depositing ITO under low O2 flow and pressure is optimal for LED applications, as the increased roughness and transparency would improve light extraction. We did not measure the voltage at 1 kA/cm2 for this series, however based on the temperature series results, it is likely that the ITO deposited at 1 sccm O2 flow would only experience a marginal increase in voltage, compared to the samples with lower resistivity. Finally, comparing the 35 nm film deposited at 30 sccm O2 and 250 °C in Fig. 6(c) to the 18 nm film deposited under the same conditions in Fig. 5(a), also reveals that RMS roughness and grain size are increasing with film thickness.
V. MULTI-LAYER ITO FILMS: OPTIMAL LT LAYER THICKNESS
Our primary goal of the temperature and O2 flow and pressure investigations was to determine if ITO films with high optoelectronic quality could be achieved with a surface roughness of <1 nm RMS in order to mitigate scattering losses in VCSEL p-DBRs. As Figs. 4–6 show, this cannot be achieved by varying the deposition temperature or O2 flow alone. However, based on the temperature and O2 flow dependence of the RMS roughness, and the knowledge that very thin films (< 10 nm) deposited at low temperatures (around 100 °C) tend to exhibit partially or completely amorphous, very smooth surfaces without a high density of crystalline nucleation sites,69,70 we hypothesized that a two-step temperature growth scheme, consisting of a thin layer of ITO grown at ∼100 °C, followed by a thicker high temperature ITO layer, grown at ≥250 °C, would promote the growth of large ITO grains with <1 nm RMS surface roughness, as seen in the low temperature films, while maintaining the good optoelectronic properties of the high temperature films.
In order to determine the optimal low temperature layer thickness, a series of multi-layer ITO films were deposited at 30 sccm O2 (0.27 mTorr), at a rate of 0.15 A/s. Each multi-layer film consisted of a LT ITO layer, deposited at 100 °C, followed by a HT ITO layer, deposited at 285 °C. The total thickness was held constant at ∼38 nm, while the LT layer thickness was varied from 0.7 nm to 5.5 nm. 38 nm thick single-layer LT and HT control samples were also deposited.
Figure 7 shows the results of the two-step substrate temperature series. For each sample, resistivity, transparency, and AFM analysis were carried out before and after ex-situ annealing in an AET Thermal RX Rapid Thermal Annealer (RTA) at 600 °C for 10 min under atmospheric pressure with 6 slm N2 flow and 1.5 slm O2 flow. Figure 7(a) shows the measured sheet resistance and resistivity for each of the samples. As was seen in the temperature series (Fig. 4(a)), the unannealed LT control sample had a high resistivity of 10−2 Ω-cm, however upon annealing, the resistivity was reduced to the value of the HT control sample and the multi-layer samples. It is also of note that annealing the HT control sample and the multi-layer samples resulted in a small increase in the resistivity. Increasing the LT layer thickness had no effect on the resistivity.
In general, amorphous ITO films deposited at low temperatures exhibit a decrease in resistivity upon annealing due to a large increase in carrier concentration, coupled with a small decrease in the mobility, as a result of the annealing induced crystallization.54,68 In contrast, crystalline ITO films are much more sensitive to the annealing temperature, tending toward a slight decrease in resistivity at moderate annealing temperatures (i.e., <300 °C)68,83 and an increase in resistivity at high annealing temperatures (i.e., >350 °C).83,84 This is a result of the mobility continually decreasing upon annealing as-deposited crystalline films, coupled with an initial increase in the carrier concentration up to ∼350 °C annealing temperatures, followed by a rapid decrease in carrier concentration above this temperature.68,83,84 The increase in carrier concentration after annealing at low temperatures is attributed to a marginal increase in crystal quality, while the decrease in carrier concentration at high temperatures is attributed to the segregation of Sn at grain boundaries68 and/or the reduction in oxygen vacancy concentration and the formation of SnOx complexes when annealing is performed in the presence of oxygen.83,84
Figure 7(b) shows the voltage at 1 kA/cm2 measured on processed LEDs. The data points for the unannealed samples, shown in Fig. 7(b), are from a second set of samples. Overall the trends are similar to that observed for the resistivity analysis (Fig. 7(a)). Specifically, the LT control sample shows an improved voltage upon annealing, while the multi-layer films and the HT control samples show no significant change in the voltage, suggesting that the contact resistance is not improved by annealing as-deposited crystalline ITO films. Assuming the contact resistance dominates the differential resistance for the 405 nm LED, we approximate the annealed 5.5 nm LT layer thickness sample, operating at 4.45 V at 1 kA/cm2 (∼50 mA), to have a specific contact resistivity of ∼1.4 10−3 Ω-cm2.
Figure 7(d) shows the AFM images taken on the series of samples before and after annealing. As can be seen, annealing the samples did not result in a drastic change in grain size or morphology. Comparing the LT control sample to the multi-layer films shows that the multi-layer films do not exhibit the large crystalline clusters surrounded by amorphous regions, as seen in single-layer films deposited at 100 °C. This suggests that the initial LT layer crystallizes upon ramping the heater to 285 °C. This is supported by annealing experiments reported in the literature70 which show crystallization of 55 nm amorphous films upon annealing at 300 °C. We hypothesize that by depositing a thin LT layer the ITO forms a small number of nucleation sites. Upon heating, large grains are able to grow due to the small number of nucleation sites, characteristic of thin LT ITO films.69,70 Once these large grains are formed the high temperature deposited ITO easily crystallizes, rather than forming an initially amorphous layer with many nucleation sites. This results in the formation of large primary grains which grow vertically by consuming the smaller secondary nucleated grains sitting on top of the larger grains. In agreement with this hypothesis, the AFM images shown in Fig. 7(d) for the multi-layer films with LT layers between 3.4 and 5.5 nm show a morphology that appears to consist of large primary grains covered with smaller secondary grains.
Figure 7(c) shows the RMS roughness and transmission at 405 nm for the multi-layer ITO films series. As the LT layer thicknesses increase the RMS roughness gradually drops from 4 nm RMS to <1 nm RMS for a LT layer thicknesses of ∼4.5 and 5.5 nm. Observing the transparency trend shown in Fig. 7(c), we see that the thin LT layer has no significant effect on the transparency and the transparency remains on the order of the HT control sample, regardless of the LT layer thickness. Comparing the unannealed and annealed data points in Fig. 7(c), it is apparent that the RMS roughness does not change upon annealing. Furthermore, for the HT control sample and the multi-layer films, the transparency does not change significantly upon annealing. However, the LT control sample shows a significant improvement upon annealing, as is expected from amorphous ITO films which crystallize upon annealing (Section III).
Experiments, not shown in here, have confirmed the generality of this multi-layer ITO method for achieving highly smooth ITO films with good optoelectronic properties. Specifically, we have also grown multi-layer films with the LT layer being deposited at room temperature and the HT layer being deposited at ∼400 °C (using a commercial heater from Heatwave Labs, Inc.). It was observed that the primary grain size increased, due to the reduced number of nucleation sites for the LT layer deposited at room-temperature. Additionally, the optoelectronic properties of these films were equivalent to those of single-layer HT films. Finally, it is of note that this general multi-layer technique could also be applied to LEDs by depositing a thin HT layer at a high O2 pressure and a thick HT layer at a low O2 pressure to yield very rough films with a low resistivity and contact resistances.
In summary, in Section II we analyzed simulation results utilizing the transmission matrix method which gave insight into the effect of the roughness of ITO on the p-DBR mirror reflectance (scattering loss) in flip-chip III-nitride VCSELs. From this analysis, we concluded that achieving an ITO roughness of <1 nm RMS is optimal to minimize scattering loss. Motivated by this result, we investigated the dependence of ITO morphology, resistivity, effective contact resistance (voltage at 1 kA/cm2), and transparency, on the substrate temperature (Section III), and O2 flow and pressure (Section IV). Being unable to achieve < 1 nm RMS roughness, while maintaining good optoelectronic properties, by varying the substrate temperature or O2 flow and pressure, we designed a multi-layer ITO film consisting of a thin layer deposited at a low temperature, followed by a thick layer deposited at a high temperature. By optimizing the low temperature layer thickness, we achieved <1 nm RMS roughness ITO films, while maintain a low resistivity and a high transparency (Section V). Furthermore, in Section V we analyzed the effect of annealing ITO at 600 °C in a N2 and O2 ambient atmosphere. The results from these studies not only give insight into III-nitride VCSELs, but also build on the fundamental understanding of the nature of ITO deposited using e-beam evaporation.
The authors would like to thank Mitsubishi Chemical Corporation for providing high-quality free-standing m-plane GaN substrates, Tony Bosch at the UCSB Nanofabrication facility for e-beam system support, Nina Hong at J. Woollam for ellipsometer modeling expertise, and Daniel F. Feezell at the University of New Mexico for general discussions on VCSELs. This work was funded in part by the King Abdulaziz City for Science and Technology (KACST) Technology Innovations Center (TIC) program, and the Solid State Lighting and Energy Electronics Center (SSLEEC) at the University of California, Santa Barbara (UCSB). Partial funding for this work came from Professor Boon S. Ooi at King Abdullah University of Science and Technology (KAUST), through his participation in the KACST-TIC program. A portion of this work was done in the UCSB nanofabrication facility, with support from the NSF NNIN network (ECS-03357650), as well as the UCSB Materials Research Laboratory (MRL), which is supported by the NSF MRSEC program (DMR-1121053).