The controlled depletion of electrons in semiconductors is the basis for numerous devices. Reactive-ion etching provides an effective technique for fabricating both classical and quantum devices. However, Fermi-level pinning must be carefully considered in the development of small devices, such as quantum dots. Because of depletion, the electrical size of the device is reduced in comparison with its physical dimension. To investigate this issue in modulation-doped silicon single-electron transistors, we fabricate several types of devices in silicon-germanium heterostructures using two different etches, CF4 and SF6. We estimate the depletion width associated with each etch by two methods: (i) conductance measurements in etched wires of decreasing thickness (to determine the onset of depletion), and (ii) capacitance measurements of quantum dots (to estimate the size of the active region). We find that the SF6 etch causes a much smaller depletion width, making it more suitable for device fabrication.

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