Nonlinear and linearized algorithms for the Young’s modulus extraction of thin films through the capacitance-voltage measurement of microstructures

Two high-precision algorithms, based on nonlinear and linearized models, for the Young’s modulus extraction of thin films through the wafer-level capacitance-voltage (⁠$C-V$⁠) measurement of microstructures are developed and compared with each other. Two microcantilever beams made of single crystalline silicon are used to verify the present methodologies since the Young’s modulus of single crystalline silicon has been well defined. The average value of the Young’s modulus in (110) crystalline plane extracted by the present methods is about 170 GPa, and the error is within 2% compared to the well-defined value of 168 GPa. Thus, the accuracy and precision of the present methodology are verified. The results obtained by the nonlinear algorithm seem to be a little better than the ones obtained by the linearized algorithm. However, the linearized algorithm can provide the Young’s modulus as an explicit function of capacitance and voltage and can self-eliminate the capacitance measurement error from the bias-unrelated parasitic capacitances caused by the layout, the probing lines, or the misalignment of upper and bottom electrodes. The present methods could be accomplished using existing semiconductor testing equipments through probing on the bonding pads of devices because the driving and measured signals are both electrical. Since hardware replacement could be avoided, the present methodology shows substantial advantage over other property-extraction methods for large-scale implementation in semiconductor or microelectromechanical system fabrications.