Much work has been done in the approximation of the stress state of microelectronic interconnects on chips. The thermally induced stresses in passivated interconnects are of interest as they are used as input in interconnect reliability failure models (stress-driven void growth, electromigration-driven void growth). The classical continuum mechanics and physics typically used is, however, intrinsically size independent. This is in contradiction to the physical fact that at the size scale of a few nanometers, the elastic state is size dependent and a departure from classical mechanics is expected. In this work, we address the various physical causes (and the affiliated mathematical modeling) of the size dependency of mechanical stresses in nanointerconnects. In essence, we present scaling laws for mechanical stresses valid for nanosized interconnects.
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1 March 2004
Research Article|
March 01 2004
On the scaling of thermal stresses in passivated nanointerconnects Available to Purchase
P. Sharma;
P. Sharma
Department of Mechanical Engineering, University of Houston, Houston, Texas 77204
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S. Ganti;
S. Ganti
Advanced Mechanical Technologies, General Electric Global Research Center, Niskayuna, New York 12309
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H. Ardebili;
H. Ardebili
Micro and Nanostructures Technology, General Electric Global Research Center, Niskayuna, New York 12309
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A. Alizadeh
A. Alizadeh
Polymers and Specialty Chemicals Technology, General Electric Global Research Center, Niskayuna, New York 12309
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P. Sharma
S. Ganti
H. Ardebili
A. Alizadeh
Department of Mechanical Engineering, University of Houston, Houston, Texas 77204
J. Appl. Phys. 95, 2763–2769 (2004)
Article history
Received:
July 24 2003
Accepted:
October 19 2003
Citation
P. Sharma, S. Ganti, H. Ardebili, A. Alizadeh; On the scaling of thermal stresses in passivated nanointerconnects. J. Appl. Phys. 1 March 2004; 95 (5): 2763–2769. https://doi.org/10.1063/1.1632011
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