Strain relaxed buffer layers on Si(001) can be used as virtual substrates for the growth of both strained Si and strained SiGe, which are suitable materials for sub-7 nm CMOS devices due to their enhanced carrier mobility. For industrial applications, the threading dislocation density (TDD) has to be as low as possible. However, a reduction of the TDD is limited by the balance between dislocation glide and nucleation as well as dislocation blocking. The relaxation mechanism of low strain layers on commercial substrates is compared to substrates with a predeposited SiGe backside layer, which provides threading dislocations at the edge of the wafer. It is shown that by the exploitation of this reservoir, the critical thickness for plastic relaxation is reduced and the formation of misfit dislocation bundles can be prevented. Instead, upon reaching the critical thickness, these preexisting dislocations simultaneously glide unhindered from the edge of the wafer toward the center. The resulting dislocation network is free of thick dislocation bundles that cause pileups, and the TDD can be reduced by one order of magnitude.
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7 December 2020
Research Article|
December 04 2020
Controlling the relaxation mechanism of low strain Si1−xGex/Si(001) layers and reducing the threading dislocation density by providing a preexisting dislocation source
L. Becker
;
L. Becker
a)
1
Siltronic AG
, Hanns-Seidel-Platz 4, 81737 Munich, Germany
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P. Storck;
P. Storck
1
Siltronic AG
, Hanns-Seidel-Platz 4, 81737 Munich, Germany
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T. Schulz
;
T. Schulz
2
Leibniz-Institut für Kristallzüchtung
, Max-Born-Straße 2, 12489 Berlin, Germany
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M. H. Zoellner;
M. H. Zoellner
3
IHP - Leibniz-Institut für innovative Mikroelektronik
, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany
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L. Di Gaspare;
L. Di Gaspare
4
Università di Roma Tre
, via Vasca Navale 84, 00146 Rome, Italy
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F. Rovaris
;
F. Rovaris
5
Università degli Studi di Milano-Bicocca
, Via R. Cozzi 55, 20126 Milano, Italy
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A. Marzegalli;
A. Marzegalli
5
Università degli Studi di Milano-Bicocca
, Via R. Cozzi 55, 20126 Milano, Italy
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F. Montalenti
;
F. Montalenti
5
Università degli Studi di Milano-Bicocca
, Via R. Cozzi 55, 20126 Milano, Italy
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M. De Seta;
M. De Seta
4
Università di Roma Tre
, via Vasca Navale 84, 00146 Rome, Italy
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G. Capellini
;
G. Capellini
3
IHP - Leibniz-Institut für innovative Mikroelektronik
, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany
4
Università di Roma Tre
, via Vasca Navale 84, 00146 Rome, Italy
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G. Schwalb
;
G. Schwalb
1
Siltronic AG
, Hanns-Seidel-Platz 4, 81737 Munich, Germany
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T. Schroeder;
T. Schroeder
2
Leibniz-Institut für Kristallzüchtung
, Max-Born-Straße 2, 12489 Berlin, Germany
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M. Albrecht
M. Albrecht
2
Leibniz-Institut für Kristallzüchtung
, Max-Born-Straße 2, 12489 Berlin, Germany
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a)
Author to whom correspondence should be addressed: lucas.becker@siltronic.com
J. Appl. Phys. 128, 215305 (2020)
Article history
Received:
October 08 2020
Accepted:
November 18 2020
Citation
L. Becker, P. Storck, T. Schulz, M. H. Zoellner, L. Di Gaspare, F. Rovaris, A. Marzegalli, F. Montalenti, M. De Seta, G. Capellini, G. Schwalb, T. Schroeder, M. Albrecht; Controlling the relaxation mechanism of low strain Si1−xGex/Si(001) layers and reducing the threading dislocation density by providing a preexisting dislocation source. J. Appl. Phys. 7 December 2020; 128 (21): 215305. https://doi.org/10.1063/5.0032454
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