Strain relaxed Si1xGex buffer layers on Si(001) can be used as virtual substrates for the growth of both strained Si and strained SiGe, which are suitable materials for sub-7 nm CMOS devices due to their enhanced carrier mobility. For industrial applications, the threading dislocation density (TDD) has to be as low as possible. However, a reduction of the TDD is limited by the balance between dislocation glide and nucleation as well as dislocation blocking. The relaxation mechanism of low strain Si0.98Ge0.02 layers on commercial substrates is compared to substrates with a predeposited SiGe backside layer, which provides threading dislocations at the edge of the wafer. It is shown that by the exploitation of this reservoir, the critical thickness for plastic relaxation is reduced and the formation of misfit dislocation bundles can be prevented. Instead, upon reaching the critical thickness, these preexisting dislocations simultaneously glide unhindered from the edge of the wafer toward the center. The resulting dislocation network is free of thick dislocation bundles that cause pileups, and the TDD can be reduced by one order of magnitude.

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