A thorough study of the admittance of TiN/Ti/HfO2/W bipolar resistive memories [resistance random access memory (RRAM)] was carried out under different bias conditions and in a wide range of ac signal frequencies. We demonstrate that a continuum of intermediate states can be obtained by applying appropriate dc bias waveforms. Cumulative writing and erasing admittance cycles were performed by applying triangular voltage waveform of increasing amplitude. The influence of the initial conditions on the variation of the real (conductance) and imaginary (susceptance) components of the admittance is described. An accurate control of the memory state is achieved both in terms of the conductance and the susceptance by means of an adequate selection of the voltage values previously applied. A method to obtain three-dimensional voltage-conductance-susceptance state-plots is described in detail. Memory maps of admittance parameters as a function of the programming voltage are made by sensing the memory state at 0 V, without static power consumption. The multilevel nature of RRAM devices and their suitability for neuromorphic computation are demonstrated.
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21 October 2018
Research Article|
September 25 2018
Analysis and control of the intermediate memory states of RRAM devices by means of admittance parameters
H. Castán
;
H. Castán
a)
1
Department of Electronics, University of Valladolid
, 47011 Valladolid, Spain
a)Author to whom correspondence should be addressed: helena@ele.uva.es
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S. Dueñas
;
S. Dueñas
1
Department of Electronics, University of Valladolid
, 47011 Valladolid, Spain
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H. García;
H. García
1
Department of Electronics, University of Valladolid
, 47011 Valladolid, Spain
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O. G. Ossorio
;
O. G. Ossorio
1
Department of Electronics, University of Valladolid
, 47011 Valladolid, Spain
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L. A. Domínguez;
L. A. Domínguez
1
Department of Electronics, University of Valladolid
, 47011 Valladolid, Spain
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B. Sahelices;
B. Sahelices
1
Department of Electronics, University of Valladolid
, 47011 Valladolid, Spain
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E. Miranda;
E. Miranda
2
Departament d’Enginyería Electrònica, Universitat Autónoma de Barcelona
, 08193 Bellaterra, Spain
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M. B. González
;
M. B. González
3
Institut de Microelectrònica de Barcelona, IMB-CNM (CSIC), Campus UAB
, 08193 Bellaterra, Spain
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F. Campabadal
F. Campabadal
3
Institut de Microelectrònica de Barcelona, IMB-CNM (CSIC), Campus UAB
, 08193 Bellaterra, Spain
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a)Author to whom correspondence should be addressed: helena@ele.uva.es
J. Appl. Phys. 124, 152101 (2018)
Article history
Received:
February 05 2018
Accepted:
May 30 2018
Citation
H. Castán, S. Dueñas, H. García, O. G. Ossorio, L. A. Domínguez, B. Sahelices, E. Miranda, M. B. González, F. Campabadal; Analysis and control of the intermediate memory states of RRAM devices by means of admittance parameters. J. Appl. Phys. 21 October 2018; 124 (15): 152101. https://doi.org/10.1063/1.5024836
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