To catch up with growing complexity of artificial neural networks, hybrid integrated systems with high-density nanoscale memristive devices have been proposed as building blocks for the next generation computing hardware. In this Tutorial, we first introduce the methodologies in fabrication of memristor crossbars with a sub-10 nm feature size, including nanoimprint lithography that provides excellent resolution at low cost. Technical issues such as critical dimension control, overlay alignment accuracy, and reliable mold cleaning are discussed in detail. In the meantime, as lateral scaling becomes more challenging, three-dimensional (3D) integration presents an alternative solution to further increase the packing density and to provide new functionalities. Some early demonstrations of 3D hybrid memristor/complementary metal oxide semiconductor circuits are reviewed here, and their design and fabrication related issues are discussed. Successful implementation of large-scale 3D memristive systems with nanometer scale devices may provide ultimate solution to the hardware bottleneck for future computing applications.
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21 October 2018
Research Article|
September 25 2018
Tutorial: Fabrication and three-dimensional integration of nanoscale memristive devices and arrays
Peng Lin;
Peng Lin
a)
Department of Electrical and Computer Engineering, University of Massachusetts
, Amherst, Massachusetts 01003, USA
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Qiangfei Xia
Qiangfei Xia
b)
Department of Electrical and Computer Engineering, University of Massachusetts
, Amherst, Massachusetts 01003, USA
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a)
Current address: Department of Mechanical Engineering and Research Laboratory of Electronics, Massachusetts Institute of Technology, Cambridge, MA 02139, USA. Email: linp@mit.edu
b)
Email: qxia@umass.edu
Note: This Invited Tutorial is part of the Special Topic section “New Physics and Materials for Neuromorphic Computation.”
J. Appl. Phys. 124, 152001 (2018)
Article history
Received:
May 01 2018
Accepted:
July 25 2018
Citation
Peng Lin, Qiangfei Xia; Tutorial: Fabrication and three-dimensional integration of nanoscale memristive devices and arrays. J. Appl. Phys. 21 October 2018; 124 (15): 152001. https://doi.org/10.1063/1.5038109
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