High capacitance density three-dimensional (3D) metal-insulator-semiconductor (MIS) capacitors using Si nanowires (SiNWs) by metal-assisted chemical etching and atomic-layer-deposited alumina dielectric film were fabricated and electrically characterized. A chemical treatment was used to remove structural defects from the nanowire surface, in order to reduce the density of interface traps at the Al2O3/SiNW interface. SiNWs with two different lengths, namely, 1.3 μm and 2.4 μm, were studied. A four-fold capacitance density increase compared to a planar reference capacitor was achieved with the 1.3 μm SiNWs. In the case of the 2.4 μm SiNWs this increase was ×7, reaching a value of 4.1 μF/cm2. Capacitance-voltage (C-V) measurements revealed that, following a two-cycle chemical treatment, frequency dispersion at accumulation regime and flat-band voltage shift disappeared in the case of the 1.3 μm SiNWs, which is indicative of effective removal of structural defects at the SiNW surface. In the case of the 2.4 μm SiNWs, frequency dispersion at accumulation persisted even after the two-step chemical treatment. This is attributed to a porous Si layer at the SiNW tops, which is not effectively removed by the chemical treatment. The electrical losses of MIS capacitors in both cases of SiNW lengths were studied and will be discussed.
High capacitance density MIS capacitor using Si nanowires by MACE and ALD alumina dielectric
I. Leontis, M. A. Botzakaki, S. N. Georga, A. G. Nassiopoulou; High capacitance density MIS capacitor using Si nanowires by MACE and ALD alumina dielectric. J. Appl. Phys. 28 June 2016; 119 (24): 244508. https://doi.org/10.1063/1.4954883
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