Thin SiGe virtual substrates for Ge heterostructures integration on silicon

The possibility to reduce the thickness of the SiGe virtual substrate, required for the integration of Ge heterostructures on Si, without heavily affecting the crystal quality is becoming fundamental in several applications. In this work, we present 1 μm thick Si_1−xGe_x buffers (with x > 0.7) having different designs which could be suitable for applications requiring a thin virtual substrate. The rationale is to reduce the lattice mismatch at the interface with the Si substrate by introducing composition steps and/or partial grading. The relatively low growth temperature (475 °C) makes this approach appealing for complementary metal-oxide-semiconductor integration. For all the investigated designs, a reduction of the threading dislocation density compared to constant composition Si_1−xGe_x layers was observed. The best buffer in terms of defects reduction was used as a virtual substrate for the deposition of a Ge/SiGe multiple quantum well structure. Room temperature optical absorption and photoluminescence analysis performed on nominally identical quantum wells grown on both a thick graded virtual substrate and the selected thin buffer demonstrates a comparable optical quality, confirming the effectiveness of the proposed approach.