An investigation of capacitance-voltage hysteresis in metal/high-k/In_0.53Ga_0.47As metal-oxide-semiconductor capacitors

In this work, we present the results of an investigation into charge trapping in metal/high-k/In_0.53Ga_0.47As metal-oxide-semiconductor capacitors (MOS capacitors), which is analysed using the hysteresis exhibited in the capacitance-voltage (C-V) response. The availability of both n and p doped In_0.53Ga_0.47As epitaxial layers allows the investigation of both hole and electron trapping in the bulk of HfO₂ and Al₂O₃ films formed using atomic layer deposition (ALD). The HfO₂/In_0.53Ga_0.47As and Al₂O₃/In_0.53Ga_0.47As MOS capacitors exhibit an almost reversible trapping behaviour, where the density of trapped charge is of a similar level to high-k/In_0.53Ga_0.47As interface state density, for both electrons and holes in the HfO₂ and Al₂O₃ films. The experimental results demonstrate that the magnitude of the C-V hysteresis increases significantly for samples which have a native oxide layer present between the In_0.53Ga_0.47As surface and the high-k oxide, suggesting that the charge trapping responsible for the C-V hysteresis is taking place primarily in the interfacial oxide transition layer between the In_0.53Ga_0.47As and the ALD deposited oxide. Analysis of samples with a range of oxide thickness values also demonstrates that the magnitude of the C-V hysteresis window increases linearly with the increasing oxide thickness, and the corresponding trapped charge density is not a function of the oxide thickness, providing further evidence that the charge trapping is predominantly localised as a line charge and taking place primarily in the interfacial oxide transition layer located between the In_0.53Ga_0.47As and the high-k oxide.