We present a detailed investigation on the nature of the interfacial layer (IL) in ultra-thin TiN/LaLuO3 (LLO) gate stacks, which is of importance to facilitate CMOS scaling. The molecular beam deposited LaLuO3 films are found to be amorphous by high-resolution transmission electron microscopy. A ∼9 Å thick LaLuO3/interlayer transition observed by medium energy ion scattering correlates with the presence of a dual silicate/SiO2-like interfacial layer derived from the analysis of photoelectron line positions and electron energy loss spectra. A theoretical model is used for the dielectric transition in a bi-layer LaLuO3/IL structure, linking physical and electrical characterization data. The obtained leakage current of 10−3 A/cm2 at 1.5 V and equivalent oxide thickness of 0.75 nm for TiN/LaLuO3 gate stacks are adequate for scaling in the 14-12 nm node.

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