GaP-layers on Si(001) can serve as pseudo-substrates for a variety of novel optoelectronic devices. The quality of the GaP nucleation layer is a crucial parameter for the performance of such devices. Especially, anti-phase domains (APDs) evolving at mono-atomic steps on the Si-surface can affect the quality of a layer adversely. The size, shape, and possible charge of the APDs and their boundaries depend on the polarity of the surrounding crystal. The observed polarity of the GaP is caused by the A-type double step configuration of the Si-surface reconstruction prior to GaP growth and the prevalent binding of Ga to Si under optimized growth conditions. The polarity of the GaP-layer and hence the atomic configuration at the Si-III/V interface can be changed by altering the growth conditions. With this knowledge, defect-free GaP/Si(001) templates for III/V device integration on Si-substrates can be grown.

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