Patterned backgating using single-sided mask aligners: Application to density-matched electron-hole bilayers

We report our work on fabricating lithographically aligned patterned backgates on thin $(50–60μm)$ III-V semiconductor samples using single sided mask aligners only. Along with this we also present a way to photograph both sides of a thin patterned chip using inexpensive infrared light emitting diodes and an inexpensive (consumer) digital camera. A robust method of contacting both sides of a sample using an ultrasonic bonder is described. In addition we present a mathematical model to analyze the variation in the electrochemical potential through the doped layers and heterojunctions that are normally present in most GaAs based devices. We utilize the technique and the estimates from our model to fabricate an electron-hole bilayer device in which each layer is separately contacted and has tunable densities. The electron and hole layers are separated by barriers either 25 or 15 nm wide. In both cases, the densities can be matched by using appropriate bias voltages.