Dimensional Scaling of Material Functional Properties to meet Back-End-of-Line (BEOL) Challenges

Dimensional scaling of materials dramatically modifies their properties. In the case of CMOS electronics, dimensional scaling of feature sizes on the chip offered decades of performance gains in digital computing. However, to further push CMOS scaling in the presence of severe short-channel effects will require new approaches of material and device design with improved performance such as development of new materials with weaker scaling laws or completely different conduction mechanisms. New breakthroughs in interconnect and memory will require advances in theory and modeling, material synthesis, nanodevice fabrication, and characterization, ranging from the material level to the device and module levels.

Guest Editors: Shaloo Rakheja, Zhihong Chen, and Ching-Tzu Chen