Historically, memory technologies have been evaluated based on their storage density, cost, and latencies. Beyond these metrics, the need to enable smarter and intelligent computing platforms at a low area and energy cost has brought forth interesting avenues for exploiting non-volatile memory (NVM) technologies. In this paper, we focus on non-volatile memory technologies and their applications to bio-inspired neuromorphic computing, enabling spike-based machine intelligence. Spiking neural networks (SNNs) based on discrete neuronal “action potentials” are not only bio-fidel but also an attractive candidate to achieve energy-efficiency, as compared to state-of-the-art continuous-valued neural networks. NVMs offer promise for implementing both area- and energy-efficient SNN compute fabrics at almost all levels of hierarchy including devices, circuits, architecture, and algorithms. The intrinsic device physics of NVMs can be leveraged to emulate dynamics of individual neurons and synapses. These devices can be connected in a dense crossbar-like circuit, enabling in-memory, highly parallel dot-product computations required for neural networks. Architecturally, such crossbars can be connected in a distributed manner, bringing in additional system-level parallelism, a radical departure from the conventional von-Neumann architecture. Finally, cross-layer optimization across underlying NVM based hardware and learning algorithms can be exploited for resilience in learning and mitigating hardware inaccuracies. The manuscript starts by introducing both neuromorphic computing requirements and non-volatile memory technologies. Subsequently, we not only provide a review of key works but also carefully scrutinize the challenges and opportunities with respect to various NVM technologies at different levels of abstraction from devices-to-circuit-to-architecture and co-design of hardware and algorithm.
References
1.
F.
Allen
, G.
Almasi
, W.
Andreoni
, D.
Beece
, B. J.
Berne
, A.
Bright
, J.
Brunheroto
, C.
Cascaval
, J.
Castanos
, P.
Coteus
et al., “Blue gene: A vision for protein science using a petaflop supercomputer
,” IBM Syst. J.
40
, 310
–327
(2001
).2.
3.
R.
Ananthanarayanan
, S. K.
Esser
, H. D.
Simon
, and D. S.
Modha
, “The cat is out of the bag: Cortical simulations with 109 neurons, 1013 synapses
,” in Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis
(ACM
, 2009
), p. 63
.4.
W.
Maass
, “Networks of spiking neurons: The third generation of neural network models
,” Neural Networks
10
, 1659
–1671
(1997
).5.
S. K.
Pal
and S.
Mitra
, “Multilayer perceptron, fuzzy sets, and classification
,” IEEE Trans. Neural Networks
3
, 683
–697
(1992
).6.
V.
Nair
and G. E.
Hinton
, “Rectified linear units improve restricted Boltzmann machines
,” in Proceedings of the 27th International Conference on Machine Learning (ICML-10)
(2010
), pp. 807
–814
.7.
D. E.
Rumelhart
, G. E.
Hinton
, R. J.
Williams
et al., “Learning representations by back-propagating errors
,” Nature
323
(6088
), 533
–536
(1986
).8.
Y.
LeCun
, Y.
Bengio
, and G.
Hinton
, “Deep learning
,” Nature
521
, 436
(2015
).9.
K. A.
Boahen
, “Point-to-point connectivity between neuromorphic chips using address events
,” IEEE Trans. Circuits Syst. II
47
, 416
–434
(2000
).10.
G. M.
Shepherd
, The Synaptic Organization of the Brain
(Oxford University Press
, 2003
).11.
M.
Mahowald
and R.
Douglas
, “A silicon neuron
,” Nature
354
, 515
(1991
).12.
E. T.
Rolls
and G.
Deco
, The Noisy Brain: Stochastic Dynamics as a Principle of Brain Function
(Oxford University Press
, Oxford
, 2010
), Vol. 34
.13.
B.
Nessler
, M.
Pfeiffer
, L.
Buesing
, and W.
Maass
, “Bayesian computation emerges in generic cortical microcircuits through spike-timing-dependent plasticity
,” PLoS Comput. Biol.
9
, e1003037
(2013
).14.
A. L.
Hodgkin
and A. F.
Huxley
, “A quantitative description of membrane current and its application to conduction and excitation in nerve
,” J. Physiol.
117
, 500
–544
(1952
).15.
L. F.
Abbott
, “Lapicque's introduction of the integrate-and-fire model neuron (1907)
,” Brain Res. Bull.
50
, 303
–304
(1999
).16.
A. V.
Hill
, “Excitation and accommodation in nerve
,” Proc. R. Soc. London, Ser. B
119
, 305
–355
(1936
).17.
C. D.
Geisler
and J. M.
Goldberg
, “A stochastic model of the repetitive activity of neurons
,” Biophys. J.
6
, 53
–69
(1966
).18.
Y.-H.
Liu
and X.-J.
Wang
, “Spike-frequency adaptation of a generalized leaky integrate-and-fire model neuron
,” J. Comput. Neurosci.
10
, 25
–45
(2001
).19.
G.
Qiang Bi
and M.
Ming Poo
, “Synaptic modifications in cultured hippocampal neurons: Dependence on spike timing, synaptic strength, and postsynaptic cell type
,” J. Neurosci.
18
, 10464
–10472
(1998
).20.
T. V.
Bliss
and G. L.
Collingridge
, “A synaptic model of memory: Long-term potentiation in the hippocampus
,” Nature
361
, 31
(1993
).21.
R. S.
Zucker
and W. G.
Regehr
, “Short-term synaptic plasticity
,” Annu. Rev. Physiol.
64
, 355
–405
(2002
).22.
C. F.
Stevens
and Y.
Wang
, “Facilitation and depression at single central synapses
,” Neuron
14
, 795
–802
(1995
).23.
R.
Atkinson
and R.
Shiffrin
, “Human memory: A proposed system and its control processes
,” in Psychology of Learning and Motivation
(Elsevier
, 1968
), pp. 89
–195
.24.
B.
Rueckauer
, I.-A.
Lungu
, Y.
Hu
, M.
Pfeiffer
, and S.-C.
Liu
, “Conversion of continuous-valued deep networks to efficient event-driven networks for image classification
,” Front. Neurosci.
11
, 682
(2017
).25.
P. U.
Diehl
, D.
Neil
, J.
Binas
, M.
Cook
, S.-C.
Liu
, and M.
Pfeiffer
, “Fast-classifying, high-accuracy spiking deep networks through weight and threshold balancing
,” in 2015 International Joint Conference on Neural Networks (IJCNN)
(IEEE
, 2015
).26.
S. K.
Esser
, P. A.
Merolla
, J. V.
Arthur
, A. S.
Cassidy
, R.
Appuswamy
, A.
Andreopoulos
, D. J.
Berg
, J. L.
McKinstry
, T.
Melano
, D. R.
Barch
, C.
di Nolfo
, P.
Datta
, A.
Amir
, B.
Taba
, M. D.
Flickner
, and D. S.
Modha
, “Convolutional networks for fast, energy-efficient neuromorphic computing
,” Proc. Natl. Acad. Sci.
113
, 11441
–11446
(2016
).27.
A.
Sengupta
, Y.
Ye
, R.
Wang
, C.
Liu
, and K.
Roy
, “Going deeper in spiking neural networks: VGG and residual architectures
,” Front. Neurosci.
13
, 95
(2019
).28.
Y.
Jin
, W.
Zhang
, and P.
Li
, “Hybrid macro/micro level backpropagation for training deep spiking neural networks
,” in Advances in Neural Information Processing Systems
(Curran Associates
, 2018
), pp. 7005
–7015
.29.
T.
Tuma
, A.
Pantazi
, M.
Le Gallo
, A.
Sebastian
, and E.
Eleftheriou
, “Stochastic phase-change neurons
,” Nat. Nanotechnol.
11
, 693
(2016
).30.
I.
Chakraborty
, G.
Saha
, A.
Sengupta
, and K.
Roy
, “Toward fast neural computing using all-photonic phase change spiking neurons
,” Sci. Rep.
8
, 12980
(2018
).31.
M.
Stanisavljevic
, H.
Pozidis
, A.
Athmanathan
, N.
Papandreou
, T.
Mittelholzer
, and E.
Eleftheriou
, “Demonstration of reliable triple-level-cell (TLC) phase-change memory
,” in 2016 IEEE 8th International Memory Workshop (IMW)
(IEEE
, 2016
), pp. 1
–4
.32.
T.
Tuma
, M.
Le Gallo
, A.
Sebastian
, and E.
Eleftheriou
, “Detecting correlations using phase-change neurons and synapses
,” IEEE Electron Device Lett.
37
, 1238
–1241
(2016
).33.
S.
Ambrogio
, N.
Ciocchini
, M.
Laudato
, V.
Milo
, A.
Pirovano
, P.
Fantini
, and D.
Ielmini
, “Unsupervised learning by spike timing dependent plasticity in phase change memory (PCM) synapses
,” Front. Neurosci.
10
, 56
(2016
).34.
D.
Kuzum
, R. G.
Jeyasingh
, B.
Lee
, and H.-S. P.
Wong
, “Nanoelectronic programmable synapses based on phase change materials for brain-inspired computing
,” Nano Lett.
12
, 2179
–2186
(2012
).35.
M.
Suri
, O.
Bichler
, D.
Querlioz
, O.
Cueto
, L.
Perniola
, V.
Sousa
, D.
Vuillaume
, C.
Gamrat
, and B.
DeSalvo
, “Phase change memory as synapse for ultra-dense neuromorphic systems: Application to complex visual pattern extraction
,” in 2011 International Electron Devices Meeting
(IEEE
, 2011
), p. 4
.36.
Y.
Li
, Y.
Zhong
, L.
Xu
, J.
Zhang
, X.
Xu
, H.
Sun
, and X.
Miao
, “Ultrafast synaptic events in a chalcogenide memristor
,” Sci. Rep.
3
, 1619
(2013
).37.
O.
Bichler
, M.
Suri
, D.
Querlioz
, D.
Vuillaume
, B.
DeSalvo
, and C.
Gamrat
, “Visual pattern extraction using energy-efficient “2-PCM synapse” neuromorphic architecture
,” IEEE Trans. Electron Devices
59
, 2206
–2214
(2012
).38.
D.
Kuzum
, R. G.
Jeyasingh
, and H.-S. P.
Wong
, “Energy efficient programming of nanoelectronic synaptic devices for large-scale implementation of associative and temporal sequence learning
,” in 2011 International Electron Devices Meeting
(IEEE
, 2011
), pp. 30
–33
.39.
Z.
Cheng
, C.
Ríos
, W. H.
Pernice
, C. D.
Wright
, and H.
Bhaskaran
, “On-chip photonic synapse
,” Sci. Adv.
3
, e1700160
(2017
).40.
J.
Feldmann
, N.
Youngblood
, C.
Wright
, H.
Bhaskaran
, and W.
Pernice
, “All-optical spiking neurosynaptic networks with self-learning capabilities
,” Nature
569
, 208
(2019
).41.
S. B.
Eryilmaz
, D.
Kuzum
, R. G.
Jeyasingh
, S.
Kim
, M.
BrightSky
, C.
Lam
, and H.-S. P.
Wong
, “Experimental demonstration of array-level learning with phase change synaptic devices
,” in 2013 IEEE International Electron Devices Meeting
(IEEE
, 2013
), p. 25
.42.
S. B.
Eryilmaz
, D.
Kuzum
, R.
Jeyasingh
, S.
Kim
, M.
BrightSky
, C.
Lam
, and H.-S. P.
Wong
, “Brain-like associative learning using a nanoscale non-volatile phase change synaptic device array
,” Front. Neurosci.
8
, 205
(2014
).43.
S.
Kim
, M.
Ishii
, S.
Lewis
, T.
Perri
, M.
BrightSky
, W.
Kim
, R.
Jordan
, G.
Burr
, N.
Sosa
, A.
Ray
et al., “NVM neuromorphic core with 64k-cell (256-by-256) phase change memory synaptic array with on-chip neuron circuits for continuous in-situ learning
,” in 2015 IEEE International Electron Devices Meeting (IEDM)
(IEEE
, 2015
), p. 17
.44.
G. W.
Burr
, R. M.
Shelby
, S.
Sidler
, C.
Di Nolfo
, J.
Jang
, I.
Boybat
, R. S.
Shenoy
, P.
Narayanan
, K.
Virwani
, E. U.
Giacometti
et al., “Experimental demonstration and tolerancing of a large-scale neural network (165 000 synapses) using phase-change memory as the synaptic weight element
,” IEEE Trans. Electron Devices
62
, 3498
–3507
(2015
).45.
S.
Ambrogio
, P.
Narayanan
, H.
Tsai
, R. M.
Shelby
, I.
Boybat
, C.
Nolfo
, S.
Sidler
, M.
Giordano
, M.
Bodini
, N. C.
Farinha
et al., “Equivalent-accuracy accelerated neural-network training using analogue memory
,” Nature
558
, 60
(2018
).46.
I.
Chakraborty
, G.
Saha
, and K.
Roy
, “Photonic in-memory computing primitive for spiking neural networks using phase-change materials
,” Phys. Rev. Appl.
11
, 014063
(2019
).47.
T.
Matsunaga
, N.
Yamada
, and Y.
Kubota
, “Structures of stable and metastable Ge2Sb2Te5, an intermetallic compound in GeTe–Sb2Te3 pseudobinary systems
,” Acta Crystallogr., Sect. B
60
, 685
–691
(2004
).48.
M.
Wuttig
and N.
Yamada
, “Phase-change materials for rewriteable data storage
,” Nat. Mater.
6
, 824
(2007
).49.
A.
Pirovano
, A. L.
Lacaita
, F.
Pellizzer
, S. A.
Kostylev
, A.
Benvenuti
, and R.
Bez
, “Low-field amorphous state resistance and threshold voltage drift in chalcogenide materials
,” IEEE Trans. Electron Devices
51
, 714
–719
(2004
).50.
S.
Kim
, B.
Lee
, M.
Asheghi
, F.
Hurkx
, J. P.
Reifenberg
, K. E.
Goodson
, and H.-S. P.
Wong
, “Resistance and threshold switching voltage drift behavior in phase-change memory and their temperature dependence at microsecond time scales studied using a micro-thermal stage
,” IEEE Trans. Electron Devices
58
, 584
–592
(2011
).51.
D.
Ielmini
, S.
Lavizzari
, D.
Sharma
, and A. L.
Lacaita
, “Physical interpretation, modeling and impact on phase change memory (PCM) reliability of resistance drift due to chalcogenide structural relaxation
,” in 2007 IEEE International Electron Devices Meeting
(IEEE
, 2007
), pp. 939
–942
.52.
M.
Suri
, D.
Garbin
, O.
Bichler
, D.
Querlioz
, D.
Vuillaume
, C.
Gamrat
, and B.
DeSalvo
, “Impact of PCM resistance-drift in neuromorphic systems and drift-mitigation strategy
,” in Proceedings of the 2013 IEEE/ACM International Symposium on Nanoscale Architectures
(IEEE Press
, 2013
), pp. 140
–145
.53.
Y.
Watanabe
, J.
Bednorz
, A.
Bietsch
, C.
Gerber
, D.
Widmer
, A.
Beck
, and S.
Wind
, “Current-driven insulator–conductor transition and nonvolatile memory in chromium-doped SrTiO3 single crystals
,” Appl. Phys. Lett.
78
, 3738
–3740
(2001
).54.
A.
Beck
, J.
Bednorz
, C.
Gerber
, C.
Rossel
, and D.
Widmer
, “Reproducible switching effect in thin oxide films for memory applications
,” Appl. Phys. Lett.
77
, 139
–141
(2000
).55.
W.
Zhuang
, W.
Pan
, B.
Ulrich
, J.
Lee
, L.
Stecker
, A.
Burmaster
, D.
Evans
, S.
Hsu
, M.
Tajiri
, A.
Shimaoka
et al., “Novel colossal magnetoresistive thin film nonvolatile resistance random access memory (RRAM)
,” in International Electron Devices Meeting, Technical Digest
(IEEE
, 2002
), pp. 193
–196
.56.
L.
Goux
, P.
Czarnecki
, Y. Y.
Chen
, L.
Pantisano
, X.
Wang
, R.
Degraeve
, B.
Govoreanu
, M.
Jurczak
, D.
Wouters
, and L.
Altimime
, “Evidences of oxygen-mediated resistive-switching mechanism in TiN\HfO2\Pt cells
,” Appl. Phys. Lett.
97
, 243509
(2010
).57.
C.
Rohde
, B. J.
Choi
, D. S.
Jeong
, S.
Choi
, J.-S.
Zhao
, and C. S.
Hwang
, “Identification of a determining parameter for resistive switching of TiO2 thin films
,” Appl. Phys. Lett.
86
, 262907
(2005
).58.
Z.
Wei
, Y.
Kanzawa
, K.
Arita
, Y.
Katoh
, K.
Kawai
, S.
Muraoka
, S.
Mitani
, S.
Fujii
, K.
Katayama
, M.
Iijima
et al., “Highly reliable TaOx ReRAM and direct evidence of redox reaction mechanism
,” in 2008 IEEE International Electron Devices Meeting
(IEEE
, 2008
), pp. 1
–4
.59.
M.
Al-Shedivat
, R.
Naous
, G.
Cauwenberghs
, and K. N.
Salama
, “Memristors empower spiking neurons with stochasticity
,” IEEE J. Emerging Sel. Top. Circuits Syst.
5
, 242
–253
(2015
).60.
J.-W.
Jang
, B.
Attarimashalkoubeh
, A.
Prakash
, H.
Hwang
, and Y.-H.
Jeong
, “Scalable neuron circuit using conductive-bridge ram for pattern reconstructions
,” IEEE Trans. Electron Devices
63
, 2610
–2613
(2016
).61.
D. B.
Strukov
, G. S.
Snider
, D. R.
Stewart
, and R. S.
Williams
, “The missing memristor found
,” Nature
453
, 80
(2008
).62.
L.
Chua
, “Memristor-The missing circuit element
,” IEEE Trans. Circuit Theory
18
, 507
–519
(1971
).63.
S.
Lashkare
, S.
Chouhan
, T.
Chavan
, A.
Bhat
, P.
Kumbhare
, and U.
Ganguly
, “PCMO RRAM for integrate-and-fire neuron in spiking neural networks
,” IEEE Electron Device Lett.
39
, 484
–487
(2018
).64.
A.
Mehonic
and A. J.
Kenyon
, “Emulating the electrical activity of the neuron using a silicon oxide RRAM cell
,” Front. Neurosci.
10
, 57
(2016
).65.
H.
Lee
, P.
Chen
, T.
Wu
, Y.
Chen
, C.
Wang
, P.
Tzeng
, C.
Lin
, F.
Chen
, C.
Lien
, and M.-J.
Tsai
, “Low power and high speed bipolar switching with a thin reactive Ti buffer layer in robust HfO2 based Rram
,” in 2008 IEEE International Electron Devices Meeting
(IEEE
, 2008
), pp. 1
–4
.66.
X.
Cao
, X.
Li
, X.
Gao
, W.
Yu
, X.
Liu
, Y.
Zhang
, L.
Chen
, and X.
Cheng
, “Forming-free colossal resistive switching effect in rare-earth-oxide Gd2O3 films for memristor applications
,” J. Appl. Phys.
106
, 073723
(2009
).67.
M.-J.
Lee
, S.
Han
, S. H.
Jeon
, B. H.
Park
, B. S.
Kang
, S.-E.
Ahn
, K. H.
Kim
, C. B.
Lee
, C. J.
Kim
, I.-K.
Yoo
et al., “Electrical manipulation of nanofilaments in transition-metal oxides for resistance-based memory
,” Nano Lett.
9
, 1476
–1481
(2009
).68.
C.
Yoshida
, K.
Kinoshita
, T.
Yamasaki
, and Y.
Sugiyama
, “Direct observation of oxygen movement during resistance switching in NiO/Pt film
,” Appl. Phys. Lett.
93
, 042106
(2008
).69.
S.
Yu
and H.-S. P.
Wong
, “A phenomenological model for the reset mechanism of metal oxide RRAM
,” IEEE Electron Device Lett.
31
, 1455
–1457
(2010
).70.
S. R.
Lee
, Y.-B.
Kim
, M.
Chang
, K. M.
Kim
, C. B.
Lee
, J. H.
Hur
, G.-S.
Park
, D.
Lee
, M.-J.
Lee
, C. J.
Kim
et al., “Multi-level switching of triple-layered TaOx RRAM with excellent reliability for storage class memory
,” in 2012 Symposium on VLSI Technology (VLSIT)
(IEEE
, 2012
), pp. 71
–72
.71.
M.
Prezioso
, F. M.
Bayat
, B.
Hoskins
, K.
Likharev
, and D.
Strukov
, “Self-adaptive spike-time-dependent plasticity of metal-oxide memristors
,” Sci. Rep.
6
, 21331
(2016
).72.
B.
Rajendran
, Y.
Liu
, J.-S.
Seo
, K.
Gopalakrishnan
, L.
Chang
, D. J.
Friedman
, and M. B.
Ritter
, “Specifications of nanoscale devices and circuits for neuromorphic computational systems
,” IEEE Trans. Electron Devices
60
, 246
–253
(2013
).73.
K.
Seo
, I.
Kim
, S.
Jung
, M.
Jo
, S.
Park
, J.
Park
, J.
Shin
, K. P.
Biju
, J.
Kong
, K.
Lee
et al., “Analog memory and spike-timing-dependent plasticity characteristics of a nanoscale titanium oxide bilayer resistive switching device
,” Nanotechnology
22
, 254023
(2011
).74.
I.-T.
Wang
, Y.-C.
Lin
, Y.-F.
Wang
, C.-W.
Hsu
, and T.-H.
Hou
, “3D synaptic architecture with ultralow sub-10 fJ energy per spike for neuromorphic computation
,” in 2014 IEEE International Electron Devices Meeting
(IEEE
, 2014
), p. 28
.75.
Z.
Wang
, S.
Ambrogio
, S.
Balatti
, and D.
Ielmini
, “A 2-transistor/1-resistor artificial synapse capable of communication and stochastic learning in neuromorphic systems
,” Front. Neurosci.
8
, 438
(2015
).76.
S.
Yu
, B.
Gao
, Z.
Fang
, H.
Yu
, J.
Kang
, and H.-S. P.
Wong
, “Stochastic learning in oxide binary synaptic device for neuromorphic computing
,” Front. Neurosci.
7
, 186
(2013
).77.
A.
Serb
, J.
Bill
, A.
Khiat
, R.
Berdan
, R.
Legenstein
, and T.
Prodromakis
, “Unsupervised learning in probabilistic neural networks with multi-state metal-oxide memristive synapses
,” Nat. Commun.
7
, 12611
(2016
).78.
S.
Park
, H.
Kim
, M.
Choo
, J.
Noh
, A.
Sheri
, S.
Jung
, K.
Seo
, J.
Park
, S.
Kim
, W.
Lee
et al., “RRAM-based synapse for neuromorphic system with pattern recognition function
,” in 2012 International Electron Devices Meeting
(IEEE
, 2012
), pp. 10
–12
.79.
S.
Park
, A.
Sheri
, J.
Kim
, J.
Noh
, J.
Jang
, M.
Jeon
, B.
Lee
, B.
Lee
, B.
Lee
, and H.-J.
Hwang
, “Neuromorphic speech systems using advanced ReRAM-based synapse
,” in 2013 IEEE International Electron Devices Meeting
(IEEE
, 2013
), pp. 25
–26
.80.
N.
Panwar
, B.
Rajendran
, and U.
Ganguly
, “Arbitrary spike time dependent plasticity (STDP) in memristor by analog waveform engineering
,” IEEE Electron Device Lett.
38
, 740
–743
(2017
).81.
H.
Lim
, I.
Kim
, J.-S.
Kim
, C. S.
Hwang
, and D. S.
Jeong
, “Short-term memory of TiO2-based electrochemical capacitors: Empirical analysis with adoption of a sliding threshold
,” Nanotechnology
24
, 384005
(2013
).82.
R.
Yang
, K.
Terabe
, Y.
Yao
, T.
Tsuruoka
, T.
Hasegawa
, J. K.
Gimzewski
, and M.
Aono
, “Synaptic plasticity and memory functions achieved in a WO3−x-based nanoionics device by using the principle of atomic switch operation
,” Nanotechnology
24
, 384003
(2013
).83.
R.
Berdan
, E.
Vasilaki
, A.
Khiat
, G.
Indiveri
, A.
Serb
, and T.
Prodromakis
, “Emulating short-term synaptic dynamics with memristive devices
,” Sci. Rep.
6
, 18639
(2016
).84.
F.
Cai
, J. M.
Correll
, S. H.
Lee
, Y.
Lim
, V.
Bothra
, Z.
Zhang
, M. P.
Flynn
, and W. D.
Lu
, “A fully integrated reprogrammable memristor–CMOS system for efficient multiply–accumulate operations
,” Nat. Electron.
2
, 290
–299
(2019
).85.
X.
Sun
, S.
Yin
, X.
Peng
, R.
Liu
, J.-S.
Seo
, and S.
Yu
, “XNOR-RRAM: A scalable and parallel resistive synaptic architecture for binary neural networks
,” in 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)
(IEEE
, 2018
), pp. 1423
–1428
.86.
P.
Yao
, H.
Wu
, B.
Gao
, J.
Tang
, Q.
Zhang
, W.
Zhang
, J. J.
Yang
, and H.
Qian
, “Fully hardware-implemented memristor convolutional neural network
,” Nature
577
, 641
–646
(2020
).87.
C.
Xue
, T.
Huang
, J.
Liu
, T.
Chang
, H.
Kao
, J.
Wang
, T.
Liu
, S.
Wei
, S.
Huang
, W.
Wei
, Y.
Chen
, T.
Hsu
, Y.
Chen
, Y.
Lo
, T.
Wen
, C.
Lo
, R.
Liu
, C.
Hsieh
, K.
Tang
, and M.
Chang
, “15.4 A 22 nm 2Mb ReRAM compute-in-memory macro with 121-28TOPS/W for multibit mac computing for tiny AI edge devices
,” in 2020 IEEE International Solid-State Circuits Conference (ISSCC)
(2020
), pp. 244
–246
.88.
S. H.
Jo
, T.
Chang
, I.
Ebong
, B. B.
Bhadviya
, P.
Mazumder
, and W.
Lu
, “Nanoscale memristor device as synapse in neuromorphic systems
,” Nano Lett.
10
, 1297
–1301
(2010
).89.
D.
Mahalanabis
, M.
Sivaraj
, W.
Chen
, S.
Shah
, H. J.
Barnaby
, M. N.
Kozicki
, J. B.
Christen
, and S.
Vrudhula
, “Demonstration of spike timing dependent plasticity in CBRAM devices with silicon neurons
,” in 2016 IEEE International Symposium on Circuits and Systems (ISCAS)
(IEEE
, 2016
), pp. 2314
–2317
.90.
M.
Suri
, D.
Querlioz
, O.
Bichler
, G.
Palma
, E.
Vianello
, D.
Vuillaume
, C.
Gamrat
, and B.
DeSalvo
, “Bio-inspired stochastic computing using binary CBRAM synapses
,” IEEE Trans. Electron Devices
60
, 2402
–2409
(2013
).91.
T.
Ohno
, T.
Hasegawa
, A.
Nayak
, T.
Tsuruoka
, J. K.
Gimzewski
, and M.
Aono
, “Sensory and short-term memory formations observed in a Ag2S gap-type atomic switch
,” Appl. Phys. Lett.
99
, 203108
(2011
).92.
K.-H.
Kim
, S.
Gaba
, D.
Wheeler
, J. M.
Cruz-Albrecht
, T.
Hussain
, N.
Srinivasa
, and W.
Lu
, “A functional hybrid memristor crossbar-array/CMOS system for data storage and neuromorphic applications
,” Nano Lett.
12
, 389
–395
(2012
).93.
Y.
Wang
, T.
Tang
, L.
Xia
, B.
Li
, P.
Gu
, H.
Yang
, H.
Li
, and Y.
Xie
, “Energy efficient RRAM spiking neural network for real time classification
,” in Proceedings of the 25th Edition on Great Lakes Symposium on VLSI
(ACM
, 2015
), pp. 189
–194
.94.
G.
Pedretti
, V.
Milo
, S.
Ambrogio
, R.
Carboni
, S.
Bianchi
, A.
Calderoni
, N.
Ramaswamy
, A.
Spinelli
, and D.
Ielmini
, “Memristive neural network for on-line learning and tracking with brain-inspired spike timing dependent plasticity
,” Sci. Rep.
7
, 5288
(2017
).95.
C.
Li
, M.
Hu
, Y.
Li
, H.
Jiang
, N.
Ge
, E.
Montgomery
, J.
Zhang
, W.
Song
, N.
Dávila
, C. E.
Graves
et al., “Analogue signal and image processing with large memristor crossbars
,” Nat. Electron.
1
, 52
(2018
).96.
M.
Rastegari
, V.
Ordonez
, J.
Redmon
, and A.
Farhadi
, “XNOR-Net: ImageNet classification using binary convolutional neural networks
,” in European Conference on Computer Vision
(Springer
, 2016
), pp. 525
–542
.97.
P.
Wijesinghe
, A.
Ankit
, A.
Sengupta
, and K.
Roy
, “An all-memristor deep spiking neural computing system: A step toward realizing the low-power stochastic brain
,” IEEE Trans. Emerging Top. Comput. Intell.
2
, 345
–358
(2018
).98.
G.
Sun
, X.
Dong
, Y.
Xie
, J.
Li
, and Y.
Chen
, “A novel architecture of the 3D stacked MRAM l2 cache for CMPS
,” in 2009 IEEE 15th International Symposium on High Performance Computer Architecture
(IEEE
, 2009
), pp. 239
–249
.99.
J. C.
Slonczewski
, “Current-driven excitation of magnetic multilayers
,” J. Magn. Magn. Mater.
159
, L1
–L7
(1996
).100.
S.
Emori
, U.
Bauer
, S.-M.
Ahn
, E.
Martinez
, and G. S.
Beach
, “Current-driven dynamics of chiral ferromagnetic domain walls
,” Nat. Mater.
12
, 611
(2013
).101.
M.
Bibes
and A.
Barthélémy
, “Multiferroics: Towards a magnetoelectric memory
,” Nat. Mater.
7
, 425
(2008
).102.
A.
Sengupta
, P.
Panda
, P.
Wijesinghe
, Y.
Kim
, and K.
Roy
, “Magnetic tunnel junction mimics stochastic cortical spiking neurons
,” Sci. Rep.
6
, 30039
(2016
).103.
A.
Jaiswal
, S.
Roy
, G.
Srinivasan
, and K.
Roy
, “Proposal for a leaky-integrate-fire spiking neuron based on magnetoelectric switching of ferromagnets
,” IEEE Trans. Electron Devices
64
, 1818
–1824
(2017
).104.
A.
Sengupta
and K.
Roy
, “Encoding neural and synaptic functionalities in electron spin: A pathway to efficient neuromorphic computing
,” Appl. Phys. Rev.
4
, 041105
(2017
).105.
X.
Fong
, Y.
Kim
, R.
Venkatesan
, S. H.
Choday
, A.
Raghunathan
, and K.
Roy
, “Spin-transfer torque memories: Devices, circuits, and systems
,” Proc. IEEE
104
, 1449
–1488
(2016
).106.
W. F.
Brown
, Jr., “Thermal fluctuations of a single-domain particle
,” Phys. Rev.
130
, 1677
(1963
).107.
O.
Hassan
, R.
Faria
, K. Y.
Camsari
, J. Z.
Sun
, and S.
Datta
, “Low barrier magnet design for efficient hardware binary stochastic neurons
,” IEEE Magn. Lett.
10
, 1
(2019
).108.
A.
Sengupta
and K.
Roy
, “A vision for all-spin neural networks: A device to system perspective
,” IEEE Trans. Circuits Syst., I
63
, 2267
–2277
(2016
).109.
A.
Jaiswal
, A.
Agrawal
, P.
Panda
, and K.
Roy
, “Voltage-driven domain-wall motion based neuro-synaptic devices for dynamic on-line learning
,” arXiv:1705.06942 (2017
).110.
A.
Thiaville
, Y.
Nakatani
, J.
Miltat
, and Y.
Suzuki
, “Micromagnetic understanding of current-driven domain wall motion in patterned nanowires
,” Europhys. Lett.
69
, 990
(2005
).111.
M.-C.
Chen
, A.
Sengupta
, and K.
Roy
, “Magnetic skyrmion as a spintronic deep learning spiking neuron processor
,” IEEE Trans. Magn.
54
, 1
–7
(2018
).112.
A.
Sengupta
, A.
Banerjee
, and K.
Roy
, “Hybrid spintronic-CMOS spiking neural network with on-chip learning: Devices, circuits, and systems
,” Phys. Rev. Appl.
6
, 064003
(2016
).113.
M.
Sharad
, C.
Augustine
, G.
Panagopoulos
, and K.
Roy
, “Spin-based neuron model with domain-wall magnets as synapse
,” IEEE Trans. Nanotechnol.
11
, 843
–853
(2012
).114.
A.
Sengupta
, Y.
Shim
, and K.
Roy
, “Proposal for an all-spin artificial neural network: Emulating neural and synaptic functionalities through domain wall motion in ferromagnets
,” IEEE Trans. Biomed. Circuits Syst.
10
, 1152
–1160
(2016
).115.
A. F.
Vincent
, J.
Larroque
, N.
Locatelli
, N. B.
Romdhane
, O.
Bichler
, C.
Gamrat
, W. S.
Zhao
, J.-O.
Klein
, S.
Galdin-Retailleau
, and D.
Querlioz
, “Spin-transfer torque magnetic memory as a stochastic memristive synapse for neuromorphic systems
,” IEEE Trans. Biomed. Circuits Syst.
9
, 166
–174
(2015
).116.
G.
Srinivasan
, A.
Sengupta
, and K.
Roy
, “Magnetic tunnel junction based long-term short-term stochastic synapse for a spiking neural network with on-chip stdp learning
,” Sci. Rep.
6
, 29545
(2016
).117.
D.
Zhang
, L.
Zeng
, Y.
Zhang
, W.
Zhao
, and J. O.
Klein
, “Stochastic spintronic device based synapses and spiking neurons for neuromorphic computation
,” in 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)
(IEEE
, 2016
), pp. 173
–178
.118.
A.
Sengupta
and K.
Roy
, “Short-term plasticity and long-term potentiation in magnetic tunnel junctions: Towards volatile synapses
,” Phys. Rev. Appl.
5
, 024012
(2016
).119.
M.
Romera
, P.
Talatchian
, S.
Tsunegi
, F. A.
Araujo
, V.
Cros
, P.
Bortolotti
, J.
Trastoy
, K.
Yakushiji
, A.
Fukushima
, H.
Kubota
et al., “Vowel recognition with four coupled spin-torque nano-oscillators
,” Nature
563
, 230
(2018
).120.
A.
Hirohata
, H.
Sukegawa
, H.
Yanagihara
, I.
Žutić
, T.
Seki
, S.
Mizukami
, and R.
Swaminathan
, “Roadmap for emerging materials for spintronic device applications
,” IEEE Trans. Magn.
51
, 1
–11
(2015
).121.
A.
Sengupta
, M.
Parsa
, B.
Han
, and K.
Roy
, “Probabilistic deep spiking neural systems enabled by magnetic tunnel junction
,” IEEE Trans. Electron Devices
63
, 2963
–2970
(2016
).122.
S.
Ikeda
, J.
Hayakawa
, Y.
Ashizawa
, Y.
Lee
, K.
Miura
, H.
Hasegawa
, M.
Tsunoda
, F.
Matsukura
, and H.
Ohno
, “Tunnel magnetoresistance of 604% at 300 K by suppression of ta diffusion in Co Fe B/Mg O/Co Fe B pseudo-spin-valves annealed at high temperature
,” Appl. Phys. Lett.
93
, 082508
(2008
).123.
H.
Mulaosmanovic
, E.
Chicca
, M.
Bertele
, T.
Mikolajick
, and S.
Slesazeck
, “Mimicking biological neurons with a nanoscale ferroelectric transistor
,” Nanoscale
10
, 21755
–21763
(2018
).124.
H.
Mulaosmanovic
, J.
Ocker
, S.
Müller
, M.
Noack
, J.
Müller
, P.
Polakowski
, T.
Mikolajick
, and S.
Slesazeck
, “Novel ferroelectric FET based synapse for neuromorphic systems
,” in 2017 Symposium on VLSI Technology
(IEEE
, 2017
), pp. T176
–T177
.125.
H.
Mulaosmanovic
, T.
Mikolajick
, and S.
Slesazeck
, “Accumulative polarization reversal in nanoscale ferroelectric transistors
,” ACS Appl. Mater. Interfaces
10
, 23997
–24002
(2018
).126.
A. K.
Saha
, K.
Ni
, S.
Dutta
, S.
Datta
et al., “Phase field modeling of domain dynamics and polarization accumulation in ferroelectric HZO
,” arXiv:1901.07121 (2019
).127.
S.
Dutta
, A. K.
Saha
, P.
Panda
, W.
Chakraborty
, J.
Gomez
, A.
Khanna
, S.
Gupta
, K.
Roy
, and S.
Datta
, “Biologically plausible energy-efficient ferroelectric quasi-leaky integrate and fire neuron
,” in Symposium on VLSI Technology
(2019
).128.
S.
Dünkel
, M.
Trentzsch
, R.
Richter
, P.
Moll
, C.
Fuchs
, O.
Gehring
, M.
Majer
, S.
Wittek
, B.
Müller
, T.
Melde
et al., “A FEFET based super-low-power ultra-fast embedded NVM technology for 22 nm FDSOI and beyond
,” in 2017 IEEE International Electron Devices Meeting (IEDM)
(IEEE
, 2017
), p. 19
.129.
A. K.
Saha
and S. K.
Gupta
, “Modeling and comparative analysis of hysteretic ferroelectric and anti-ferroelectric FETs
,” in 2018 76th Device Research Conference (DRC)
(IEEE
, 2018
), pp. 1
–2
.130.
M.
Jerry
, P.-Y.
Chen
, J.
Zhang
, P.
Sharma
, K.
Ni
, S.
Yu
, and S.
Datta
, “Ferroelectric FET analog synapse for acceleration of deep neural network training
,” in 2017 IEEE International Electron Devices Meeting (IEDM)
(IEEE
, 2017
), p. 6
.131.
W.
Chung
, M.
Si
, and D. Y.
Peide
, “First demonstration of GE ferroelectric nanowire FET as synaptic device for online learning in neural network with high number of conductance state and Gmax/Gmin
,” in 2018 IEEE International Electron Devices Meeting (IEDM)
(IEEE
, 2018
), p. 15
.132.
B.
Obradovic
, T.
Rakshit
, R.
Hatcher
, J.
Kittl
, R.
Sengupta
, J. G.
Hong
, and M. S.
Rodder
, “A multi-bit neuromorphic weight cell using ferroelectric FETs, suitable for SOC integration
,” IEEE J. Electron Devices Soc.
6
, 438
–448
(2018
).133.
V.
Kornijcuk
, H.
Lim
, J. Y.
Seok
, G.
Kim
, S. K.
Kim
, I.
Kim
, B. J.
Choi
, and D. S.
Jeong
, “Leaky integrate-and-fire neuron circuit based on floating-gate integrator
,” Front. Neurosci.
10
, 212
(2016
).134.
D.
Kahng
and S. M.
Sze
, “A floating gate and its application to memory devices
,” Bell Syst. Tech. J.
46
, 1288
–1295
(1967
).135.
R. H.
Fowler
and L.
Nordheim
, “Electron emission in intense electric fields
,” Proc. R. Soc. London, Ser. A
119
, 173
–181
(1928
).136.
M.
Lenzlinger
and E.
Snow
, “Fowler-Nordheim tunneling into thermally grown SiO2
,” J. Appl. Phys.
40
, 278
–283
(1969
).137.
T.-S.
Jung
, Y.-J.
Choi
, K.-D.
Suh
, B.-H.
Suh
, J.-K.
Kim
, Y.-H.
Lim
, Y.-N.
Koh
, J.-W.
Park
, K.-J.
Lee
, J.-H.
Park
et al., “A 3.3 V 128 Mb multi-level NAND flash memory for mass storage applications
,” in 1996 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC
(IEEE
, 1996
), pp. 32
–33
.138.
M.
Bauer
, R.
Alexis
, G.
Atwood
, B.
Baltar
, A.
Fazio
, K.
Frary
, M.
Hensel
, M.
Ishac
, J.
Javanifard
, M.
Landgraf
et al., “A multilevel-cell 32 Mb flash memory
,” in Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000)
(IEEE
, 2000
), pp. 367
–368
.139.
M.
Holler
, S.
Tam
, H.
Castro
, and R.
Benson
, “An electrically trainable artificial neural network (ETANN) with 10240 floating gate synapses
,” in International Joint Conference on Neural Networks
(1989
), Vol. 2
, pp. 191
–196
.140.
B. W.
Lee
, B. J.
Sheu
, and H.
Yang
, “Analog floating-gate synapses for general-purpose VLSI neural computation
,” IEEE Trans. Circuits Syst.
38
, 654
–658
(1991
).141.
P. E.
Hasler
, C.
Diorio
, B. A.
Minch
, and C.
Mead
, “Single transistor learning synapses
,” in Advances in Neural Information Processing Systems
(Curran Associates
, 1995
), pp. 817
–824
.142.
S.-C.
Liu
and R.
Mockel
, “Temporally learning floating-gate VLSI synapses
,” in 2008 IEEE International Symposium on Circuits and Systems
(IEEE
, 2008
), pp. 2154
–2157
.143.
S.
Ramakrishnan
, P. E.
Hasler
, and C.
Gordon
, “Floating gate synapses with spike-time-dependent plasticity
,” IEEE Trans. Biomed. Circuits Syst.
5
, 244
–252
(2011
).144.
A.
Ankit
, A.
Sengupta
, P.
Panda
, and K.
Roy
, “RESPARC: A reconfigurable and energy-efficient architecture with memristive crossbars for deep spiking neural networks
,” in Proceedings of the 54th Annual Design Automation Conference 2017
(ACM
, 2017
), p. 27
.145.
A.
Ankit
, I. E.
Hajj
, S. R.
Chalamalasetti
, G.
Ndu
, M.
Foltin
, R. S.
Williams
, P.
Faraboschi
, W.-M. W.
Hwu
, J. P.
Strachan
, K.
Roy
et al., “Puma: A programmable ultra-efficient memristor-based accelerator for machine learning inference
,” in Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems
(ACM
, 2019
), pp. 715
–731
.146.
A.
Shafiee
, A.
Nag
, N.
Muralimanohar
, R.
Balasubramonian
, J. P.
Strachan
, M.
Hu
, R. S.
Williams
, and V.
Srikumar
, “ISAAC: A convolutional neural network accelerator with in-situ analog arithmetic in crossbars
,” ACM SIGARCH Comput. Archit. News
44
, 14
–26
(2016
).147.
P.
Chi
, S.
Li
, C.
Xu
, T.
Zhang
, J.
Zhao
, Y.
Liu
, Y.
Wang
, and Y.
Xie
, “Prime: A novel processing-in-memory architecture for neural network computation in ReRAM-based main memory
,” in Proceedings of the 43rd International Symposium on Computer Architecture
(IEEE Press
, 2016
), pp. 27
–39
.148.
S. G.
Ramasubramanian
, R.
Venkatesan
, M.
Sharad
, K.
Roy
, and A.
Raghunathan
, “Spindle: Spintronic deep learning engine for large-scale neuromorphic computing
,” in Proceedings of the 2014 international symposium on Low power electronics and design
(ACM
, 2014
), pp. 15
–20
.149.
Y.
Kim
, Y.
Zhang
, and P.
Li
, “A reconfigurable digital neuromorphic processor with memristive synaptic crossbar for cognitive computing
,” ACM J. Emerging Technol. Comput. Syst.
11
, 1
(2015
).150.
N. P.
Jouppi
, C.
Young
, N.
Patil
, D.
Patterson
, G.
Agrawal
, R.
Bajwa
, S.
Bates
, S.
Bhatia
, N.
Boden
, A.
Borchers
et al., “In-datacenter performance analysis of a tensor processing unit
,” in 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA
) (IEEE
, 2017
), pp. 1
–12
.151.
A.
Yousefzadeh
, E.
Stromatias
, M.
Soto
, T.
Serrano-Gotarredona
, and B.
Linares-Barranco
, “On practical issues for stochastic STDP hardware with 1-bit synaptic weights
,” Front. Neurosci.
12
, 665
(2018
).152.
G.
Srinivasan
and K.
Roy
, “Restocnet: Residual stochastic binary convolutional spiking neural network for memory-efficient neuromorphic computing
,” Front. Neurosci.
13
, 189
(2019
).153.
S.
Agarwal
, T.-T.
Quach
, O.
Parekh
, A. H.
Hsia
, E. P.
DeBenedictis
, C. D.
James
, M. J.
Marinella
, and J. B.
Aimone
, “Energy scaling advantages of resistive memory crossbar based computation and its application to sparse coding
,” Front. Neurosci.
9
, 484
(2016
).154.
P. A.
Merolla
, J. V.
Arthur
, R.
Alvarez-Icaza
, A. S.
Cassidy
, J.
Sawada
, F.
Akopyan
, B. L.
Jackson
, N.
Imam
, C.
Guo
, Y.
Nakamura
et al., “A million spiking-neuron integrated circuit with a scalable communication network and interface
,” Science
345
, 668
–673
(2014
).155.
M.
Davies
, N.
Srinivasa
, T.-H.
Lin
, G.
Chinya
, Y.
Cao
, S. H.
Choday
, G.
Dimou
, P.
Joshi
, N.
Imam
, S.
Jain
et al., “Loihi: A neuromorphic manycore processor with on-chip learning
,” IEEE Micro
38
, 82
–99
(2018
).156.
C. M.
Liyanagedera
, A.
Sengupta
, A.
Jaiswal
, and K.
Roy
, “Stochastic spiking neural networks enabled by magnetic tunnel junctions: From nontelegraphic to telegraphic switching regimes
,” Phys. Rev. Appl.
8
, 064017
(2017
).157.
E. O.
Neftci
, B. U.
Pedroni
, S.
Joshi
, M.
Al-Shedivat
, and G.
Cauwenberghs
, “Stochastic synapses enable efficient brain-inspired learning machines
,” Front. Neurosci.
10
, 241
(2016
).158.
W.
Senn
and S.
Fusi
, “Convergence of stochastic learning in perceptrons with binary synapses
,” Phys. Rev. E
71
, 061907
(2005
).159.
S.
Yu
, X.
Guan
, and H.-S. P.
Wong
, “On the stochastic nature of resistive switching in metal oxide RRAM: Physical modeling, Monte Carlo simulation, and experimental characterization
,” in 2011 International Electron Devices Meeting
(IEEE
, 2011
) p. 17
.160.
D.
Ielmini
, A. L.
Lacaita
, and D.
Mantegazza
, “Recovery and drift dynamics of resistance and threshold voltages in phase-change memories
,” IEEE Trans. Electron Devices
54
, 308
–315
(2007
).161.
S.
Jain
, A.
Sengupta
, K.
Roy
, and A.
Raghunathan
, “Rx-Caffe: Framework for evaluating and training deep neural networks on resistive crossbars
,” arXiv:1809.00072 (2018
).162.
I.
Chakraborty
, D.
Roy
, and K.
Roy
, “Technology aware training in memristive neuromorphic systems for nonideal synaptic crossbars
,” IEEE Trans. Emerging Top. Comput. Intell.
2
, 335
–344
(2018
).163.
Y.
Jeong
, M. A.
Zidan
, and W. D.
Lu
, “Parasitic effect analysis in memristor-array-based neuromorphic systems
,” IEEE Trans. Nanotechnol.
17
, 184
–193
(2018
).164.
C.
Liu
, M.
Hu
, J. P.
Strachan
, and H. H.
Li
, “Rescuing memristor-based neuromorphic design with high defects
,” in Proceedings of the 54th Annual Design Automation Conference 2017
(ACM
, 2017
), p. 87
.165.
L.
Chen
, J.
Li
, Y.
Chen
, Q.
Deng
, J.
Shen
, X.
Liang
, and L.
Jiang
, “Accelerator-friendly neural-network training: Learning variations and defects in RRAM crossbar
,” in Design, Automation & Test in Europe Conference & Exhibition (DATE)
(IEEE
, 2017
).166.
P.-Y.
Chen
, B.
Lin
, I.-T.
Wang
, T.-H.
Hou
, J.
Ye
, S.
Vrudhula
, J. S.
Seo
, Y.
Cao
, and S.
Yu
, “Mitigating effects of non-ideal synaptic device characteristics for on-chip learning
,” in 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
(IEEE
, 2015
).167.
I.
Kataeva
, F.
Merrikh-Bayat
, E.
Zamanidoost
, and D.
Strukov
, “Efficient training algorithms for neural networks based on memristive crossbar circuits
,” in 2015 International Joint Conference on Neural Networks (IJCNN)
(IEEE
, 2015
).168.
M.
Hu
, J. P.
Strachan
, Z.
Li
, E. M.
Grafals
, N.
Davila
, C.
Graves
, S.
Lam
, N.
Ge
, J. J.
Yang
, and R. S.
Williams
, “Dot-product engine for neuromorphic computing: Programming 1T1M crossbar to accelerate matrix-vector multiplication
,” in Proceedings of the 53rd Annual Design Automation Conference
(ACM
, 2016
), p. 19
.169.
B.
Liu
, H.
Li
, Y.
Chen
, X.
Li
, T.
Huang
, Q.
Wu
, and M.
Barnell
, “Reduction and IR-drop compensations techniques for reliable neuromorphic computing systems
,” in 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
(IEEE
, 2014
).170.
I.
Boybat
, M.
Le Gallo
, S.
Nandakumar
, T.
Moraitis
, T.
Parnell
, T.
Tuma
, B.
Rajendran
, Y.
Leblebici
, A.
Sebastian
, and E.
Eleftheriou
, “Neuromorphic computing with multi-memristive synapses
,” Nat. Commun.
9
, 2514
(2018
).171.
J. H.
Lee
, T.
Delbruck
, and M.
Pfeiffer
, “Training deep spiking neural networks using backpropagation
,” Front. Neurosci.
10
, 508
(2016
).172.
Y.
Wu
, L.
Deng
, G.
Li
, J.
Zhu
, and L.
Shi
, “Spatio-temporal backpropagation for training high-performance spiking neural networks
,” Front. Neurosci.
12
, 331
(2018
).173.
C.
Lee
, P.
Panda
, G.
Srinivasan
, and K.
Roy
, “Training deep spiking convolutional neural networks with STDP-based unsupervised pre-training followed by supervised fine-tuning
,” Front. Neurosci.
12
, 435
(2018
).174.
D.
Lee
, X.
Fong
, and K.
Roy
, “R-MRAM: A ROM-embedded STT MRAM cache
,” IEEE Electron Device Lett.
34
, 1256
–1258
(2013
).175.
S.
Jain
, A.
Ranjan
, K.
Roy
, and A.
Raghunathan
, “Computing in memory with spin-transfer torque magnetic RAM
,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst.
26
, 470
–483
(2018
).176.
J.
Zhou
, K.-H.
Kim
, and W.
Lu
, “Crossbar RRAM arrays: Selector device requirements during read operation
,” IEEE Trans. Electron Devices
61
, 1369
–1376
(2014
).177.
Y.-W.
Chin
, S.-E.
Chen
, M.-C.
Hsieh
, T.-S.
Chang
, C. J.
Lin
, and Y.-C.
King
, “Point twin-bit RRAM in 3D interweaved cross-point array by cu BEOL process
,” in 2014 IEEE International Electron Devices Meeting
(IEEE
, 2014
), p. 6
.178.
T.
Ohyanagi
, N.
Takaura
, M.
Kitamura
, M.
Tai
, M.
Kinoshita
, K.
Akita
, T.
Morikawa
, and J.
Tominaga
, “Superlattice phase change memory fabrication process for back end of line devices
,” Jpn. J. Appl. Phys., Part 1
52
, 05FF01
(2013
).179.
H.
Ohno
, T.
Endoh
, T.
Hanyu
, N.
Kasai
, and S.
Ikeda
, “Magnetic tunnel junction for nonvolatile CMOS logic
,” in 2010 International Electron Devices Meeting
(IEEE
, 2010
), p. 9
.180.
H.
Noguchi
, K.
Ikegami
, S.
Takaya
, E.
Arima
, K.
Kushida
, A.
Kawasumi
, H.
Hara
, K.
Abe
, N.
Shimomura
, J.
Ito
et al., “7.2 4Mb STT-MRAM-based cache with memory-access-aware power optimization and write-verify-write/read-modify-write scheme
,” in 2016 IEEE International Solid-State Circuits Conference (ISSCC)
(IEEE
, 2016
), pp. 132
–133
.© 2020 Author(s).
2020
Author(s)
You do not currently have access to this content.
