What can be integrated on the silicon photonics platform and how?

Silicon photonics has evolved into a pivotal technology driven by advancements in optical communication, computing, sensing, etc. It represents an endeavor to harness the mature complementary metal–oxide–semiconductor (CMOS) processing techniques and apply them to photonics and optoelectronics.¹ This advantage offers a possibly substantial leap in yield improvement, cost reduction, and shorter time-to-market with minimal additional investment. The inception of silicon photonic integrated circuits (PICs) in 1985 marked a milestone.² At present, silicon photonics is poised for the next frontier of large-scale integration (LSI), targeting chips accommodating thousands of components^3,4 and beyond. This technology has found diverse applications spanning coherent receivers, optical computing, integrated microwave photonics, programmable circuits, light detection and ranging (LIDAR), quantum photonics, and more.⁵ 

However, it has become apparent that silicon alone cannot meet the demands of all PIC applications.⁶ First, achieving light sources in silicon presents challenges due to its indirect bandgap, posing obstacles to on-chip laser or optical amplifier integration. Second, while silicon electro-optic modulators have made strides, their performances remain inadequate for future ultrahigh-speed optical signal modulation. Third, the energy-intensive nature of silicon-based tunable devices, reliant on thermo-optic or free-carrier dispersion effects, poses a barrier to large-scale programmable photonic circuits. Moreover, there are demands to overcome silicon’s limitation in achieving direct detection beyond the near-infrared/mid-infrared (MIR) wavelength range. In addition, the quest for ultra-low-loss waveguides in silicon photonics remains important to support larger-scale integration, enhanced on-chip nonlinearities, and extended on-chip optical delays.

While alternative waveguide materials may address some of silicon’s limitations, they may introduce constraints for specific applications. Current trends in PIC technologies underscore the absence of a single waveguide material capable of meeting all potential application needs. A promising approach to surmount this challenge involves integrating diverse material technologies into a single PIC or package. This strategy allows each material to furnish optimal photonic functionality without compromising the overall chip’s performance.

In this Perspective, we provide an overview of various materials currently integrated with silicon photonic devices, along with diverse integration methods and their demonstrated performance excellence. These include integrated gain materials for on-chip light sources, electro-optic materials for modulators, piezoelectric materials for low-power tuning devices, germanium and other materials for on-chip detectors, and ultra-low-loss on-chip optical waveguides. Furthermore, we delve into the burgeoning trend of silicon hybrid and heterogeneous integration, before providing a summary and outlook on the technological landscape.

A major roadblock for scaling silicon photonics toward future capacity and integration requirements lies in the efficient on-chip lasing/gain sources, which is a fundamental problem due to the indirect bandgap property in silicon. The gain material is an indispensable component serving as the electrical to optical converter/regenerator; hence, the on-chip light/gain sources stand in the way of universal adoption of silicon photonics technology. Several strategies have been developed to integrate III–V lasers/gain materials onto the silicon photonics chips,⁷ including hybrid integration, heterogeneous integration, and monolithic integration, respectively, as shown in Figs. 1(a)–1(c). Hybrid integration refers to the process where fabricated III–V active chips are optically combined with silicon chips using techniques such as in-plane butt coupling, photonic wire bonding (PWB), or flip-chip packaging. In contrast, heterogeneous integration involves transferring non-silicon dies or wafers onto processed silicon chips through bonding methods or micro-transfer printing. In this setup, the non-silicon components are placed above the silicon chips, and the optical connection is established through vertical evanescent coupling.⁶ 

PICs based on III–V material platforms have been commercialized and identified as a practical solution for industry-leading light sources and gain components over the past half century, owing to the high electrical–optical efficiency with the direct bandgap property. Many high-performance light sources have been realized on the III–V platform.^8–10 However, compared with a silicon-on-insulator (SOI) wafer (∼300 mm), III–V wafers are generally ∼200 mm for gallium arsenide (GaAs) and ∼150 mm for indium phosphide (InP). III–V PICs tend to be pricier compared to silicon PICs, primarily due to the higher cost of materials and their lack of compatibility with the CMOS technology. The high propagation loss in III–V waveguides (typically over 1 dB/cm) also restricts the performance of the system integration-wise. Moreover, high-confinement waveguides and ultra-compact devices for dense integration are difficult to achieve due to the inherently small index contrast on the III–V platform.

Hybrid integration connects fully processed III–V dies and silicon dies into one single package. This technology can pre-test devices and discard the disabled components before the integration. However, the integration density is limited, and the stringent alignment of light ports between active and passive dies is a challenge. A battery-powered optical comb generator has been developed, showcasing the hybrid integration of a III–V reflective semiconductor optical amplifier (RSOA) with a silicon nitride (Si₃N₄) microring chip [Fig. 2(a)]. A low-noise Kerr soliton optical comb with a repetition rate of 194 GHz is achieved. The hybrid integrated laser exhibits a threshold current of 49 mA, an on-chip output power of 9.5 mW, and a linewidth of 40 kHz.¹¹ Hybrid integration between a commercial Fabry–Pérot laser and a Si₃N₄ chip is realized to obtain a large bandwidth of 12.5 nm, a narrow linewidth of smaller than 359 kHz in the near-infrared band [Fig. 2(b)].¹² A hybrid integrated RSOA with a thin film lithium niobate (TFLN) external cavity is proposed to achieve an on-chip Pockels laser for the first time [Fig. 2(c)]. A record modulation speed of 2 × 10⁸ Hz/s and a switching speed of 50 MHz are demonstrated. Furthermore, leveraging the high nonlinearity of TFLN enables the realization of second harmonic frequency conversion, facilitating the simultaneous output of two wavelengths.¹³ Integration of a distributed feedback (DFB) laser and a Si₃N₄ microring is achieved with a Q factor of 2.6 × 10⁸. The noise of the hybrid laser is reduced by five orders of magnitude, achieving an ultra-narrow linewidth of 1.2 Hz.¹⁴ 

For the hybrid integration, complex active alignment, namely keeping the laser/SOA working and real-time monitoring of the optical power while positioning and mounting the chips, is required when assembling discrete active and passive chips. This active alignment undoubtedly causes high costs and low throughput. One effective solution is to use the PWB method. As shown in Fig. 2(d), a novel co-packaging method through hybrid integration using PWB is presented.¹⁵ The integration process involves die-bonding a DFB laser into a trench on an SOI chip and coupling it to the silicon circuitry through PWB. Optical engines relying on PWB with insertion losses of (0.7 ± 0.15) dB for connecting InP laser array–silicon modulators–fibers are demonstrated.¹⁶ An eight-channel transmitter can offer 448 Gbit/s aggregate line rate, and a four-channel coherent transmitter can operate at a net data rate of 732.7 Gbit/s, which is a record performance for coherent silicon transmitters with co-packaged lasers. These PWBs are resilient in environmental-stability tests and at high optical powers. An RSOA and a silicon external feedback chip are hybrid integrated using PWB with a loss of 2.1 ± 0.2 dB.¹⁷ The external laser possesses a single-mode tuning range of 50 nm, side mode suppression ratios (SMSRs) above 40 dB, and intrinsic linewidths down to 105 kHz. Cryogenic optical packaging using PWB with 2 dB/channel at a temperature of 5 K is demonstrated between fibers and silicon waveguides.¹⁸ This work indicates that PWBs can be used for photonic packaging from room temperature down to 5 K with low loss, a large bandwidth, and a mechanically robust performance.

Heterogeneous integration bonds unprocessed III–V wafers to patterned SOI wafers with a rough alignment, before proceeding to fabricate III–V devices across the entire wafer scale using lithography. This integration method shifts fabrication from the chip level to the wafer level, avoiding the need for highly precise active alignment between integrated components. Consequently, it enhances the integration density, yield, and economic efficiency. An InP nanobeam laser is heterogeneously integrated on an SOI chip [Fig. 2(e)]. The threshold current is only 100 µA with a maximum output power of 95 µW, and the electro-optical conversion efficiency is greater than 10%.¹⁹ A narrow linewidth laser is demonstrated with direct InP/Si/Si₃N₄ bonding for the first time [Fig. 2(f)]. A threshold current of 75 mA, a maximum on-chip output power of 0.5 mW, a linewidth of 4 kHz, and an SMSR of more than 58 dB are achieved.²⁰ A III–V laser, a modulator, a SOA, and a photodetector (PD) are concurrently integrated on a Si₃N₄ chip [Fig. 2(g)]. The maximum output power of the laser reaches 10 mW with a linewidth of 2.8 kHz. It is worth mentioning that the maximum temperature of the continuous wave laser reaches 185 °C.²¹ 

Monolithic integration is considered the ultimate integration technology through the direct epitaxial growth of III–V gain materials on the silicon substrates. This strategy possesses natural heatsinking and economic favor. However, this technique faces some challenges. The large mismatch of polarities, thermal expansion coefficients, and lattice constants between III–V materials and silicon creates high densities of crystalline defects. Addressing the challenge of achieving high light coupling efficiency is also imperative. A 1.3 µm quantum dot (QD) DFB laser directly grown on a Si substrate is demonstrated, for the first time, with a threshold current of 20 mA, a maximum output power of 4.4 mW, a high side mode suppression ratio (SMSR) of greater than 50 dB, and a maximum operating temperature of 70 °C [Fig. 2(h)].²² They further achieve monolithic integration of an InAs QD laser within a trench of a Si₃N₄ chip [see Fig. 2(i)]. The threshold current is 47.5 mA, with a maximum output power of 126.6 mW.²³ This monolithic integration scheme simplifies the process of coupling the laser into a passive waveguide. Unfortunately, due to the imperfect design and process, the light coupling into a Si₃N₄ waveguide is not realized. As shown in Fig. 2(j), a scheme of a III–V QD laser directly growing on an SOI trench is proposed, and light coupling from the laser to a Si waveguide is achieved by butt coupling for the first time. The coupling loss between the laser and the Si waveguide is 6.43 dB, and the maximum laser power from the Si waveguide is 3.8 mW. In addition, the operating temperature of the monolithically integrated laser is up to 85 °C, and the threshold current is 65 mA.²⁴ For the monolithic integration scheme, the thickness of the III–V material must be controlled during growth, and the lithography of the laser pattern must be precisely aligned. The alignment tolerance between Si-based lasers and silicon chips is discussed in our previous work.⁷ Filling the region between the III–V and Si waveguide is an effective approach. Furthermore, the alignment challenges can be addressed by using a multi-layer coupler^25,26 or photonic wire bonding.^27,28

On-chip lasers are crucial for applications such as coherent transceivers, microwave photonics, and quantum photonics. A fully integrated hybrid microwave photonic receiver has been realized by combining an InP laser chip with a monolithic silicon photonic circuit.²⁹ In addition, a chip-based microwave photonics instantaneous frequency measurement system has been developed using a hybrid-integrated InP DFB laser and silicon photonics circuits.³⁰ Narrow-linewidth self-injection-locked lasers and a dark soliton frequency comb have been utilized in integrated photonics to achieve low-noise microwave generation through two-point optical frequency division.³¹ 

Electro-optic (EO) modulation plays a crucial role in converting high-speed signals from the electrical domain to the optical domain, serving as essential components in long-haul optical communication networks,³² microwave photonics,³³ and data-center communications.³⁴ 

Recently, silicon photonics and PIC technology³⁵ have provided a simple and cost-effective approach for compact-footprint, large-bandwidth, and high-efficiency EO modulators due to its complementary metal–oxide–semiconductor (CMOS)-compatible process. All-silicon modulators with 110-GHz bandwidths based on plasma dispersion effect have been implemented.^36,37 Nevertheless, their small optical modulation amplitude or low extinction ratio may be insufficient to support higher data communication rates. Due to the centrosymmetric crystalline structure of the silicon material, it lacks the Pockels effect. Therefore, an on-chip modulation scheme utilizing second-order nonlinear materials is proposed and demonstrated. This approach offers higher energy efficiency, improved linearity, and increased bandwidth compared to silicon free-carrier-dispersion-based modulation, which tends to consume more power. The thin-film materials with the Pockels effect can achieve an electrical-field-driven modulation with the change of the refractive index, such as TFLN,³⁸ aluminum nitride (AlN),³⁹ silicon carbide (SiC),⁴⁰ barium titanate (BTO),⁴¹ lead zirconate titanate (PZT),⁴² and other organic spin-coating material,⁴³ as shown in Table I. Thanks to advancements in thin-film fabrication processes, these materials have been successfully integrated onto the silicon photonics platform.

Among them, TFLN is one of the most commercially successful EO material thin films, which exhibits an excellent EO effect (γ₃₃ = 33 pm/V), a wide transparency window, and low optical loss.⁵⁸ By the smart cut technique with crystal ion slicing,^38,59 high-energy ions are used to inject on the crystal surface to create a damage layer at a specific depth. Then, by the layer transferring, the ion-implanted wafer is bonded onto a SiO₂/Si substrate. After annealing, splitting, and polishing processes, a submicrometer single-crystalline lithium niobate can be fabricated on a silicon handle wafer, forming a lithium-niobate-on-insulator (LNOI) wafer. The LNOI platform has emerged as a promising alternative for the on-chip EO modulation. The high index contrast (n_TFLN: ∼2.1, n_SiO2: ∼1.4) leads to strong confined optical modes. Therefore, the electrode gap can be further decreased to achieve a lower driving voltage while avoiding external optical propagation loss. Note that the optical propagation should be oriented along the y-axis to exploit the largest EO coefficient γ₃₃ of the x-cut LNOI wafer. Integrated high-efficiency (∼2 V cm) and large-bandwidth (∼100 GHz) EO modulators based on the LNOI platforms are achieved by a careful design, including the EO overlap, EO velocity, and impedance matching [Fig. 3(a)].^60–62 However, strongly slanted sidewalls caused by direct etching of TFLN need to be further improved. Recently, a diamond-like carbon has been introduced as a hard mask to overcome this challenge and achieve a nearly vertical sidewall.⁶³ Moreover, silicon or Si₃N₄ and TFLN heterogeneously integrated platforms can be used to avoid directly patterning the TFLN, which provides a promising direction for large-scale TFLN PICs. A silicon and TFLN heterogeneously integrated microring modulator has been presented, which consists of a 15-μm-radius silicon microring and TFLN bonded together by benzocyclobutene.⁶⁴ The compact modulator exhibits a 3-dB bandwidth of 5 GHz and a modulation data rate of 9 Gbps. Using a similar integration approach, a silicon and TFLN heterogeneously integrated Mach–Zehnder modulator is demonstrated.⁶⁵ The modulator shows a large 3-dB bandwidth of 70 GHz and a high modulation efficiency of 2.2 V cm, which supports a modulation data rate of 112 Gbps. Due to the ultra-low optical loss and CMOS compatibility of Si₃N₄ material, a Si₃N₄-loaded TFLN platform has been demonstrated for large-bandwidth and high-efficiency EO modulators [Fig. 3(f)].⁵⁸ The Si₃N₄ and TFLN heterogeneously integrated topological cavity-based modulator exhibits a large 3-dB bandwidth of 104 GHz and a modulation data rate of 100 Gbps. In addition, by a die-to-wafer bonding technology, a strategy that integrates TFLN on the Si₃N₄ circuits has been demonstrated for high-performance modulators.⁶⁶ The device exhibits a low loss of 1 dB and a 3-dB bandwidth of 37 GHz. The TFLN integrated on the silicon photonics platform has opened a new path for on-chip modulation.

TFLN can be poled using either scanning-probe microscopy⁶⁸ or a strong electric field.^69,70 The poling process involves inverting the local crystal domain of the TFLN. In x-cut TFLN, high-voltage square pulses with peak-to-peak voltages (V_pp) ranging from 100 to 300 V, a pulse frequency of 5 Hz, and a duty cycle of 30% are employed to achieve poling.⁷⁰ The total poling duration for each step is ∼10 s. An electric field of about 27 kV/mm is applied to ensure that the +z axis remains aligned with the electric field after the 180° rotation of the waveguide.

To achieve stable and low-loss interconnects for devices and components across many materials, PWB technology is used to attach fiber arrays to TFLN waveguides for the integrated EO modulator and pulse generation. The measured coupling loss of the PWB interface is 5 dB/facet. The stable pulse and flat frequency comb are generated by the PWB-based packaged device.⁷¹ 

Lithium tantalate (LT) is an EO material much like LN, which has attracted much attention in recent years. They exhibit a similar EO coefficient (LN: γ₃₃ ∼ 31 pm/V; LT: γ₃₃ ∼ 30.5 pm/V). Now, the smart cut ion slicing and layer transferring process enables the fabrication of LT-on-insulator (LTOI) wafers. The LTOI has been developed and used for volume manufacturing.⁵² Thin-film LT (TFLT) demonstrates weak optical anisotropy, approximately an order of magnitude lower than LN, which can support compact waveguide bends without mode mixing.

Recently, a silicon and TFLT heterogeneously integrated microring modulator with a 3-dB bandwidth of 20 GHz has been demonstrated.⁷² The modulator supports NRZ and PAM4 signals with a data rate of 20 Gbps. By directly etching the TFLT, tunable racetrack microring and high-speed Mach–Zehnder modulators are fabricated. The measured 3-dB bandwidth and modulation efficiency are 40 GHz and 1.6 V cm, respectively.⁵² In particular, compared to TFLN-based EO modulators, TFLT-based EO modulators exhibit stable direct current bias points.^45,73 Now, the TFLT-based EO modulators with a 3-dB bandwidth of 110 GHz can be achieved, which supports a PAM8 signal with data rates up to 400 Gbps.⁴⁵ 

AlN is a suitable EO material with the potential for large-scale integration on silicon substrates due to its superior second-order nonlinearity. AlN exhibits one of the largest bandgaps, superior thermal conductivity, and a small thermal-optic coefficient, which has been widely applied on electronic substrates and chip carriers to improve the tolerance of temperature fluctuation.³⁹ By magnetron sputtering deposition, the AlN thin film shows a c-axis orientation ([0002] direction) normal to the plane, which is essential for taking advantage of the largest component of χ⁽²⁾ tensor.⁴⁶ A CMOS-compatible AlN EO modulator has been demonstrated with a 3-dB bandwidth of 2.3 GHz and a low power consumption of 10 fJ/bit [Fig. 3(b)].⁴⁶ Then, an AlN EO phase shifter is demonstrated.⁵³ The measured modulation efficiencies are ∼240 V cm for the transverse electric mode and ∼320 V cm for the transverse magnetic mode; thus, the Pockels coefficient of the deposited AlN thin film is deduced to be ∼1 pm/V. In addition, a mid-infrared EO modulator based on an AlN and silicon heterogeneously integrated slot waveguide is proposed and theoretically evaluated.⁷⁴ A maximum effective index change of >2 × 10⁻⁵ caused by the Pockels effect in the AlN thin film is obtained.

AlN has a low electro-optic coefficient, resulting in lower modulation efficiency for AlN electro-optic phase shifters (∼240 V cm). However, AlN has a significant advantage: it is compatible with CMOS processes, making it a low-cost platform for integrating active and passive photonic devices. In fact, by introducing scandium doping, it is possible to obtain AlScN films with higher electro-optic coefficients, leading to more efficient modulation.^75–77 A silicon-integrated AlScN electro-optic modulator has been reported, with the authors claiming an in-device effective EO coefficient of 2.86 pm/V, a minimum half-wave voltage–length product of 3.12 V cm at 14 GHz, and a 3-dB modulation bandwidth of 22 GHz.⁷⁸ This indicates that scandium-doped AlN has the potential to achieve higher electro-optic coefficients and a better electro-optic modulation performance, although further research is needed.

The third-generation semiconductor material SiC is a well-known CMOS-compatible material, which has been explored for electronic devices. So far, SiC exists in 250 different polytypes, but only 3C-, 4H-, and 6H-SiC can be stably fabricated and commercially available for PICs.⁴⁰ In particular, significant progress has been made for 3C-SiC-on-insulators (3C-SiCOIs) and 4H-SiC-on-insulators (4H-SiCOIs) by the epitaxially growing method.^79,80 The non-centrosymmetric material SiC has the potential for on-chip Pockels modulation. Recently, a CMOS-compatible EO modulator on the 3C-SiCOI platform has been demonstrated, and the 3-dB bandwidth is measured as 7.1 GHz. An EO coefficient γ₄₁ of 1.5 pm/V is extracted [Fig. 3(c)].⁴⁷ The performance of on-chip modulation on the SiCOI platform is currently under exploration and optimization.

Although the electro-optic coefficient of SiC is ∼20 times lower than that of lithium niobate, SiC offers several advantages: SiC devices can be fabricated at low cost due to their compatibility with CMOS foundry nanofabrication, which also opens up the possibility for integration with electronics; the high optical damage threshold and bulk Young’s modulus of 450 GPa enhance the potential of SiC devices for operation in harsh environments. The reported SiC modulator can continuously operate at high optical intensities of up to 913 kW/mm² without signal degradation or photorefraction.⁴⁷ SiC modulators have the potential to be applied in low-noise microwave and nonlinear photonics,⁸¹ or a parametric frequency conversion of weak fields.⁸² 

A PZT thin film with a large EO coefficient γ₃₃ (∼67 pm/V) can be deposited on silicon by chemical solution deposition.⁴⁹ The thickness of the PZT can be controlled by repeating the spin-coating and annealing procedure. Using the spin-coating technique, a ferroelectric waveguide Mach–Zehnder modulator with a high modulation efficiency of 1.3 V cm can generate a four-level pulse amplitude modulation signal with a record data rate of up to 200 Gbps on the PZT platform.⁵⁵ To date, a 4-in. PZT wafer on silicon has been realized by the chemical solution deposition method,⁸³ and the EO modulators developed on the platform exhibit a 3-dB bandwidth of 12 GHz [Fig. 3(e)]. The PZT and Si₃N₄ heterogeneously integrated EO modulator shows a modulation efficiency of 3.3 V cm and a 3-dB bandwidth of 33 GHz [Fig. 3(i)].⁴⁹ The straightforward fabrication process provides an alternative for the integrated high-speed EO modulators.

BTO has one of the largest EO coefficients γ₄₂ (∼923 pm/V) of all materials; it is a chemically and thermally stable material.⁴⁸ The high-quality and single-crystalline BTO thin film can be formed on the silicon photonics platform by a combination of molecular beam epitaxy (MBE) and direct wafer bonding. Moreover, the BTO thin film features a unique crystalline orientation and ferroelectric domain switching for the on-chip modulation.⁵⁴ Some BTO modulators reveal the mechanism and achieve high-performance on-chip modulation. On BTO and silicon heterogeneously integrated platforms, a large 3-dB bandwidth of 30 GHz and a modulation data rate of 40 Gbps can be obtained [Fig. 3(j)].⁴⁸ To further improve the modulation performance, a plasmonic modulator on the BTO platform is demonstrated,⁴⁸ which exhibits a ∼6-dB bandwidth of 70 GHz and a modulation data rate of 116 Gbps.⁵⁴ Moreover, wafer-scale BTO integrated on silicon substrates has been fabricated.⁸⁴ The Mach–Zehnder modulators on the platform show a modulation efficiency of 0.48 V cm and support a modulation data rate of up to ∼200 Gbps [Fig. 3(d)].

To align the randomly oriented ferroelectric domains in the thin-film BTO, the devices are poled by a DC bias of 5 V for 10 s.⁴⁸ The increasing voltage will switch the ferroelectric domains and eliminate anti-parallel domains. The hysteresis loop can be clearly observed during the voltage sweeping.^48,85

Organic spin-coating materials with a large EO coefficient (>100 pm/V) have been integrated on silicon with annealing polarization,^86,87 which provides a flexible and scalable solution for EO modulation on the silicon photonics platform. Two structures are used for polymer-based EO modulation. One is a weak-field overlap method that allows the optical mode field to leak into the organic thin film materials for EO modulation.⁸⁸ Using this strategy, a silicon and polymer heterogeneously integrated EO modulator with a high bearable ambient temperature of up to 110 °C is demonstrated, which exhibits a high modulation efficiency of 1.44 V cm and a 3-dB bandwidth of 68 GHz [Fig. 3(g)].⁸⁶ The modulator can generate a four-level pulse amplitude modulation signal with a data rate of 200 Gbps. To further improve the EO overlap in the silicon and polymer heterogeneously integrated EO modulator, a subwavelength grating waveguide-based microring modulator is demonstrated.⁸⁸ This modulator shows a 3-dB bandwidth of 40 GHz with compact footprints. The other uses strong mode field confinement by a slot waveguide to realize the strong EO overlap.⁴³ A silicon and polymer heterogeneously integrated slot-waveguide EO modulator is presented with a high modulation efficiency of 0.05 V cm [Fig. 3(h)].⁴³ It is worth mentioning that a plasmonic modulator consisting of a metal–insulator–metal slot waveguide with the spin-coating polymer exhibits a record modulation efficiency of 0.006 V cm and a record bandwidth of 500 GHz.⁵⁰ These solutions show high-efficiency and large-bandwidth EO modulation. However, they face challenges in temperature stability in a CMOS foundry integration.⁸⁷ 

Polymers can generally be poled using applied temperature and voltage methods. To induce the Pockels effect in EO polymers, a poling voltage (typically between 40 and 400 V) is applied across the electrodes near the glass transition temperature (∼60 to 170 °C) to align the polymer’s chromophores.^38,43,86,88 Once the modulator cools down to room temperature and the poling voltage is removed, the molecular orientation is frozen in place, allowing for effective EO modulation.

Recently, a new EO material family exhibiting the Pockels effect has been demonstrated, called ferroelectric nematic liquid crystals, which enables a high-speed EO phase shift.⁸⁹ The new material can avoid electro-thermal poling issues and provide an alternative to achieve a high-speed EO modulator. A silicon and ferroelectric nematic liquid crystal heterogeneously integrated Mach–Zehnder modulator is demonstrated. The finger-loaded waveguide is used to enhance the light–matter interaction, achieving the modulation efficiencies V_π L of 0.025 V cm (DC modulation) and 2.57 V cm (AC modulation). The extracted EO coefficient γ₃₃ is 24 pm/V. The measured 6-dB modulation bandwidth is 4.18 GHz.⁹⁰ The reliable and stable EO platform is promising for the high-speed EO modulator in optical communication.

With the improvement in the manufacturing process and device performance, the Pockels materials are integrated on the silicon photonics platform to achieve on-chip EO modulators with low power consumption, low losses, large bandwidths, and high efficiencies. They promote the advances in the integration of photonics and electronics, offering new possibilities for next-generation high-performance optoelectronic integrated circuits and systems.

Tunable silicon photonic devices are essential building blocks in large-scale PICs. The key requirements of tunable devices consist of low power consumption, low loss, and fast response. Thermo-optic tuning and EO tuning by free-carrier dispersion are general methods on the silicon photonics platform. However, both tuning mechanisms face the challenge of high power consumption.^91,92 Piezoelectric effect is a physical phenomenon that realizes the conversion between electrical energy and mechanical energy. When an electric field is applied to the electrodes of a piezo-optomechanically tuned device, refractive modulation is achieved through piezo-optomechanical coupling, which results from the strain-optic effect and the moving boundary effect.⁹³ The strain generated by the piezoelectric response of the material, along with the displacement of the thin-film boundaries, causes a photoelastic change in the refractive index of the piezoelectric material. This, in turn, modulates the effective refractive index of the optical mode, allowing the optical phase to be tuned by the applied electric field.

Optical tuning based on the piezoelectric effect is a consequence of the electric field influence. Compared to thermo-optic modulation in silicon, piezoelectric-driven power consumption can be reduced by three to five orders of magnitude,⁹⁴ which is of great significance for achieving low power consumption and large-scale PICs in applications with frequency response ranging from KHz to GHz. Benefitting from the progress and maturity of thin film growth and deposition techniques, such as atomic layer deposition (ALD)⁹⁵ and molecular beam epitaxy (MBE),⁹⁶ low-loss and high-piezoelectric-coefficient thin films have been prepared and integrated on the silicon photonics platform, including AlN,³⁹ PZT,⁴² and hafnium dioxide (HfO₂).⁹⁷  Table II shows some reported piezoelectric materials integrated on silicon platforms for low-power tuning.

PZT is an important thin film for piezoelectric tuning due to its relatively large piezoelectric coefficient (d₃₃ = 150 pm/V).¹⁰⁰ The piezoelectric properties of the PZT thin film depend on deposition processing, chemical composition, thickness, and crystal orientation. Generally, the low-power piezoelectric tuning device can be achieved by spin-coated sol-gel morphotropic PZT, annealing, and poled process,^98,101 which provides a flexible solution for piezoelectric tuning. A record tuning efficiency of 25 pm/V with a low tuning power consumption of 1200 nW/pm has been demonstrated based on PZT and Si₃N₄ heterogeneously integrated waveguides with undercutting structures.⁹⁸ Moreover, a record power consumption of 20 nW/pm is obtained by the careful waveguide and electrode design [Fig. 4(a)].⁴² 

The AlN thin film for piezoelectric tuning has been widely studied due to its CMOS-compatible process. The power consumption of piezoelectric tuning based on the AlN thin film can reach below nanowatts within the frequency response of MHz level.⁹⁸ Based on the AlN and Si₃N₄ heterogeneously integrated platform, a 4 × 4 programmable circuit of cascaded Mach–Zehnder interferometers is demonstrated for unitary transformation operations with a fast switching time of 3 ns.⁹⁴ Benefitting from the fast response, the piezoelectric actuators are demonstrated for controlling soliton microcomb generation with a low power consumption of 300 nW.¹⁰² A tuning efficiency of 0.2 pm/V can be obtained for TE and TM modes on the AlN and Si₃N₄ heterogeneously integrated platform. The measured tuning power consumption is 5 nW/pm [Fig. 4(b)].¹⁰³ The AlN piezoelectric-driven device has been used to achieve a bulk acoustic wave resonance-based optical isolator. However, a low piezoelectric coefficient (d₃₃ = 5.53 pm/V) results in low tuning efficiency and a large driving voltage.³⁹ 

The HfO₂ thin film exhibits a wide bandgap (∼5 eV) and high dielectric constant (∼24),^97,104 which has been widely used in microelectronics. After extensive research, ferroelectric orthorhombic phases can be obtained in HfO₂ by doping.¹⁰⁵ Since the centrosymmetric tetragonal phases are transformed into orthorhombic phases with non-centrosymmetric structures, the doped HfO₂ thin film exhibits piezoelectric property (d₃₁ = −11.5 pm/V),^106,107 which is an alternative to solving the problem of low modulation efficiency in CMOS-compatible piezoelectric thin films. The Zr-doped HfO₂ thin film has been introduced as a piezoelectric layer to achieve a linear bidirectional piezoelectric tuning [Fig. 4(c)].⁹⁹ The tuning efficiency is one order of magnitude higher than that of AlN thin film with a lower power consumption of below nanowatts. In addition, the HfO₂ thin film is compatible with the CMOS process, which is promising to demonstrate large-scale piezoelectric-driven PICs.

Piezoelectric materials integrated on the silicon photonics platform offer a solution for tunable devices in large-scale silicon PICs. These integrated devices exhibit low-power, linear, bidirectional, non-absorptive, and fast-tuning properties, which bring new features to the silicon photonics platform.

An on-chip photodetector (PD) plays a pivotal role in silicon-integrated circuits by converting optical signals into electrical ones. Silicon, with an indirect bandgap of 1.12 eV and a corresponding cutoff wavelength of 1.1 µm, faces limitations in achieving direct detection within the near-infrared/mid-infrared wavelength range. To overcome this issue, diverse alternative materials such as germanium (Ge), germanium tin (GeSn), III–V compounds, and 2D materials have been integrated into silicon photonics platforms to enable effective absorption at desired wavelengths.

Ge has been proven highly effective in absorbing light within the telecom C band, making it an ideal addition to the silicon photonics platform as an absorption material. An integrated metal–semiconductor–metal (MSM) Ge PD is demonstrated utilizing the ultrahigh vacuum (UHV) chemical vapor deposition (CVD) method, boasting a measured responsivity of ∼0.55 A/W.¹⁰⁸ The first high-speed waveguide-coupled Ge PD on the silicon photonics platform is reported with a bandwidth of 31.3 GHz, capable of supporting a data transmission rate of 40 Gb/s.¹⁰⁹ Furthermore, a vertical PIN type Ge PD with gain peaking is developed, leveraging optimized on-chip spiral inductors to achieve an outstanding performance: a low dark current density of 6.4 nA at −3 V, a responsivity of 0.89 A/W at −3 V, and a bandwidth of 80 GHz.¹¹⁰ The lateral PIN structure of the Ge PD facilitates the realization of a thinner intrinsic region, thereby enhancing the bandwidth. Furthermore, a lateral PIN Ge PD fabrication technology is developed to extend the bandwidth of the LPIN Ge PD to an impressive 265 GHz [Fig. 5(a)].¹¹¹ 

To fulfill the demands for high sensitivity and rapid detection, PDs must possess both high gain and broad bandwidth. Employing avalanche PDs (APDs), which inherently offer internal gain, presents a viable solution. A very high gain–bandwidth product (GBP) of 615 GHz has been reported, attributed to the relatively compact multiplication region in Ge/Si APDs.¹¹³ Recently, a novel high-speed waveguide-coupled Ge/Si impedance resonance APD has been demonstrated, achieving a groundbreaking GBP exceeding 1 THz [Fig. 5(b)].¹¹⁴ This APD exhibits a primary optical responsivity of 0.87 A/W at unity gain, maintains a large bandwidth of 53 GHz within the gain range of 9–19.5, and achieves an ultrahigh GBP of 1033 GHz under −8.6 V at 1550 nm.

While Ge PDs have made significant progress in recent years, their performances diminish when detecting longer wavelengths, such as those in the L band or >2 µm. This limitation arises from Ge’s absorption curve sharply declining beyond 1610 nm. One promising alternative solution involves the incorporation of Sn into Ge to create either GeSn alloy or GeSn quantum well structures.^115,116 A pioneering study shows that a 2% Sn concentration extends the absorption wavelength of GeSn PDs to 1750 nm.¹¹⁷ Subsequent advancements have exhibited GeSn PDs with over 40 GHz bandwidth, achieved with a 4.2% Sn content [Fig. 5(c)].¹¹⁸ Despite GeSn’s capability to detect longer wavelengths, its responsivity is constrained, primarily due to the low Sn concentration resulting in a diminished absorption coefficient. Enhancing the Sn ratio holds promise for improving absorption and thereby elevating responsivity. However, this improvement necessitates a careful consideration, as higher Sn ratios pose challenges in material growth. Consequently, a trade-off emerges between achieving high responsivity and managing Sn composition. Excepted advancements in GeSn PD technology hold the promise of higher performance in the future.

In comparison with group IV PDs, III–V PDs exhibit reduced dark current densities, offer wavelength tunability through bandgap engineering, and enable ultrahigh-speed operation. Recent years have witnessed numerous demonstrations of heterogeneously integrated III–V PDs on silicon. Various methods have been employed for the integration, including flip-chip, direct growth, wafer bonding, and transfer printing. Direct growth poses a challenge due to the lattice mismatch between III–V and Si, impacting material quality, especially concerning dark current performance. To address this, several techniques have been employed to grow high-quality III–V epitaxy stacks on Si, such as inserting a thick buffer layer,¹¹⁹ utilizing a GaAs-on-V-grooved-Si substrate,¹²⁰ and employing template-assisted selective epitaxy.¹²¹ For instance, a bandwidth exceeding 40 GHz in a directly grown InP/InGaAs PD on Si is achieved using template-assisted selective epitaxy.¹²² Another approach is wafer/die bonding, where the III–V PD is integrated onto the Si platform without compromising the source III–V thin film quality. Consequently, the device performance in the bonded wafer is comparable to typical III–V devices on a native substrate. A uni-traveling-carrier (UTC) PD is demonstrated with a bandwidth exceeding 67 GHz using adhesive bonding technology.¹²³ Notably, among the reported heterogeneously integrated III–V PDs, the dark current density can be as low as 8.82 × 10⁻⁶ mA/cm² in a bonded GaAs QD PD, representing a reduction of almost >6 orders compared to Ge PDs.¹²⁴ In contrast to the wafer/die bonding technology, the transfer printing method enables device-level integration, resulting in a higher utilization efficiency of a specific III–V source wafer. Utilizing a direct bonding micro-transfer printing process, pre-fabricated 21 × 57 µm² InGaAs PD coupons are seamlessly integrated onto the silicon platform [Fig. 5(d)].¹²⁵ This integration yields a responsivity of 0.6 A/W and a back-to-back data communication rate of 100 Gb/s. Potentially, up to 1 × 10⁶ devices per 75 mm InP wafer can be achieved with this approach.

Single or few-layer 2D materials exhibit small or negligible bandgaps alongside ultrahigh mobility, allowing them a potential material platform for high-performance PDs. These 2D materials include a variety of types, such as graphene [Fig. 5(e)], MoS₂, MoTe₂, PtSe₂, and black phosphorus. The pioneering work shows the first high-speed PD based on graphene, achieving a 40-GHz bandwidth under a gate bias voltage of 80 V.¹²⁶ Capitalizing on the ultrahigh light confinement in a plasmonic-enhanced graphene PD, a >110-GHz bandwidth is achieved with a 6-μm-long device.¹²⁷ Despite the successful demonstration of very high-speed 2D material PDs on silicon photonics platforms, their responsivity typically remains below 0.6 A/W at 1550 nm.¹²⁸ This lower responsivity can be attributed to the limited interaction of light with the 2D material.

Ultra-low-loss waveguide is a critical component in silicon photonics. It improves energy efficiency, advances the power handling capability, and supports scaling the photonic integrated circuits. An increasing number of applications, such as data communications, bio-sensing, positioning and navigation, low-noise microwave synthesizers, quantum communication, and atomic clocks, require lower waveguide losses and advances in materials.

The conventional silicon waveguide suffers from high propagation loss, normally on the order of a few dB/cm. Several low-loss silicon waveguide platforms have been developed. An average propagation loss of 0.27 dB/cm in the C band has been demonstrated by employing 250-nm-thick and 2-μm-wide rib waveguides on SOI.¹²⁹ A propagation loss of 0.085 dB/cm was achieved on a multi-mode rib silicon waveguide with a width of 3 µm.¹³⁰ Very recently, with a core region broaden technique together with a Euler bend, a loss of less than 0.1 dB/cm has been achieved on a 220-nm-thick SOI platform [Fig. 6(a)].¹³¹ 

Other than silicon itself, silica (SiO₂) and Si₃N₄ are two commonly used ultra-low-loss waveguide materials that can be easily integrated with silicon photonics. SiO₂ can offer extremely low propagation losses, similar to optical fibers. However, due to low refractive index, it normally requires air cladding, which severely limits the level of integration. Hydex glass is proposed as an alternative for on-chip integration. The low-loss spiral waveguide is fabricated on a Hydex glass platform.^132,133 The films are deposited using plasma-enhanced chemical vapor deposition (PECVD), which results in low-loss waveguides at a wavelength of 1550 nm.¹³⁴ This process does not require high-temperature annealing, making it highly suitable for CMOS-compatible fabrication. Device patterning and fabrication are carried out using photolithography and reactive ion etching, ensuring low sidewall roughness on the core layer. Finally, the structure is over-coated with a silica glass upper cladding layer. The typical waveguide cross section is 1.45 × 1.5 µm². The linear index at 1550 nm is 1.7, and the propagation losses are as low as 0.06 dB/cm [Fig. 6(b)].^134,135

Si₃N₄ is another material that is naturally compatible with silicon photonics. It offers ultra-low-loss as well as the ability to be cladded with standard fused silica. The Si₃N₄ films can be deposited using low-pressure chemical vapor deposition (LPCVD), plasma-enhanced chemical vapor deposition (PECVD), or reactive sputtering. Then, the ultra-low-loss waveguides are formed either by subtractive processing or by additive processing. The propagation losses are as low as 0.004 dB/cm for high confinement structures¹³⁶ and down to 0.06 dB/m for low confinement structures [Fig. 6(c)].¹³⁷ 

Low-loss Si₃N₄ waveguides deposited using LPCVD require high-temperature annealing, which is incompatible with low-temperature materials or processes, such as those used for silicon electronics and photonics, III–V compound semiconductors, lithium niobate, organics, and glasses.

Research efforts have been made to reduce the processing temperature of nitride waveguides. For instance, hydrogen-free low-temperature sputtering has been employed, combined with a 300 °C-deposited upper cladding, achieving 0.32 dB/cm losses and an intrinsic Q factor of 1.1 × 10⁶ in 750 nm core waveguides.¹³⁸ At 270 °C, deuterated nitride yielded a 0.06 dB/cm loss and a Q factor of 5.3 × 10⁶ in 850-nm-thick waveguides for 480 µm radius resonators and a 0.12 dB/cm loss with a Q factor of 2.9 × 10⁶ for 150 µm radius resonators. After annealing at 400 °C, these waveguides achieved a 0.054 dB/cm loss and a Q factor of 6.2 × 10⁶.¹³⁹ More recently, record-low anneal-free losses have been demonstrated using the same deuterated silane-based fabrication process for both the nitride core and oxide cladding, enabling a 0.0177 dB/cm loss with a Q factor of 14.9 × 10⁶ for 80 nm nitride core waveguides and a 0.0866 dB/cm loss with a Q factor of 4.03 × 10⁶ for 800 nm-thick nitride waveguides.¹⁴⁰ 

Apart from the silicon family materials, there are a few materials that can be integrated with silicon photonics as well as providing relatively low propagation loss.

AlN has a large bandgap of 6.2 eV and a wide transparency window covering from ultraviolet (UV) to mid-infrared (MIR). Reactive sputtering has been developed to deposit AlN thin film compatible with the silicon photonics platform. The propagation losses of AlN waveguides are 0.42 dB/cm around 1550 nm [Fig. 6(d)].¹⁴¹ 

Aluminum oxide (Al₂O₃), also known as alumina, is attracting increasing interest due to its great potential in low-loss integration, especially for UV and near-visible wavelengths. It has a large bandgap of 5.67 eV, excellent thermal and optical stability, as well as the ability to doping rare earth materials as an amplifier. ALD has been developed to deposit high-quality and low-loss thin films, which makes this process compatible with silicon photonics. The lowest propagation loss is 0.04 dB/cm at 1550 nm for a 500-nm-thick thin film.¹⁴² However, when the waveguide is patterned and etched, the propagation loss increases significantly due to the roughness of the sidewall.

Tantalum pentoxide (Ta₂O₅) as an emerging material for photonics has attracted great attention. Ta₂O₅ deposited by ion-beam sputtering has been used in low-loss, high-reflectivity mirror coatings for various fundamental experiments, and recently, it has also been used for optical waveguide fabrication.¹⁴³ The propagation losses are as low as 0.08 dB/cm.

Chalcogenide glass has a wide transparency window from visible to MIR and exhibits highly effective photo-elastic effects and large Brillouin gain coefficients. The transparency window can be up to 25 µm.¹⁴⁴ Chalcogenide thin films are typically prepared using thermal evaporation, which can directly adhere to silicon substrates. Chalcogenide glasses (ChGs) have emerged as an ideal candidate for enabling Brillouin scattering. Composed of one or more chalcogens (S, Se, and Te) along with other network formers such as As, Ge, Sb, Ga, Si, or P, these glasses can be engineered to exhibit a broad range of optical properties. Arsenic-based ChGs, such as As₂Se₃ and As₂S₃, are particularly notable for their high photosensitivity, wide infrared (IR) transparency window, and, importantly, their significant optical Kerr and Brillouin nonlinearity.

To date, a Brillouin gain coefficient of ∼500 m⁻¹ W⁻¹ has been reported in an As₂S₃ waveguide with a loss of 0.2 dB/cm. An even greater net gain is anticipated in an As₂S₃ waveguide, given its lowest reported propagation loss of 0.05 dB/cm.¹⁴⁵ As₂Se₃, with its higher refractive index,¹⁴⁶ also shows promise, although its waveguide propagation loss is 1 dB/cm.¹⁴⁷ 

Arsenic-free ChGs, such as those in the GeSbS system, offer higher film stability.¹⁴⁸ Notably, Ge₂₅Sb₁₀S₆₅ glasses, with a lower refractive index and a glass transition temperature (Tg) of ∼300 °C, have achieved a waveguide propagation loss of around 0.2 dB/cm [Fig. 6(e)].¹⁴⁸ In addition, Ge_11.5As₂₄Se_64.5 glasses, even without a protective layer and upper cladding, have been etched into ultrathin waveguides with a propagation loss of 0.8 dB/cm, suitable for the excitation of surface acoustic waves.¹⁴⁹ 

Harnessing stimulated Brillouin scattering has yielded remarkable progress in microwave photonics due to its frequency tunability and unique narrowband resolution that can be achieved in a small footprint.¹⁵⁰ A compact 5 × 5 mm² chip-scale microwave photonics filter with active E-O components has been developed, achieving a spectral resolution of 37 MHz.¹⁵¹ This device is made possible by heterogeneously integrating chalcogenide waveguides, which provide Brillouin gain, into a CMOS-manufactured silicon photonic chip containing integrated modulators and photodetectors. These narrow Brillouin resonances can be utilized to realize many microwave photonics applications, such as RF oscillators,^152,153 filters,^154,155 phase shifters,¹⁵⁶ true-time delay,¹⁵⁷ frequency converters,¹⁵⁸ optical isolation,¹⁵⁹ and high-resolution sensing.¹⁶⁰ 

Because of its strong electro-optic effect, lithium niobate plays an important role in the area of the modulator. Smart-cut technology has recently enabled thin film lithium-niobate-on-insulator (LNOI). Since then, LNOI has emerged as a promising platform for integrated photonics. Numerous studies have been done to reduce the propagation loss and exploit the unique properties of LN. Heterogeneous integration or hybrid integration methods are needed for them to be integrated with the silicon photonics platform.

Hetero-epitaxy is crucial for active devices such as lasers, amplifiers, and detectors, as defects and dislocations can significantly impact the device’s performance and longevity. Reducing such defects involves addressing the crystal lattice mismatch between different materials, which can lead to structural defects during growth. In addition, the considerable differences in the coefficient of thermal expansion between different materials are another issue.

The growth of III–V materials on silicon is highly attractive, enabling the integration of lasers and amplifiers on silicon platforms. A scheme involves directly growing III–V QD lasers on silicon trenches, achieving light coupling from the laser to Si waveguides via butt coupling.²⁴ 

Ge emerges as a highly attractive material for photodetectors on silicon PICs. The direct growth of a Ge PD on silicon using molecular beam epitaxy was pioneered in 1984. At present, Ge epitaxy plays a pivotal role in the process flow of Ge PDs, as the quality of the Ge directly impacts the dark current performance. The Ge thin film is selectively grown on the P-type Si implanted area using a two-step low-/high-temperature method followed by annealing, a process readily available in current silicon photonic foundry processes.

Deposition stands as a pivotal integration process, involving the layering of thin films of materials onto the target wafer. It can be broadly categorized into physical vapor deposition and chemical vapor deposition. Physical vapor deposition operates within a vacuum environment, where the co-deposited material transitions from a solid state at the source to a gaseous state directed toward the target. Upon reaching the target surface, it condenses to form a solid-state thin film. Meanwhile, chemical vapor deposition entails exposing target wafers to volatile precursor gases, which react and/or decompose on the target, yielding a high-quality thin film of the desired material.

Chemical solution deposition presents numerous benefits, such as cost-effectiveness in equipment, simplicity in fabrication, and precise control over composition. This technique entails converting metalorganic precursors into glass and ceramic materials via low-temperature polymerization reactions. Remarkably, chemical solution deposition allows for the application of coatings on large surfaces without the need for excessively high temperatures. Consequently, it stands as a powerful method for generating a diverse range of transparent materials with good optical and photonic characteristics.

When opting for a deposition method, key factors such as deposition temperature and the conformality of the deposited layer must be carefully considered. Si₃N₄ emerges as a compelling material for integration with silicon, offering the potential for optical waveguides with minimal optical losses. Various chemical vapor deposition techniques can be employed for Si₃N₄ deposition, with propagation losses demonstrated to be as low as 0.06 dB/m for Si₃N₄ waveguides.¹³⁷ Furthermore, AlN and doped HfO₂ can be applied onto silicon substrates using techniques such as ALD or sputtering, thereby facilitating the fabrication of high-speed electro-optical modulators⁴⁶ or piezoelectric-driven tunable devices.⁹⁴ In addition, the chemical solution deposition method can be employed to prepare polymer materials⁵⁰ with high electro-optic coefficient and PZT materials,⁸³ further enabling low-power piezoelectric tuning and high-speed electro-optic modulation.

Die and wafer bonding constitutes a critical process for establishing a permanently bonded stack by uniting a die or wafer with another wafer. This bonding technique can be categorized into direct bonding and adhesive bonding methods. In direct bonding, both surfaces of the target wafers are polished to achieve ultra-flat smoothness before being pressed together under specific pressure and temperature conditions. The bonding in this method relies on van der Waals forces. Conversely, adhesive bonding involves the use of an adhesive agent, such as divinylsiloxane bisbenzocyclobutene (DVS-BCB), during the bonding process.

Both direct bonding and adhesive bonding methods have facilitated the integration of multiple optical components onto integrated platforms. For instance, a novel photonic integration approach involves integrating III–V multiple quantum well materials into a silicon substrate through regrowth on a bonding template.¹⁶¹ In addition, leveraging BCB bonding technology, a photonic platform integrating TFLN and silicon has been developed. This platform shows electro-optic modulators with a bandwidth exceeding 70 GHz.⁶⁵ 

PWB technology utilizes transparent polymer waveguides to bridge the gap between nanophotonic circuits on separate chips.¹⁶² The fabrication of multi-chip systems involves several key steps. Initially, fibers and photonic chips are positioned on a shared submount using standard pick-and-place equipment, which operates with moderate precision. The interconnect regions are then encapsulated in a photosensitive resist, where the exact positions of waveguide facets and coupling structures are identified. The shape of the PWB waveguide is adjusted based on the recorded facet positions, effectively eliminating the need for high-precision alignment of optical devices. The wire bonds are created in situ using two-photon polymerization (TPP) of a negative-tone resist at the focal point of a pulsed laser beam with a large numerical aperture. This two-photon lithography process allows for feature sizes smaller than the diffraction limit of the exposure wavelength. Following direct-write TPP lithography, the unexposed resist material is removed, and the resulting structures are embedded in a low-index cladding material. Photonic wire bonding enables both out-of-plane and in-plane coupling, offering a versatile method for connecting photonic chips with different waveguide technologies in an automated industrial production process.^16,163

Transfer printing is an exceptionally adaptable micro-assembly method, facilitating the deterministic, swift, and accurate assembly of microscale components from their native substrates onto different substrates, assisted by an elastomer stamp.¹⁶⁴ This process comprises pickup and printing steps and utilizes a viscoelastic material, commonly polydimethylsiloxane (PDMS), as the stamping medium. In comparison with bonding technology, this method enables device-level integration, leading to higher efficiency in utilizing specific III–V source wafers. Moreover, when compared to hetero-epitaxy methods, transfer-printed PDMS offers a lower dark current with reduced process complexity.

Transfer printing has proven successful in integrating various active optical components onto passive optical device layers. For instance, a heterogeneously integrated semiconductor optical amplifier has been demonstrated on a Si₃N₄ waveguide circuit, achieving up to 14 dB gain and a saturation power of 8 mW, thanks to the micro-transfer printing method.¹⁶⁵ In addition, utilizing a direct bonding micro-transfer printing process, pre-fabricated 21 × 57 µm² InGaAs photodetector coupons seamlessly integrate onto a SOI platform.¹²⁵ 

In contrast to electronics where transistors serve as fundamental components in many circuits, photonics requires a diverse array of building blocks, including passive devices, modulators, photodetectors, and light sources. Unlike electronics, which typically rely on a single material system, photonics demands a multitude of materials to meet various requirements simultaneously. To address this challenge, several integration methods have emerged, such as direct growth, deposition, bonding, and transfer printing, aimed at seamlessly incorporating new materials onto the silicon photonics platform. While the integration of new materials inevitably adds complexity to fabrication processes, it also means new opportunities. These novel materials offer the potential for expanded operating wavelengths, enhanced functionalities, novel applications, intriguing phenomena, and even revolutionary principles.

Silicon’s inefficiency as a light source, owing to its indirect bandgap, has spurred extensive research and development in both academia and industry. Various integration methodologies, such as hybrid, heterogeneous, and monolithic integrations, have emerged to address this limitation as discussed before. This trend holds great promise for the advancement of integrated on-chip lasers in silicon photonics, both at the device and at the system levels, across applications such as optical communications, LiDAR, bio-chemical sensing, and quantum computing. However, a significant variability in design and processes among major manufacturers suggests that silicon PIC technology is still in its nascent stage. The pursuit of the ultimate solution, balancing cost, performance, and reliability, remains ongoing. Multi-material integration beyond silicon and leveraging artificial intelligence (AI) in photonic component design offer promising avenues for future development. AI can streamline processes, predict optimal conditions, and enhance the device performance of silicon lasers while transitioning laser optimization to application-specific integration, presenting significant opportunities.

Silicon-based electro-optic modulators have made significant progress in recent years. Both all-silicon³⁶ and silicon–TFLN heterogeneously integrated electro-optic modulators⁶⁵ have achieved modulation bandwidths exceeding 110 GHz. However, some areas still require improvement. First, while maintaining high modulation bandwidth, devices also need to be small in size to facilitate future high-density integration. Currently, the size of the 110-GHz all-silicon modulator is small, but it suffers from high driving voltage and limited potential for further bandwidth enhancement.³⁷ Silicon–TFLN modulators offer a higher bandwidth, but they are constrained by weak light confinement in TFLN waveguides, low modulation efficiencies, and large device sizes, making them less suitable for high-density integration. Achieving ultrahigh bandwidth (>200 GHz), ultra-compact (length <1 mm), and low driving voltage (<1 V) is a challenge. Second, while there is extensive research on C-band modulators, extending to other bands such as visible light and ultraviolet has seen some initial reports^166,167 but requires further investigation. Electro-optic modulators that operate in extended wavelength bands have potential applications in sensors, biological, compact disk technology,¹⁶⁸ spectroscopy, chemical applications,¹⁶⁹ and phototherapy.¹⁷⁰ Further exploration is required to advance the integration of electro-optic modulators with electrical drivers, ensuring seamless optoelectronic monolithic integration.¹⁷¹ 

On-chip piezoelectric tuning devices have enriched the library of silicon-based devices and significantly reduced on-chip tuning power consumption, a feature especially pivotal for large-scale PICs.¹⁷² However, certain challenges persist. First, addressing the compatibility issue between piezoelectric thin-film materials and silicon photonics is imperative. At present, heterogeneous integration approaches are utilized to avoid direct etching of piezoelectric thin-film materials.^98,99 The typical propagation loss of heterogeneously integrated waveguides ranges from 0.39 to 3.7 dB/cm.^94,98 Developing CMOS-compatible processes further is essential for the cost-effective fabrication of low-loss waveguides on piezoelectric thin-film platforms, thereby reducing bending radii and footprints while enhancing the device performance. Second, there is a need to enhance the piezoelectric tuning efficiency. Despite significantly reducing tuning power to the nanowatt level, the tuning efficiency and range have not yet matched those based on thermo-optic effects on the silicon platform.^173,174 Designing thin films with high piezoelectric coefficients and employing slow-light waveguides may improve tuning efficiencies. In addition, the flexible design of on-chip electrodes in terms of position, structure, and material can enhance the tuning efficiency. Finally, due to the wide transparent windows of piezoelectric thin-film materials,³⁹ extending beyond the C-band can encompass visible light and >2 µm bands, thus broadening the utility of piezoelectric tuning devices.

Looking toward future advancements, several critical challenges remain in the development of on-chip PDs. First, achieving both high speed and high responsivity in PDs simultaneously poses a challenging task. This difficulty stems partly from the inherent trade-off between the necessity for a small RC time constant and a large absorption area. Breakthroughs like APDs with inherent internal amplification,¹¹⁴ plasmonic nanostructures¹²⁷ providing exceptional light confinement, and photon-trapping designs¹⁷⁵ offer exciting prospects for achieving the desired balance of high speed and responsivity. Second, the reduction of dark current in high-speed PDs remains a challenge. Particularly in PDs featuring epitaxial layers such as Ge PDs and GeSn PDs and directly grown III–V PDs, the quality of thin films significantly influences dark current levels. Potential solutions include PDs based on 2D materials,¹²⁶ as well as techniques such as bonding and transfer printing for III–V PDs.¹²⁵ Furthermore, while C-band and O-band on-chip PDs cater to optical communication and interconnect applications, the demand for high-performance PDs in other spectral bands persists across various application scenarios. Recent advancements have seen the emergence of waveguide PDs based on materials such as 2D¹⁷⁶ and perovskite¹⁷⁷ materials, promising expanded capabilities for diverse photonic applications.

Figure 7 shows a new artistic impression that envisions a future integrated optoelectronic chip. This chip incorporates silicon photonics and silicon nanoelectronics, using silicon as the core platform for hybrid, heterogeneous, and monolithic integration schemes. The lasers, Pockels modulators, ultra-low-power piezoelectric tuning devices, and photodetectors produced by these integration methods are connected via ultra-low-loss optical waveguides and monolithically integrated with silicon microelectronic chips, forming specialized on-chip microsystems. Silicon photonics enters the era of innovative solutions of monolithic integration to fully address the capability of both III–V light source/gain material and silicon photonics CMOS compatibility, inspiring further development in incorporating PICs and ICs on the same substrate for future large-scale integration-oriented applications with substantial gains and mass production.

We provide an overview of various integration techniques involving a diverse range of materials on silicon. This encompasses on-chip light sources employing gain materials, linear electro-optic modulators utilizing electro-optic materials, low-power piezoelectric tuning devices incorporating piezoelectric materials, on-chip photodetectors employing strongly absorbing materials, and ultra-low-loss optical waveguides. Subsequently, we discuss various methodologies for integrating these materials with silicon. Furthermore, we delve into the technical challenges and evolving trends encountered in silicon hybrid/heterogeneously integrated devices, proposing potential research avenues. With the maturation of integration processes for diverse thin-film materials, we anticipate significant breakthroughs in silicon hybrid/heterogeneously integrated devices, eventually realizing the vision of optoelectronic monolithic integration featuring on-chip lasers.

This work was supported in part by the National Key R&D Program of China under Grant No. 2020YFB2206101 and the National Natural Science Foundation of China (NSFC) under Grant No. 62335014/62035016/62341508.

The authors have no conflicts to disclose.

Yong Zhang: Conceptualization (equal); Funding acquisition (equal); Writing – original draft (lead); Writing – review & editing (equal). Xuhan Guo: Writing – original draft (equal). Xingchen Ji: Writing – original draft (equal). Jian Shen: Writing – original draft (equal). An He: Writing – original draft (equal); Writing – review & editing (equal). Yikai Su: Funding acquisition (lead); Writing – review & editing (equal).

The data that support the findings of this study are available from the corresponding author upon reasonable request.