The number of photonic components integrated into the same circuit is approaching one million, but so far, this has been without the large-scale integration of active components: lasers, amplifiers, and high-speed modulators. Emerging applications in communication, sensing, and computing sectors will benefit from the functionality gained with high-density active–passive integration. Indium phosphide offers the richest possible combinations of active components, but in the past decade, their pace of integration scaling has not kept up with passive components realized in silicon. In this work, we offer a perspective for functional scaling of photonic integrated circuits with actives and passives on InP platforms, in the axes of component miniaturization, areal optimization, and wafer size scaling.

Significant progress has been witnessed in the number of photonic components that can be packed into the same photonic integrated circuit (PIC), analogous in many ways to the trajectory observed in Moore’s law1,2 for microelectronics. Borrowing the concept from electronic integrated circuits (EICs),3 the circuit scale can be categorized as follows: small-scale integration (SSI) with 1–10 components; medium-scale integration (MSI) with 10–500 components; large-scale integration (LSI) with 500–20 000 components; very-large-scale integration (VLSI) with 2 × 104–106 components, and ultra-large-scale integration (ULSI) with a component count beyond 106. VLSI PICs with more than 105 components are with us today.4,5 However, such circuits have a restricted set of components. Without the rich mix of active components, including lasers, semiconductor optical amplifiers (SOAs), and photodetectors (PD), the ultimate chip scalability, functionality, and flexibility of integrated photonics will not reach their full potential. The realization of active–passive LSI and VLSI requires a concerted effort on platforms where diverse types of components can be integrated at a high density.

Contemporary PIC platforms mainly include gallium arsenide (GaAs), indium phosphide (InP), silicon, silicon nitride (SiN), lithium niobate (LN), barium titanate (BTO), 2D materials, and polymers. GaAs has historically been used for discrete laser fabrication; mainly vertical-cavity surface-emitting lasers (VCSELs) and, more recently, GaAs-based PICs operating around the 1030 nm wavelength are demonstrated.6 InP is a reliable material offering a comprehensive component portfolio for light generation, modulation, detection, and waveguiding at longer wavelengths and, particularly, in the O and C bands.7 These wavelength bands have been particularly important for the deployment of long-distance fiber optical communications and coherent integrated optical transmitters and receivers.8–10 Thin silicon on insulator (SOI) is a particularly prominent platform in Si photonics,11 and its high index contrast in the cross section facilitates miniaturized passive components to be realized with the manufacturing tools in place for silicon electronics. However, the incorporation of native amplifiers and high-performance phase modulators has been challenging.12,13 SiN features a low absorption loss and a large transparency range, making it an excellent waveguiding material attractive for interferometers and delay lines in quantum information processing (QIP) and medical applications.14 However, efficient electrically driven modulators, electrically driven amplifiers, lasers, and detectors are absent in this material. LN has historically provided the gold standard for modulators,13 and to meet ever more stringent efficiency and bandwidth requirements, thin-film lithium niobate substrates are becoming available.15 It is also considered to be a near-pure passive material with limited amplitude modulation for the phase modulators. Materials such as 2D materials,16 BTO,17 and polymers18 are attracting considerable research interest, although manufacturability remains an area of study. Integrated circuits using these materials alone are uncommon. Instead, they are more usually deposited and integrated into a more comprehensive PIC platform.

SOI and InP are the most commercially established PIC platforms at the time of writing. While active components are native to the InP platform, for SOI photonics, electrically driven light sources and amplifiers have required hybrid or heterogeneous integration with III–V materials,19,20 mostly InP due to the established market for telecommunications technologies. In one flavor, the InP active components are first fabricated, diced, and then integrated into SOI circuits as chiplets.21 A wafer-scale process can also be used after the InP material transfer, which potentially allows for more parallel fabrication and higher scalability. Such processes are currently realized by die bonding22,23 or transfer-printing.24 Epitaxial growth of III–V materials on Si is researched as a wafer-scale solution in the long run, although the high process temperatures may prevent the most sophisticated levels of component integration. To date, the most successful approaches with electrically pumped demonstrations have used GaAs-based materials,25–27 which are unsuited to C-band light sources and the broadest range of active components. InP-based lasers directly grown on Si are still optically pumped.28–30 

The InP platform has demonstrated the versatility and flexibility required for PICs with the most diverse component types. With methods including regrowth,31,32 selective-area growth (SAG),33 intermixing,34 and vertical active-passive integration,35 materials of different bandgaps, each individually and functionally optimized, can be integrated on the same substrate. The optical coupling between components can be seamless in the case of butt-joint interfaces. There are no mechanical conflicts that limit design density as might be seen in die-bonding or transfer-printing, providing the largest freedom in circuit floorplanning for LSI and VLSI. Mainstream monolithic integrated InP circuits do, however, have a waveguide cross-sectional area that is an order of magnitude larger than that of high-density SOI, resulting from the less strongly confined waveguides when using the native substrate.

In Sec. II, the PIC scaling trends are first investigated, emphasizing the contributing factors to die size and packing density, the same as in microelectronics as pointed out by Moore.36 Then, we analyze opportunities for LSI and VLSI PICs with a rich mix of active and passive components leveraging the InP technology, particularly in two main axes described as the technological drivers of scale in Moore’s law: component miniaturization (Sec. III) and areal optimization (elimination of unused chip areas) (Sec. IV). Finally, in Sec. V, we briefly discuss the opportunities for InP wafer-size scaling.

In Moore’s observation,1,37 the scale of the chip is quantified by the component count, which primarily includes transistors but not electrical (copper) interconnects. This is logical as it acknowledges that only the functional components contribute to the expansion of the integrated chip’s capabilities. In photonic circuits, comparison studies8,10 have also counted only functional components, determined by the basic optical function they perform. The diversity can be extensive with components for light generation, amplification, attenuation, phase shifting/modulation, detection, (de)multiplexing, filtering, polarization rotation, out-of-plane coupling, etc. Here, similar to microelectronics, waveguide optics for interconnection, including straight waveguides, adiabatic tapers, bends, crossings, star couplers, and splitters, are not counted. This may be revisited with the emergence of analog optical signal processing, including neuromorphic and quantum circuits, but we retain this approach for comparative purposes.

The evolution of PIC’s component count is shown in Fig. 1 for InP, SOI, and InP/SOI heterogeneous integration platforms. As can be seen, InP has been the material of choice for more than 40 years.8,10,38 In its early phase, (InP) PIC scaling was driven by the development of individual components, with a focus on integrating active elements with passive elements using integration schemes, such as butt-joint regrowth.8 The chip scale is in the SSI regime. From the year 2000, large-scale deployments of fiber optics and high-capacity optical communication fueled the fast development of wavelength-division multiplexing (WDM), leading to rapid scaling with arrayed waveguide grating (AWG)-based multiplexing/demultiplexing9,35 and, later, systems-on-chip (SoC) for coherent communication.31,38 These InP PICs boast a rich mix of component types,39–41 including lasers, phase shifters, modulators, (de)multiplexers, and photodetectors (PD). Already a decade ago, a monolithic InP PIC 40 × 57 Gb s−1 WDM transmitter40 was reported by Infinera, where 40 on-chip lasers are monolithically integrated with 40 in-phase–quadrature (IQ) phase modulators (PMs), 40 variable optical attenuators, and AWGs. This single chip was capable of delivering 2.25 Tb s−1 bandwidth. A need for advanced reconfigurability in the optical network drove research efforts into optical switches,42,43 which also integrated switch technology with AWG-based transceivers. These chips belong to the MSI regime and approach the LSI regime.

FIG. 1.

Total functional component count per die for monolithic InP, SOI, and heterogeneous platforms, plotted as a function of the year the PIC is reported. Some representative examples4,5,40,42–57 are marked with the demonstrating institutes or companies.

FIG. 1.

Total functional component count per die for monolithic InP, SOI, and heterogeneous platforms, plotted as a function of the year the PIC is reported. Some representative examples4,5,40,42–57 are marked with the demonstrating institutes or companies.

Close modal

Emerging applications in optical communication, computation, and sensing drive the PIC scale toward LSI and VLSI. Data centers have relied on power-hungry electrical packet switches for exchanging massive data flows between millions of servers.58 Research is now addressing switching and routing technologies with over 102.4 Tb s−1 capacity, requiring intimate photonic–electronic integration to meet the system’s performance and power budget.59 Large-scale and fast optical-domain switching4,58,60–62 holds the promise to drastically reduce energy consumption and to provide full fiber bandwidth data capacity at the same time. The largest integrated optical switch demonstrated to date, a 240 × 240 optical switch with 57 600 switching units,4 each containing two vertical adiabatic couplers, is realized in the SOI microelectromechanical systems (MEMS) technology. Full channel testing has yet to be demonstrated.

The rise of machine learning (ML) and artificial intelligence (AI) is driving the demand for massively parallel matrix computations and brain-inspired neuromorphic hardware.63 Integrated photonic methods based on nested interferometers, resonator arrays, or SOAs, resembling optical switch fabrics, are being proposed to enable energy-efficient computing with femtojoule-per-operation-level power consumption.64–68 Start-up companies, including Lightmatter,69 Lightelligence,70 and LightOn,71 are commercializing the photonic computing technology. An LSI 64 × 64 photonic matrix processor with 4096 compute elements69 was reported by Lightmatter in 2020, while further scaling is being investigated.72 Similar or same matrix operations in ML and AI applications are also proposed as an essential part of photonic QIP,72–74 with additional emphasis on optical loss optimization.75 

Light detection and ranging (LiDAR) allows for remote sensing at an unprecedented spatial resolution and is believed to be one of the key technologies for advanced driver assistance systems (ADAS) and self-driving cars. Integrated optical phase arrays (OPAs)49,57,76–78 provide a promising route to full-solid LiDAR and potential production scalability with the planar integration technology. Recently, an integrated OPA with 49 152 integrated phase shifters has been demonstrated by Analog Photonics5 with the SOI platform, but with external light sources and without integrated optical amplifiers. In the long-term, on-chip light sources and distributed amplification may enable higher operating powers, reduced power penalty, streamlined manufacturing, and scalability.79 The University of Tokyo has demonstrated the largest 100-channel InP-based OPA.53 

The LSI and VLSI PICs demonstrated at present are commonly based on replications of the same passive component in the circuit, limiting functionality and onward scalability. VLSI optical switches are based on the replication of individual switching units without on-chip gain and become loss-constrained.4,61,80 SOI switches based on electro-optic (EO) modulators (EOMs) or thermo-optic modulators (TOMs) nested in interferometers have not scaled beyond 32 × 32, and the maximum path loss is in the order of 10 dB.61,81–83 Waveguide MEMS switches offer low loss in the off (decoupled) state to provide further scaling. The much larger 240 × 240 MEMS optical switch4 is reported to have a maximum path loss of 9.8 dB. However, the switching speed is mechanically limited. SOA integration provides the optical gain for onward scaling84 while still allowing for a full solid-state realization. With an active–passive InP platform, a lossless operation is showcased in a 16 × 16 optical switch42 by the University of Cambridge (Fig. 1).

PIC-based machine learning accelerators face the same issue of loss-constrained scalability, as their circuit elements, connection types, and the number of connections are akin to those of integrated optical switches.64 On-chip gain can facilitate further scaling. Implementations of neural network models by photonic chips, often referred to as neuromorphic or brain-inspired photonic computing, additionally call for the large-scale integration of nonlinear activation functions.67 This is not easy with the material optical nonlinearities as they are often weak and require a high optical input power.85 On an SOI platform, all-optical activation is realized with ring-enhanced nonlinearities, but the power sensitivity of the reported device is +5 dBm.86 Lasers and SOAs are considered competitive candidates for the required nonlinear activation87,88 to realize an all-optical neural network. In 2022, nonlinear activation with an on-chip input power as low as 0.06 mW (−12 dBm) is achieved using a membrane laser.88 Unlike optical switches, which are supposed to send light out of the photonic chip, machine learning processors should ideally have all optical functions confined in their own package, motivating on-chip light source integration.67 

Long-range OPAs for the automotive sector require a detection distance of 200 m,78,89 indicating at least hundreds of milliwatt optical output from the emission aperture when considering coherent detection. For time-of-flight schemes, a peak power in the order of watts is required.90 Amplifiers can be integrated to increase OPAs’ output power and relax the power and heat management requirements of the light source. In a recent demonstration, 21.5 dB maximum gain is achieved using an InP-based OPA, delivering a maximum total output power of 35.5 mW.91,92 In another demonstration, up to 240 mW output power is achieved with an integrated master tunable laser feeding an on-chip SOA array.93 

Die size determines the available design area for the PIC. Figure 2 shows the die size evolution over the past three decades, categorized under the concerned PIC platforms. In the past, most of the PICs demonstrated had sizes smaller than one square centimeter. This is conveniently smaller than the scanner and stepper reticle size limit that is now mainstream for PIC production. As process yields have improved, it has become interesting to study larger area circuits. Recently, researchers from UC Berkeley and Analog Photonics individually showed the possibility of using widened waveguides for inter-reticle interconnection.4,5 As seen in Fig. 2, this innovation has led to the realization of >103 mm2 VLSI circuits containing 105-level components, as mentioned in Sec. II A. An ultra-large InP PIC occupying the entire 2-inch wafer was also demonstrated in 2010 by UC Davis,94 although in this case, contact lithography was used, which has no reticle size limit. Here, the limit in the maximum circuit size comes from the wafer. Current commercial InP wafers have diameters up to 100 mm, and further scaling to 150 mm may technically allow larger PICs with an area of 104 mm2 and beyond. A detailed discussion on InP wafer size expansion can be found in Sec. V.

FIG. 2.

Die area plotted as a function of year. The data points are based on the available information reported and, therefore, do not match one to one with those in Fig. 1. Some representative examples4,5,42,43,45,47,50–53,55–57,94 are marked with the demonstrating institutes or companies.

FIG. 2.

Die area plotted as a function of year. The data points are based on the available information reported and, therefore, do not match one to one with those in Fig. 1. Some representative examples4,5,42,43,45,47,50–53,55–57,94 are marked with the demonstrating institutes or companies.

Close modal

As shown in Fig. 2, there has been no push beyond the areal capability of non-contact lithography until the past decade. For low-complexity, small-scale chips, the sizes can be more determined by packaging and handling requirements rather than the photonic circuits themselves. If it is a research prototype, it may further have suboptimal areal utilization. Therefore, in the early days, there is no general relation between the number of components and the size of the chip. However, as PIC technology matures and approaches industrialization,95 the economic dynamics of chip manufacturing36,37 require minimizing the cost per component, in other words, dense integration of photonic components. Advanced packaging, such as hybrid or heterogeneous assemblies, may also be necessary to reduce the packaging overhead for large-scale circuits. In the near future, densely integrated, large-scale circuits, even occupying an entire wafer,96,97 may be driven by demanding applications, such as neuromorphic and quantum computation, as well as larger-scale switching networks.

Ever-denser integration offers an attractive perspective for functional enhancement and cost reduction for a given chip area. One key difference for PICs relative to (digital) microelectronics is that PICs consist of a richer variety of component types, each with its own footprint and density constraints. Figure 3 plots the packing densities in PICs, for passive components, MEMS components, EOMs, TOMs, and SOAs. The highest density is achieved for passive elements, such as surface grating antennas in an OPA from MIT, which exhibits an impressive component density of over 104 mm−2 and an individual antenna footprint of only 4 × 4 µm2. Passive components scaling is currently bound by optical confinement, and circuit performance is bound by a lack of high-density active components. PICs with active tuning or modulation by TOMs or EOMs show the highest component packing density of around 40 mm−2, as demonstrated in actively tunable OPAs5,98 and photonic processors.56 Although this is slightly lower than what is demonstrated with MEMS components that achieve a density in the order of 102 mm−2, it should be noted that there is no electrical wiring to the tuning element in the high-density MEMS PICs.4,50,99 The highest density achieved for active components is around 10 mm−2 with SOA-based optical switches, as demonstrated by the University of Bristol,43 University of Cambridge,42 and TU Eindhoven.100 Comparing the different component types, it is evident that actives and modulators have not been able to scale at the same pace as passives.

FIG. 3.

Density per die for passive, MEMS, TOM, EOM, and SOA components plotted as a function of the year the PIC is reported. Some representative examples4,5,42,43,45,47,50–53,55–57,100,101 are marked with the demonstrating institutes or companies.

FIG. 3.

Density per die for passive, MEMS, TOM, EOM, and SOA components plotted as a function of the year the PIC is reported. Some representative examples4,5,42,43,45,47,50–53,55–57,100,101 are marked with the demonstrating institutes or companies.

Close modal

Miniaturization of EOMs requires innovations in achieving higher modulation efficiency,13,102–104 expressed widely as the product of the half-wave modulation voltage and phase modulator length (VπL). TOMs typically have a much smaller footprint due to the more effective (but slower) electrical-power tuning mechanism.105,106 Thermal crosstalk and power consumption impose challenges on the density and scale of TOMs.10,107,108 SOAs and many laser designs exhibit a low wall-plug efficiency (WPE), making them thermally constrained.2,32,109 Areal optimization will be required to enhance the packing density of miniaturized components, especially for components that require electrical wiring and active tuning. This aspect includes optimization of the integration technology, heat dissipation, and circuit floorplanning. Unlike in electronics, where multi-layer copper wiring with vertical vias is the standard, so far on-chip optical interconnection mostly relies on in-plane connectivity. Hence, compact waveguide floorplanning with ultra-sharp bends and butt-joint integration is important. Vertical optical vias are also being researched for 3D integration.110 

InP component miniaturization can be achieved through substrate removal for tighter confinement of the guided mode, and this is conceptually similar to the SOI technology. By replacing the cladding with a low-index dielectric, it is possible to confine light within a nanophotonic membrane with a remarkably slim thickness of only hundreds of nanometers.111–117 This approach was pioneered by several groups worldwide in the late 2000s.118–120, Figure 4(a) shows the waveguide cross sections for both a substrate-based InP technology and the membrane InP technology developed at TU Eindhoven. A typical single-mode waveguide dimension on this InP membrane platform is 300 × 400 nm2. Its cross-sectional area is only ∼5% of those on conventional substrate-based platforms.10 The utilization of deep ultraviolet (DUV) scanner lithography and non-intentionally doped (n.i.d.) InP-based waveguide together enable 1 dB cm−1-level propagation loss,121 comparable to the state-of-the-art passive SOI technology. The cross-sectional size reduction directly leads to the passive miniaturization to the same compactness levels achievable with high-confinement SOI technologies. Examples include ultra-sharp 1 μm-radius bends,122 ultra-short 4 μm-long polarization rotators,123,124 and 3 μm-long fully reflective photonic crystal reflectors,125 as seen in Fig. 4(b). When compared to prior work with substrate-based components,10 this represents size reduction factors of 10–100.

FIG. 4.

(a) Waveguide cross sections of the substrate-based and membrane-based InP technologies. (b) Examples of miniaturized passives—bends, reflectors and polarization mode converters—with the InP membrane technology. The arrows indicate the devices of interest. Scale bar: 1 μm.

FIG. 4.

(a) Waveguide cross sections of the substrate-based and membrane-based InP technologies. (b) Examples of miniaturized passives—bends, reflectors and polarization mode converters—with the InP membrane technology. The arrows indicate the devices of interest. Scale bar: 1 μm.

Close modal

1. Active components miniaturization

The InP material system offers miniaturization opportunities beyond simple passives, by utilizing the mature epitaxy techniques for combining functional materials. A TOM based on an epitaxially grown n-InP heating layer directly on top of the waveguiding layer has recently been realized.126, Figure 5(a) shows the schematics of such a TOM, which has an ultra-compact footprint of 13.3 × 7.3 µm2 including the contact pads. The zero-distance placing of the heating element to the highly confined optical mode results in a high energy efficiency of ∼2.2 mW/π and Pπ · τ of 28.6 mW μs. This is >50× more efficient compared to substrate-based InP TOMs. Further improvement to 1 mW/π and 10 µs time constant is possible by reducing the functional volume even more to a single-mode waveguide.126 

FIG. 5.

Miniaturized membrane InP components with active functions. (a) A 13-μm-long phase shifter. Reproduced with permission from Wang et al., J. Lightwave Technol. 41(6), 1790–1800 (2023). Copyright 2023 IEEE. (b) A membrane laser with a surface grating-based cavity. From Takahashi et al., 2022 IEICE Society Conference Proceedings. Copyright 2022 IEICE. Reproduced with permission from IEICE. (c) A miniaturized waveguide-coupled UTC-PD. de Graaf et al., IEEE J. Sel. Top. Quantum Electron. 28(2), 3802010 (2022). Copyright 2015 Author(s), licensed under a Creative Commons Attribution 4.0 License.

FIG. 5.

Miniaturized membrane InP components with active functions. (a) A 13-μm-long phase shifter. Reproduced with permission from Wang et al., J. Lightwave Technol. 41(6), 1790–1800 (2023). Copyright 2023 IEEE. (b) A membrane laser with a surface grating-based cavity. From Takahashi et al., 2022 IEICE Society Conference Proceedings. Copyright 2022 IEICE. Reproduced with permission from IEICE. (c) A miniaturized waveguide-coupled UTC-PD. de Graaf et al., IEEE J. Sel. Top. Quantum Electron. 28(2), 3802010 (2022). Copyright 2015 Author(s), licensed under a Creative Commons Attribution 4.0 License.

Close modal

Miniaturized modulators can be realized with the membrane-based approach. By inserting a thin layer of dielectric in the middle of two electrically biased semiconductor layers, forming a capacitor,127–131 efficient modulators by carrier accumulation are reported. This is not possible on substrate-based platforms since the optical mode is deeply shielded by the claddings. Compared to silicon–insulator–silicon capacitor modulators, InP-based materials offer a much stronger carrier-induced index change,132,133 resulting in a significantly reduced footprint. Such modulators with InP-based materials are first demonstrated in 2017 by two individual research groups, one showing 0.47 V mm VπL with a length of 500 μm128 and the other one exhibiting a VπL of 0.9 V mm with a length of 250 μm.127 Initial results show modest GHz-level modulation bandwidths, but a recent study has predicted a route to higher bandwidths.129 

Amplifiers and lasers miniaturization benefit from optical confinement enhancement with the membrane structure. A conceptual illustration is shown in Fig. 5(b). With appropriate waveguide geometries, the strong index contrast offered by the membrane could mean ∼3% confinement per quantum well (QW), which is a threefold improvement compared to thick-InP-clad waveguide designs. To efficiently inject carriers into this membrane gain section, lateral carrier injection schemes111,117,134–138 have been proposed, where the n- and p-doped claddings are grown by the side of the active core, as seen in Fig. 5(b). Lasers constructed from these high-confinement membrane structures exhibit superior performance concerning compactness and low-power operation. In 2022, a membrane distributed-reflector laser is demonstrated to have an ultra-low threshold of 0.13 mA,139 with continuous-wave operation measuring up to 46× threshold. Moreover, the maximum external quantum efficiency is calculated to be 23% [wall-plug efficiency (WPE) 10%]. The footprint of the gain section is only 0.7 × 30 µm2, an order of magnitude smaller than conventional DFB lasers. More recently, membrane SOAs with similar high-confinement cross sections are also realized and integrated into a PIC.137,140 The gain per unit device length can also be boosted by multipass in the same gain section. Mode-division multiplexing may be used to suppress resonance.141 A proof-of-concept double-pass SOA has recently been reported utilizing the InP membrane technology,141 which shows up to 87% more optical gain compared to a single-pass SOA with the same gain section length and injection current. This allows for a SOA length reduction with a given optical gain.

Double-sided processing—processing both before and after the InP wafer bonding to silicon—provides access to both sides of the high-confinement waveguiding layer for further design cleverness in miniaturization and performance enhancement. Figure 5(c) shows the cross-sectional structure of a waveguide-coupled uni-traveling-carrier (UTC) PD with an ultrasmall footprint of only 2 × 5 µm2 and a decent responsivity of 0.6 A/W.142 Double-sided processing allows the metal contacts to be on both sides of the membrane, minimizing the junction-contact access distance from a few μm to below 100 nm and thereby reducing the device footprint. The decrease in such access distance additionally reduces series resistance and allows for a reduced RC time constant. An ultra-low 4 fF capacitance and <10 Ω series resistance have been achieved, enabling broadband operation of over 110 GHz.

2. Miniaturization of optical I/O

Optical input/output (I/O) options include both end-fire and out-of-plane couplings for membrane-based platforms. With high optical confinement, the opportunity is now to simplify off-chip optics by managing beamforming within the chip, emphasizing component miniaturization at the diffraction limit. Examples of out-of-plane-coupled I/O interfaces are shown in Fig. 6. Figure 6(a) shows SiO2-on-InP grating antennas143 developed for optical beam steering applications, e.g., LiDAR. Leveraging the high dry etching selectivity (>30:1) between SiO2 and InP, robust critical dimension control is attained in the SiO2 gratings on top of the InP waveguide. This enables mm-scale emission apertures and an ultra-narrow beam divergence of 0.05° with a 2-mm long antenna.143 For optical fiber interfacing, grating couplers of around 10 × 12 µm2113,115 footprint are designed to accommodate the mode size of a single-mode fiber. Metal reflectors placed beneath the membrane, fabricated via the double-sided processing technique, are designed to boost the coupling efficiency by reflecting and combining the downward emission in-phase with the upward emission. A 1.2 dB/interface coupling loss is measured with the metal reflector,144 as compared to 3 dB for the reflector-free designs.113,115 The techniques have been used for optical wireless wavefront receivers, where the interfacing elements are further downsized to 3 × 4 µm2,113 as seen in Fig. 6(c).

FIG. 6.

SEM images of membrane-based miniaturized optical I/O elements. (a) Grating antennas for beam steering.143 The arrow indicates the grating section. Scale bar: 200 µm. Inset: Zoom-in image of the grating. Scale bar: 5 µm. (b) A grating coupler for fiber interfacing.144 Scale bar: 10 µm. (c) A receiver element for free-space interfacing applications.113 Scale bar: 1 µm.

FIG. 6.

SEM images of membrane-based miniaturized optical I/O elements. (a) Grating antennas for beam steering.143 The arrow indicates the grating section. Scale bar: 200 µm. Inset: Zoom-in image of the grating. Scale bar: 5 µm. (b) A grating coupler for fiber interfacing.144 Scale bar: 10 µm. (c) A receiver element for free-space interfacing applications.113 Scale bar: 1 µm.

Close modal

Apart from the size reduction in the waveguide cross section, nanophotonic approaches can also be employed for InP-based active components miniaturization. This can include the use of slot waveguides, plasmonics, and photonic crystals. Here, for comparison purposes, a state-of-the-art InP bulk waveguide-based component is first described, followed by possible miniaturization directions leveraging nanophotonics. Figure 7(a) shows a dense 100 GHz-class MZM array145 on a semi-insulating InP substrate. Through the adoption of narrow coplanar stripline electrodes, the width of each MZM is only 17 µm and the array pitch is 27 µm. A VπL of 7.5 V mm is measured with a device length of 1 mm, and optimizations in the active layer stack are expected to enable an efficiency of below 2 V mm.

FIG. 7.

Modulator miniaturization by efficiency enhancement. (a) Microscope image of an MZM array with schematic showing the ridge-waveguide-based cross section and layout optimization. (b) Microscope image of a fabricated slot-waveguide-based MZM with a zoom-in SEM image of the slot cross section. Reproduced with permission from Reniers et al., IEEE J. Quantum Electron. 57, 0600306 (2021). Copyright 2021 IEEE. (c) Fabricated plasmonic MZM and a zoom-in, false-colored SEM image of the 20 µm long plasmonic waveguide modulator.

FIG. 7.

Modulator miniaturization by efficiency enhancement. (a) Microscope image of an MZM array with schematic showing the ridge-waveguide-based cross section and layout optimization. (b) Microscope image of a fabricated slot-waveguide-based MZM with a zoom-in SEM image of the slot cross section. Reproduced with permission from Reniers et al., IEEE J. Quantum Electron. 57, 0600306 (2021). Copyright 2021 IEEE. (c) Fabricated plasmonic MZM and a zoom-in, false-colored SEM image of the 20 µm long plasmonic waveguide modulator.

Close modal

Slot waveguides offer stronger light–matter interactions through enhanced confinement in the slot. Modulators based on slot waveguides filled with EO polymers can achieve sub-1 V mm-level VπL.13,15 Chemical optimization of the polymers’ EO activity strength further allows the realization of a VπL of 0.32 V mm146 and a short interaction length of 280 µm147 in separate experiments. An InP-based polymer slot waveguide modulator is shown in Fig. 7(b).148 As a preliminary study, only an EO polymer focusing on thermal stability but with an order of magnitude lower EO activity is used, resulting in a measured VπL of 4.5 V mm with a device length of 500 µm. From a performance perspective, the benefit of using InP slot waveguide instead of Si slot waveguide lies in InP’s higher electron mobility and lower material loss induced by dopants. This potentially offers a lower access resistance to the EO slot, allowing for a higher RC bandwith149,150 without compromising the component’s insertion loss.

Plasmonic slot waveguides present one step further confinement enhancement, where >90% optical confinement is possible.148 This is a nearly threefold improvement when compared to an InP slot waveguide on the same platform. The plasmonic slot waveguide also significantly improves the electrical field intensity and offers a conductivity far better than semiconductors, with which superior RC time constants can be expected. These features allow plasmonic-organic-hybrid modulators18,151–153 to approach a bandwidth as high as 500 GHz with a length of 20 µm151 and a VπL of 0.04 V mm.154, Figure 7(c) shows such a fabricated plasmonic MZM interfaced with InP membrane photonic circuits. As a first attempt and proof-of-concept, a slot width of 250 nm is used, and the same EO polymer is used as in the device shown in Fig. 7(b). A narrower slot can be achieved using high-resolution fabrication techniques, such as metal etching. The device measured a low VπL of 0.44 V mm with a short 10 μm-long plasmonic-organic section. Further iterations on the design parameters and polymer selection could potentially bring this to be on par with the state-of-the-art.148 However, it is important to note that the performance of plasmonic modulators does not come at no cost—reducing the optical loss of the plasmonic mode remains an open challenge. The insertion loss of components has a significant impact on defining the maximum possible scale of the photonic circuit, and a poor optical performance will lead to additional energy used in the transceiver electronics. In this device, we measure a propagation loss of 0.43 dB μm−1, which is similar to that of the state-of-the-art.18,153 This translates to 4–5 dB loss for a 10 μm-long plasmonic-organic section, which is much higher than conventional EOMs. By employing resonating structures, amplitude modulation can be achieved with a much lower loss, where a 1.2 dB on-chip loss has recently been reported,18 but accurate wavelength alignment is needed to ensure the extinction ratio.

Metallic cavities potentially offer an opportunity for laser miniaturization into the plasmonic regime.155 In addition, the excellent thermal conductivity of metals facilitates heat extraction from miniaturized devices, where hotspots are easier to form when compared to macroscopic devices. The first demonstration of such a nanolaser working in the hybrid photonic-plasmonic regime was realized in 2007, with gold-coated semiconductor nanopillars based on InP.156 The pillar diameter is in the order of 200 nm. The nanolaser exhibited continuous-wave lasing under electrical pumping at 77 K temperature. Low-loss silver cladding enabled a nano-light-emitting diode with its optical output coupled to a waveguide in the same InP membrane.157 For nanolasers, one challenge is the increased surface/body ratio lowering the carrier injection efficiency. Advanced surface passivation methods may enable room temperature continuous wave lasing. In 2017, an ultra-low surface recombination velocity of 260 cm s−1 is demonstrated by the combination of (NH4)2S treatment and SiO2 encapsulation. As a result, an 80-fold enhancement is observed in the photoluminescence strength of the gain medium as compared to the non-passivated case.

Photonic crystal structures can provide ultrahigh optical confinement in all directions via photonic bandgap engineering. This has already been pioneered for vertical cavity surface emitting lasers, but in-plane photonic crystal lasers, which are suited to planar integration, have been realized more recently utilizing suspended InP membrane structures.158 Initially, only optical pumping was demonstrated,136 but electrical pumping schemes are now also available through lateral current injection159 or carrier injection along the light propagation direction,160,161 since the laser cavity is just a few micrometers long. Direct modulation on these microlasers shows 4.4 fJ bit−1 energy consumption with the laser operating at 10 Gbit s−1.159 Miniaturization of SOAs has also been demonstrated using photonic crystal waveguides. Enhanced by the slow-light effect, up to 8 times higher gain per unit length is achieved.162 So far, optical pumping has been demonstrated. Electrical pumping will require further reductions in the electrical resistance of the current path, without introducing detrimental optical loss via doping or metal contacts.

Butt-joint regrowth has been the most widely used industry approach to monolithic active–passive integration schemes in InP PICs due to its design flexibility and ability to combine multiple material bandgaps31,38 and component types. At high packing densities, the edge growth rate enhancement effect163,164 must be taken into account, which degrades the material quality near the interface by introducing topology and compositional (i.e., bandgap) variations.165 This effect leads to design limits on the maximum regrown area and the minimum spacing between adjacent regrown areas and, therefore, generates nonfunctional chip areas and constrains the achievable packing density. In practice, less than 30 µm active stripe width and greater than 200 µm spacing are typically required in the regrown areas to achieve a sufficiently suppressed growth rate enhancement for onward lithography. The spacing has been reduced to 50 µm166 for Fabry–Perot lasers with low-optical confinement waveguides. Growth rate enhancement should be given particular attention in high-confinement components and waveguides, where the optical mode is more sensitive to topology variations.

A butt-joint regrowth technique has been developed for arbitrary active component separation using an innovative open-mask approach.167,168 The conceptual process flow of such open-mask butt-joint regrowth is illustrated in Fig. 8(a). Steps 1 and 2 are implemented as per prior butt-joint regrowth techniques to define the active mesa and remove unwanted active materials. In step 3, the center of the mask is now opened to trap the excess reactive spices, which would otherwise contribute significantly to the growth rate enhancement through vapor-phase diffusion. In our approach, these species are deposited in a controlled manner in the opening, as depicted in step 4. A selective wet-etch can then be leveraged to remove the excessive material grown during the previous step. To achieve this, selective wet etch-stops may be inserted. Leveraging this approach, the growth rate enhancement constraints are lifted, since the functional area size is decoupled from the actual masked size during epitaxy. As a preliminary verification, a 0.5 × 1.7 mm2 MQW-based active area is integrated with a passive i-InP material in the same horizontal plane using this technique.167  Figure 8(b) shows the cross-sectional SEM image of such a butt-joint structure. The growth rate enhancement measured is of the same level as narrow stripes of 10 µm width. As this method involves “zero change” to the reactor parameters, it affords high flexibility in the circuit floorplan: normal masks for discrete components can be combined conveniently with open masks for high-density arrays. In the following process, both discrete and densely arranged components can be fabricated simultaneously, as seen in Fig. 8(c). From a purely topological perspective, an active component density of over 102 mm−1 may be achieved using this method.

FIG. 8.

Regrowth process for large-scale dense integration. Reproduced with permission from Wang et al., Opt. Mater. Express 11(8), 2478 (2021). Copyright 2021 Optica Publishing Group. (a) Conceptual process flow. (1) Mask deposition. (2) Selective wet-etch. (3) Mask opening. (4) Regrowth. (5) Selective removal of excess material. (6) Mask removal. (b) Stain-etched cross-sectional SEM image at the interface of a 0.5 × 1.7 mm2 active area with regrown passive i-InP. The SiO2 mask is still present. The cross section slice location is depicted in red at the bottom left inset. Scale bar: 500 nm. (c) Dense active–passive integration within a large regrown area.

FIG. 8.

Regrowth process for large-scale dense integration. Reproduced with permission from Wang et al., Opt. Mater. Express 11(8), 2478 (2021). Copyright 2021 Optica Publishing Group. (a) Conceptual process flow. (1) Mask deposition. (2) Selective wet-etch. (3) Mask opening. (4) Regrowth. (5) Selective removal of excess material. (6) Mask removal. (b) Stain-etched cross-sectional SEM image at the interface of a 0.5 × 1.7 mm2 active area with regrown passive i-InP. The SiO2 mask is still present. The cross section slice location is depicted in red at the bottom left inset. Scale bar: 500 nm. (c) Dense active–passive integration within a large regrown area.

Close modal

Heat dissipation is a limiting factor to the packing density. Membrane photonic components have relatively poor thermal dissipation when low-thermal-conductivity bonding polymers and dielectrics are used in the claddings. Thermal impedances of 500 μm-long membrane lasers and SOAs with dielectric claddings are measured to be in the range of 100–200 K W−1,135,169 while polymer-cladding-based devices can reach a thermal resistance of 300–500 K W−1.170,171 This level of thermal resistance will typically result in an elevated core temperature if actives are densely packed and under high current injection. Figure 9 shows the simulated cross-sectional temperature distributions of a dense membrane SOA array of 10 μm pitch, under the injection current density of 2.3 kA cm−2, in the cases of without and with thermal shunting to the Si substrate.172 The thermal shunt can be made with high thermal conductivity materials, such as metals. In this particular simulation, a 200 nm-thick shunt made of gold helps decrease the core temperature by 23 K, from 346 K (73 °C) to 323 K (50 °C). Direct bonding or bonding with a thin adhesion layer to a high-thermal-conductivity, low-index substrate has also been proposed as a viable solution to efficient heat sinking.173–175 It is worth noting that membrane active components often require less electrical power than their substrate-based counterparts, since they can offer higher efficiency through enhanced optical confinement. When combined with improved heat sinking, superior performance can be attained. One example is a membrane laser bonded to a SiC substrate with a thin 40 nm bonding layer.173 Simulation shows sub-100 K W−1 thermal resistance with a short length of 50 µm, facilitating the small differential gain reduction at high injection currents.173 This further allows for the realization of the record-high 108 GHz bandwidth with direct modulation.

FIG. 9.

Simulated temperature distributions of a membrane SOA without and with thermal shut to the Si substrate.172 

FIG. 9.

Simulated temperature distributions of a membrane SOA without and with thermal shut to the Si substrate.172 

Close modal

Electrical I/O density can be a limiting factor to the efficient use of chip area, especially with functionally complex active–passive PICs. Many VLSI applications are also I/O-intensive, e.g., photonic computing and switching. The microelectronics industry employs multi-layer metal interconnects with flip-chip packaging or hybrid assemblies.176 The same method should also be leveraged to boost the interconnect density of InP PICs. Figure 10(a) shows the frontside multi-layer transmission lines177 realized on an InP substrate for photonics devices. Apart from the extra degree of spatial freedom, the RF performance of the transmission lines could be improved since they are moved farther away from the lossy semiconductor. With the native substrate removed, the membrane-based cross section additionally allows for backside I/O, as depicted in Fig. 10(b). This is conceptually similar to the backside power delivery technology178 for digital EICs and could further boost I/O density by separating the bias delivery from signal delivery. Electronic co-integration could potentially simplify electrical I/O by reducing the number of connections to external electronic systems.179 As a proof-of-concept, InP-based MZMs integrated with an on-chip driver made of InGaAs metal–oxide–semiconductor field-effect transistor (MOSFET) have been demonstrated.180 

FIG. 10.

(a) A multi-layer electrical I/O.177 (b) Back-side electrical I/O with InP membrane technology.

FIG. 10.

(a) A multi-layer electrical I/O.177 (b) Back-side electrical I/O with InP membrane technology.

Close modal

To date, InP PICs are manufactured on wafers with diameters up to 100 mm, while 150 mm wafers are transitioning from R&D to production.95 In March 2024, the world-first 6-inch InP optoelectronics fab is announced by Coherent Corp. Current demand from the photonics market is satisfied with volume production on 100 mm wafers,95,181 but emerging VLSI applications may strengthen the transfer toward larger InP wafers. Apart from this economic driver, the technological motivation for wafer size scaling is the adoption of advanced process equipment used in microelectronics, with which better uniformity and process control can be achieved.182 High-quality membrane InP waveguides with loss figures121 comparable to that of SOI photonics75 are now demonstrated with DUV scanner lithography on 75 mm wafers. However, with the emphasis having been on Si microelectronics, equipment innovation has primarily targeted wafer diameters of over 200 mm.

Various approaches have been proposed to expand InP PICs to 200 mm and beyond. Table I summarizes the state of the art and challenges for notable approaches. The most widely reported technologies are flip-chip bonding and heterogeneous die-to-wafer bonding (referred to as die-bonding hereafter). III–V die flip-chip bonded to 300 mm wafers have been demonstrated by IMEC,21,183 while die-bonding has been primarily commercialized by Intel on its 200 mm platform.184 Flip-chip bonding creates a high topology, which may hinder further 3D electrical packaging, an especially important technology for large-scale circuits. Flip-chip bonding also requires sequential alignment of each processed InP die, bringing challenges in throughput scaling. The die-bonding technology circumvents these challenges by removing the substrate to create a membrane-like cross section and then doing post-transfer lithography. However, it still had the same challenge of mechanical conflict between adjacent dies, limiting the density when a diverse range of active/passive components are to be integrated.

TABLE I.

Technologies for expanding InP PIC wafer sizes.

Wafer
TechnologyReadinesssize (mm)Key current challenges
Flip-chip High 30021  High topology, throughput, inter-die mechanical 
   conflict 
Die-bonding High 200184  Inter-die mechanical conflict 
Wafer-bonding Mid 75115  Demonstration of 100 mm and beyond 
SmartCut™ Mid 200185  Demonstration of epitaxy after substrate transfer 
μTP Mid 200186  Mechanical alignment 
Heteroepitaxy Low 30030  Electrically pumping and coupling to membrane 
   waveguides 
Wafer
TechnologyReadinesssize (mm)Key current challenges
Flip-chip High 30021  High topology, throughput, inter-die mechanical 
   conflict 
Die-bonding High 200184  Inter-die mechanical conflict 
Wafer-bonding Mid 75115  Demonstration of 100 mm and beyond 
SmartCut™ Mid 200185  Demonstration of epitaxy after substrate transfer 
μTP Mid 200186  Mechanical alignment 
Heteroepitaxy Low 30030  Electrically pumping and coupling to membrane 
   waveguides 

Technologies in the R&D phase include wafer-to-wafer bonding (referred to as wafer-bonding hereafter), micro-transfer printing (μTP), SmartCut, and III–V on Si heteroepitaxy. The wafer-bonding technology removes the risk of inter-die mechanical conflict by providing all photonic functions in one membrane,115 but current demonstrations are still limited to 75 mm. Further expansion would require larger donor wafers. The SmartCut technology,187 which is used to manufacture SOI wafers, is a potential candidate to realize the expansion of InP membranes without needing larger native substrates. In this approach, multiple source InP wafers are first cut and tiled onto a larger substrate to produce a pseudo-donor wafer. Then, H+ ion implantation is performed to define an in-depth splitting layer in the InP tiles of the pseudo-donor. Afterward, the pseudo-donor is flipped and bonded to a receiver wafer. After annealing, in-depth splitting then happens at the implanted depth, leaving thin InP membranes on the large receiver wafer. Finally, polishing is performed on the receiver wafer to obtain a device-ready surface. The pseudo-donor can be recycled and utilized in the fabrication of a new wafer. The state-of-the-art demonstration of this technology is with 200 mm Si wafers.187 To support active components, transfer after epitaxy or epitaxy after transfer is required. μTP24 represents another effort to scale InP with the help of Si substrates. In this approach, active components are first fabricated on the donor InP wafer, and then, only the components themselves get transferred and printed to the receiver wafer with high parallelism, allowing for scalability and potential recycling of the III–V material. However, still fine mechanical alignment is required for the optical interfaces. This technology is explored by a few institutes across the globe, including Tyndall188 and IMEC.24 Our ongoing INSPIRE project186,189 aims at delivering a foundry-compatible 200-mm platform with foundry InP actives combined with low-loss SiN passives. Leveraging coupon-based transfer, much higher integration densities can potentially be enabled, facilitating VLSI realizations. Finally, direct heteroepitaxy of a III–V material on Si, an approach believed to have potentially the highest scalability,190 is an active area of research. From an epitaxy perspective, the biggest challenge is the mismatches in the lattice constants, thermal expansion coefficients, and crystal polarities between Si and III–V.191 Mitigation methods, such as buffer layers and growth in confined areas, create device-level challenges, such as electrical pumping if grown in confined areas and coupling to high-confinement waveguides if grown on thick buffer layers. Epitaxially grown InP lasers on 300-mm Si wafers have already been demonstrated with optical pumping in 2015,30 but the aforementioned issues are still to be addressed at the present time. In summary, multiple approaches to creating InP membranes on 200 and 300-mm wafer sizes already exist at low to mid-readiness levels. Some of them, if not all, are expected to mature rapidly in the coming 5–10 years, facilitating high-volume, large-scale, and high-density applications.

In this paper, we have reviewed the historical scaling trends for photonic integrated circuits. High levels of integration are appearing in the literature, but this has so far been constrained to circuits with functionally identical building blocks. In contrast, platforms with the most sophisticated and comprehensive range of building blocks are now lagging due to the challenges of onward scaling. Nonetheless, emergent use cases for complex combinations of active and passive components for communications, computation, and sensing are expected to drive renewed interest in high-complexity and high-performance integration platforms.

Emerging membrane-based platforms using indium phosphide are offering powerful scaling perspectives through cross-sectional miniaturization and areal optimization. Miniaturized modulators and lasers are now being developed with lengths in the order of tens of micrometers. Membrane SOAs and multipass SOAs show the potential for high optical gain and high efficiency with a reduced length. Areal optimization provides a systematic approach to enhance InP active integration density by orders of magnitude through advanced butt-joint regrowth, heat management, and I/O optimizations. Wafer size expansion beyond the native substrate additionally offers a route toward high volume and sustained scaling.

This work was funded partly by the NWO Zwaartekracht Project “Research Centre for Integrated Nanophotonics,” the H2020 ICT TWILIGHT Project (Contract No. 781471) under the Photonics PPP, and the Institute of Design, Optoelectronics and Sensing (IDEAS) Project INTENSE. The authors thank Jasper de Graaf, Bin Shi, and Weiming Yao for fruitful discussions.

The authors have no conflicts to disclose.

Yi Wang: Conceptualization (lead); Data curation (lead); Investigation (lead); Visualization (lead); Writing – original draft (lead); Writing – review & editing (equal). Yuqing Jiao: Conceptualization (lead); Funding acquisition (lead); Supervision (lead); Writing – review & editing (lead). Kevin Williams: Conceptualization (lead); Funding acquisition (lead); Supervision (lead); Writing – review & editing (lead).

The data that support the findings of this study are available from the corresponding author upon reasonable request.

1.
G. E.
Moore
, “
Cramming more components onto integrated circuits, Reprinted from Electronics, volume 38, number 8, April 19, 1965, pp.114 ff
,”
IEEE Solid-State Circuits Soc. Newsl.
11
(
3
),
33
(
2006
).
2.
M.
Smit
,
J.
van der Tol
, and
M.
Hill
, “
Moore’s law in photonics
,”
Laser Photonics Rev.
6
(
1
),
1
13
(
2012
).
4.
T. J.
Seok
,
K.
Kwon
,
J.
Henriksson
,
J.
Luo
, and
M. C.
Wu
, in
Optical Fiber Communication Conference (OFC) 2019
(
OSA
,
San Diego, California
,
2019
), p.
Th1E.5
.
5.
J.
Guglielmon
,
M. J.
Byrd
,
B. R.
Moss
,
J.
Tran
,
R. P. M.
Jr
,
M. R.
Watts
, and
C. V.
Poulton
, in 2023 Conference on Lasers and Electro-Optics (CLEO) (
Optica Publishing Group (OPG
),
2023
), p.
STh5C.5
.
6.
P.
Verrinder
,
L.
Wang
,
J.
Fridlander
,
F.
Sang
,
V.
Rosborough
,
M.
Nickerson
,
G.
Yang
,
M.
Stephen
,
L.
Coldren
, and
J.
Klamkin
, “
Gallium arsenide photonic integrated circuit platform for tunable laser applications
,”
IEEE J. Sel. Top. Quantum Electron.
28
(
1: Semiconductor Lasers
),
6100109
(
2022
).
7.
I.
Vurgaftman
,
J. R.
Meyer
, and
L. R.
Ram-Mohan
, “
Band parameters for III–V compound semiconductors and their alloys
,”
J. Appl. Phys.
89
(
11
),
5815
5875
(
2001
).
8.
F.
Kish
,
V.
Lal
,
P.
Evans
,
S. W.
Corzine
,
M.
Ziari
,
T.
Butrie
,
M.
Reffle
,
H.-S.
Tsai
,
A.
Dentai
,
J.
Pleumeekers
,
M.
Missey
,
M.
Fisher
,
S.
Murthy
,
R.
Salvatore
,
P.
Samra
,
S.
Demars
,
N.
Kim
,
A.
James
,
A.
Hosseini
,
P.
Studenkov
,
M.
Lauermann
,
R.
Going
,
M.
Lu
,
J.
Zhang
,
J.
Tang
,
J.
Bostak
,
T.
Vallaitis
,
M.
Kuntz
,
D.
Pavinski
,
A.
Karanicolas
,
B.
Behnia
,
D.
Engel
,
O.
Khayam
,
N.
Modi
,
M. R.
Chitgarha
,
P.
Mertz
,
W.
Ko
,
R.
Maher
,
J.
Osenbach
,
J. T.
Rahn
,
H.
Sun
,
K.-T.
Wu
,
M.
Mitchell
, and
D.
Welch
, “
System-on-chip photonic integrated circuits
,”
IEEE J. Sel. Top. Quantum Electron.
24
(
1
),
6100120
(
2018
).
9.
L. A.
Coldren
,
S. C.
Nicholes
,
L.
Johansson
,
S.
Ristic
,
R. S.
Guzzon
,
E. J.
Norberg
, and
U.
Krishnamachari
, “
High performance InP-based photonic ICs—A tutorial
,”
J. Lightwave Technol.
29
(
4
),
554
570
(
2011
).
10.
M.
Smit
,
X.
Leijtens
,
H.
Ambrosius
,
E.
Bente
,
J.
van der Tol
,
B.
Smalbrugge
,
T.
de Vries
,
E.-J.
Geluk
,
J.
Bolk
,
R.
van Veldhoven
,
L.
Augustin
,
P.
Thijs
,
D.
D’Agostino
,
H.
Rabbani
,
K.
Lawniczuk
,
S.
Stopinski
,
S.
Tahvili
,
A.
Corradi
,
E.
Kleijn
,
D.
Dzibrou
,
M.
Felicetti
,
E.
Bitincka
,
V.
Moskalenko
,
J.
Zhao
,
R.
Santos
,
G.
Gilardi
,
W.
Yao
,
K.
Williams
,
P.
Stabile
,
P.
Kuindersma
,
J.
Pello
,
S.
Bhat
,
Y.
Jiao
,
D.
Heiss
,
G.
Roelkens
,
M.
Wale
,
P.
Firth
,
F.
Soares
,
N.
Grote
,
M.
Schell
,
H.
Debregeas
,
M.
Achouche
,
J.-L.
Gentner
,
A.
Bakker
,
T.
Korthorst
,
D.
Gallagher
,
A.
Dabbs
,
A.
Melloni
,
F.
Morichetti
,
D.
Melati
,
A.
Wonfor
,
R.
Penty
,
R.
Broeke
,
B.
Musk
, and
D.
Robbins
, “
An introduction to InP-based generic integration technology
,”
Semicond. Sci. Technol.
29
(
8
),
083001
(
2014
).
11.
S. Y.
Siew
,
B.
Li
,
F.
Gao
,
H. Y.
Zheng
,
W.
Zhang
,
P.
Guo
,
S. W.
Xie
,
A.
Song
,
B.
Dong
,
L. W.
Luo
,
C.
Li
,
X.
Luo
, and
G.-Q.
Lo
, “
Review of silicon photonics technology and platform development
,”
J. Lightwave Technol.
39
(
13
),
4374
4389
(
2021
).
12.
D.
Liang
and
J. E.
Bowers
, “
Recent progress in lasers on silicon
,”
Nat. Photonics
4
(
8
),
511
517
(
2010
).
13.
G.
Sinatkas
,
T.
Christopoulos
,
O.
Tsilipakos
, and
E. E.
Kriezis
, “
Electro-optic modulation in integrated photonics
,”
J. Appl. Phys.
130
(
1
),
010901
(
2021
).
14.
Y.
Su
,
Y.
Zhang
,
C.
Qiu
,
X.
Guo
, and
L.
Sun
, “
Silicon photonic platform for passive waveguide devices: Materials, fabrication, and applications
,”
Adv. Mater. Technol.
5
(
8
),
1901153
(
2020
).
15.
M.
Xu
and
X.
Cai
, “
Advances in integrated ultra-wideband electro-optic modulators [Invited]
,”
Opt. Express
30
(
5
),
7253
(
2022
).
16.
D.
Mao
,
C.
Cheng
,
F.
Wang
,
Y.
Xiao
,
T.
Li
,
L.
Chang
,
A.
Soman
,
T.
Kananen
,
X.
Zhang
,
M.
Krainak
,
P.
Dong
, and
T.
Gu
, “
Device architectures for low voltage and ultrafast graphene integrated phase modulators
,”
IEEE J. Sel. Top. Quantum Electron.
27
(
2
),
3400309
(
2021
).
17.
L.
Czornomaz
and
S.
Abel
, in
Optical Fiber Communication Conference (OFC) 2022
(
Optica Publishing Group
,
San Diego, California
,
2022
), p.
Th1J.1
.
18.
M.
Eppenberger
,
A.
Messner
,
B. I.
Bitachon
,
W.
Heni
,
T.
Blatter
,
P.
Habegger
,
M.
Destraz
,
E.
De Leo
,
N.
Meier
,
N.
Del Medico
,
C.
Hoessbacher
,
B.
Baeuerle
, and
J.
Leuthold
, “
Resonant plasmonic micro-racetrack modulators with high bandwidth and high temperature tolerance
,”
Nat. Photonics
17
,
360
(
2023
).
19.
Z.
Wang
,
A.
Abbasi
,
U.
Dave
,
A.
De Groote
,
S.
Kumari
,
B.
Kunert
,
C.
Merckling
,
M.
Pantouvaki
,
Y.
Shi
,
B.
Tian
,
K.
Van Gasse
,
J.
Verbist
,
R.
Wang
,
W.
Xie
,
J.
Zhang
,
Y.
Zhu
,
J.
Bauwelinck
,
X.
Yin
,
Z.
Hens
,
J.
Van Campenhout
,
B.
Kuyken
,
R.
Baets
,
G.
Morthier
,
D.
Van Thourhout
, and
G.
Roelkens
, “
Novel light source integration approaches for silicon photonics: Novel light source integration approaches for silicon photonics
,”
Laser Photonics Rev.
11
(
4
),
1700063
(
2017
).
20.
S. J. B.
Yoo
, “
Hybrid integrated photonic platforms: Opinion
,”
Opt. Mater. Express
11
(
10
),
3528
(
2021
).
21.
A.
Marinins
,
S.
Hansch
,
H.
Sar
,
F.
Chancerel
,
N.
Golshani
,
H.-L.
Wang
,
A.
Tsiara
,
D.
Coenen
,
P.
Verheyen
,
G.
Capuz
,
Y.
De Koninck
,
O.
Yilmaz
,
G.
Morthier
,
F.
Schleicher
,
G.
Jamieson
,
S.
Smyth
,
A.
McKee
,
Y.
Ban
,
M.
Pantouvaki
,
D. C.
La Tulipe
, and
J.
Van Campenhout
, “
Wafer-scale hybrid integration of InP DFB lasers on Si photonics by flip-chip bonding with sub-300 nm alignment precision
,”
IEEE J. Sel. Top. Quantum Electron.
29
,
8200311
(
2022
).
22.
S.
Keyvaninia
,
G.
Roelkens
,
D.
Van Thourhout
,
C.
Jany
,
M.
Lamponi
,
A.
Le Liepvre
,
F.
Lelarge
,
D.
Make
,
G.-H.
Duan
,
D.
Bordel
, and
J.-M.
Fedeli
, “
Demonstration of a heterogeneously integrated III-V/SOI single wavelength tunable laser
,”
Opt. Express
21
(
3
),
3784
(
2013
).
23.
T.
Komljenovic
,
M.
Davenport
,
J.
Hulme
,
A. Y.
Liu
,
C. T.
Santis
,
A.
Spott
,
S.
Srinivasan
,
E. J.
Stanton
,
C.
Zhang
, and
J. E.
Bowers
, “
Heterogeneous silicon photonic integrated circuits
,”
J. Lightwave Technol.
34
(
1
),
20
35
(
2016
).
24.
G.
Roelkens
,
J.
Zhang
,
L.
Bogaert
,
M.
Billet
,
D.
Wang
,
B.
Pan
,
C. J.
Kruckel
,
E.
Soltanian
,
D.
Maes
,
T.
Vanackere
,
T.
Vandekerckhove
,
S.
Cuyvers
,
J.
De Witte
,
I. L.
Lufungula
,
X.
Guo
,
H.
Li
,
S.
Qin
,
G.
Muliuk
,
S.
Uvin
,
B.
Haq
,
C.
Op de Beeck
,
J.
Goyvaerts
,
G.
Lepage
,
P.
Verheyen
,
J.
Van Campenhout
,
G.
Morthier
,
B.
Kuyken
,
D.
Van Thourhout
, and
R.
Baets
, “
Micro-transfer printing for heterogeneous Si photonic integrated circuits
,”
IEEE J. Sel. Top. Quantum Electron.
29
(
3: Photon. Elec. Co-Inte. and Ad
),
8200414
(
2023
).
25.
K.
Feng
,
C.
Shang
,
E.
Hughes
,
A.
Clark
,
R.
Koscica
,
P.
Ludewig
,
D.
Harame
, and
J.
Bowers
, “
Quantum dot lasers directly grown on 300 mm Si wafers: Planar and in-pocket
,”
Photonics
10
(
5
),
534
(
2023
).
26.
Y.
Wang
,
S.
Chen
,
Y.
Yu
,
L.
Zhou
,
L.
Liu
,
C.
Yang
,
M.
Liao
,
M.
Tang
,
Z.
Liu
,
J.
Wu
,
W.
Li
,
I.
Ross
,
A. J.
Seeds
,
H.
Liu
, and
S.
Yu
, “
Monolithic quantum-dot distributed feedback laser array on silicon
,”
Optica
5
(
5
),
528
(
2018
).
27.
S.
Chen
,
W.
Li
,
J.
Wu
,
Q.
Jiang
,
M.
Tang
,
S.
Shutts
,
S. N.
Elliott
,
A.
Sobiesierski
,
A. J.
Seeds
,
I.
Ross
,
P. M.
Smowton
, and
H.
Liu
, “
Electrically pumped continuous-wave III–V quantum dot lasers on silicon
,”
Nat. Photonics
10
(
5
),
307
311
(
2016
).
28.
J.
Li
,
Y.
Xue
,
Z.
Yan
,
Y.
Han
, and
K. M.
Lau
, “
III–V selective regrowth on SOI for telecom lasers in silicon photonics
,”
J. Appl. Phys.
133
(
13
),
133103
(
2023
).
29.
J.
Li
,
Y.
Xue
,
L.
Lin
,
Z.
Xing
,
K. S.
Wong
, and
K. M.
Lau
, “
Telecom InGaAs/InP quantum well lasers laterally grown on silicon-on-insulator
,”
J. Lightwave Technol.
40
(
16
),
5631
5635
(
2022
).
30.
Z.
Wang
,
B.
Tian
,
M.
Pantouvaki
,
W.
Guo
,
P.
Absil
,
J.
Van Campenhout
,
C.
Merckling
, and
D.
Van Thourhout
, “
Room-temperature InP distributed feedback laser array directly grown on silicon
,”
Nat. Photonics
9
(
12
),
837
842
(
2015
).
31.
L. M.
Augustin
,
R.
Santos
,
E.
den Haan
,
S.
Kleijn
,
P. J. A.
Thijs
,
S.
Latkowski
,
D.
Zhao
,
W.
Yao
,
J.
Bolk
,
H.
Ambrosius
,
S.
Mingaleev
,
A.
Richter
,
A.
Bakker
, and
T.
Korthorst
, “
InP-based generic foundry platform for photonic integrated circuits
,”
IEEE J. Sel. Top. Quantum Electron.
24
(
1
),
6100210
(
2018
).
32.
V.
Rustichelli
,
C.
Calo
,
F.
Lemaitre
,
S.
Andreou
,
N.
Michel
,
F.
Pommereau
,
H.
Ambrosius
, and
K.
Williams
, “
Monolithic Integration of Buried-Heterostructures in a Generic Integrated Photonic Foundry Process
,”
IEEE J. Sel. Top. Quantum Electron.
25
(
5
),
6100808
(
2019
).
33.
F.
Lemaitre
,
C.
Fortin
,
N.
Lagay
,
G.
Binet
,
D.
Pustakhod
,
J.
Decobert
,
H.
Ambrosius
, and
K.
Williams
, “
Foundry photonic process extension with bandgap tuning using selective area growth
,”
IEEE J. Sel. Top. Quantum Electron.
25
(
5
),
6100708
(
2019
).
34.
L.
Hou
and
J. H.
Marsh
, “
Photonic integrated circuits based on quantum well intermixing techniques
,”
Procedia Eng.
140
,
107
114
(
2016
).
35.
J. J. G. M.
van der Tol
,
Y. S.
Oei
,
U.
Khalique
,
R.
Nötzel
, and
M. K.
Smit
, “
InP-based photonic circuits: Comparison of monolithic integration techniques
,”
Prog. Quantum Electron.
34
(
4
),
135
172
(
2010
).
36.
G. E.
Moore
, “
Progress in digital integrated electronics
,”
IEEE Solid-State Circuits Soc. Newsl.
11
(
3
),
36
37
(
2006
).
37.
C. A.
Mack
, “
Fifty years of Moore’s law
,”
IEEE Trans. Semicond. Manuf.
24
(
2
),
202
207
(
2011
).
38.
S.
Arafin
and
L. A.
Coldren
, “
Advanced InP photonic integrated circuits for communication and sensing
,”
IEEE J. Sel. Top. Quantum Electron.
24
(
1
),
6100612
(
2018
).
39.
S.
Porto
,
M.
Chitgarha
,
I.
Leung
,
R.
Maher
,
R.
Going
,
S.
Wolf
,
P.
Studenkov
,
J.
Zhang
,
H.
Hodaei
,
T.
Frost
,
H.-S.
Tsai
,
S.
Buggaveeti
,
A.
Rashidinejad
,
A.
Yekani
,
R.
Mirzaei Nejad
,
M.
Iglesias Olmedo
,
S.
Kerns
,
J.
Diniz
,
D.
Pavinski
,
R.
Brigham
,
B.
Foo
,
M.
Al-Khateeb
,
S.
Koenig
,
P.
Samra
,
M.
Missey
,
V.
Dominic
,
H.
Sun
,
S.
Sanders
,
J.
Osenbach
,
S.
Corzine
,
P.
Evans
,
V.
Lal
, and
M.
Ziari
, “
Demonstration of a 2 × 800 Gb/s/wave coherent optical engine based on an InP monolithic PIC
,”
J. Lightwave Technol.
40
(
3
),
664
671
(
2022
).
40.
J.
Summers
,
T.
Vallaitis
,
P.
Evans
,
M.
Ziari
,
P.
Studenkov
,
M.
Fisher
,
J.
Sena
,
A.
James
,
S.
Corzine
,
D.
Pavinski
,
J. O.
Yang
,
M.
Missey
,
D.
Gold
,
D.
Lambert
,
W.
Williams
,
M.
Lai
,
F.
Kish
, and
D.
Welch
, in
2014 the European Conference on Optical Communication (ECOC)
(
IEEE
,
Cannes, France
,
2014
), pp.
1
3
.
41.
R.
Nagarajan
,
C. H.
Joyner
,
R. P.
Schneider
,
J. S.
Bostak
,
T.
Butrie
,
A. G.
Dentai
,
V. G.
Dominic
,
P. W.
Evans
,
M.
Kato
,
M.
Kauffman
,
D. J. H.
Lambert
,
S. K.
Mathis
,
A.
Mathur
,
R. H.
Miles
,
M. L.
Mitchell
,
M. J.
Missey
,
S.
Murthy
,
A. C.
Nilsson
,
F. H.
Peters
,
S. C.
Pennypacker
,
J. L.
Pleumeekers
,
R. A.
Salvatore
,
R. K.
Schlenker
,
R. B.
Taylor
,
H.-S.
Tsai
,
M. F.
Van Leeuwen
,
J.
Webjorn
,
M.
Ziari
,
D.
Perkins
,
J.
Singh
,
S. G.
Grubb
,
M. S.
Reffle
,
D. G.
Mehuys
,
F. A.
Kish
, and
D. F.
Welch
, “
Large-scale photonic integrated circuits
,”
IEEE J. Sel. Top. Quantum Electron.
11
(
1
),
50
65
(
2005
).
42.
H.
Wang
, in
35th European Conference on Optical Communication (ECOC 2009)
(
IEEE
,
Vienna
,
2009
), p.
6.2.3
-
1
–6.2.3-2.
43.
R.
Varrazza
,
I. B.
Djordjevic
, and
S.
Yu
, “
Active vertical-coupler-based optical crosspoint switch matrix for optical packet-switching applications
,”
J. Lightwave Technol.
22
(
9
),
2034
2042
(
2004
).
44.
Y.
Abe
,
K.
Kishino
,
Y.
Suematsu
, and
S.
Arai
, “
GaInAsP/InP integrated laser with butt-jointed built-in distributed-Bragg-reflection waveguide
,”
Electron. Lett.
17
(
25–26
),
945
(
1981
).
45.
M.
Gustavsson
,
B.
Lagerström
,
L.
Thylén
,
M.
Janson
,
L.
Lundgren
,
A.-C.
Mörner
,
M.
Rask
, and
B.
Stoltz
, “
Monolithically integrated 4 × 4 InGaAsP/InP laser amplifier gate switch arrays
,”
Electron. Lett.
28
(
24
),
2223
(
1992
).
46.
M. R.
Amersfoort
,
M.
Smit
,
Y.-S.
Oei
,
B. H.
Verbeek
,
P.
Demeester
,
F. H.
Groen
, and
E. G.
Metaal
, in
European Conference on Integrated Optics (ECIO 93), 18–22 April 1993
, edited by
P.
Roth
(
CSEM
,
Neuchâtel, Switzerland
,
1993
).
47.
C. G. P.
Herben
,
D. H. P.
Maat
,
X. J. M.
Leijtens
,
M. R.
Leys
,
Y. S.
Oei
, and
M. K.
Smit
, “
Polarization independent dilated WDM cross-connect on InP
,”
IEEE Photonics Technol. Lett.
11
(
12
),
1599
1601
(
1999
).
48.
R.
Nagarajan
,
M.
Kato
,
J.
Pleumeekers
,
P.
Evans
,
D.
Lambert
,
A.
Chen
,
V.
Dominic
,
A.
Mathur
,
P.
Chavarkar
,
M.
Missey
,
A.
Dentai
,
S.
Hurtt
,
J.
Bäck
,
R.
Muthiah
,
S.
Murthy
,
R.
Salvatore
,
S.
Grubb
,
C.
Joyner
,
J.
Rossi
,
R.
Schneider
,
M.
Ziari
,
F.
Kish
, and
D.
Welch
, “
Single-chip 40-channel InP transmitter photonic integrated circuit capable of aggregate data rate of 1.6 Tbit/s
,”
Electron. Lett.
42
(
13
),
771
(
2006
).
49.
J.
Sun
,
E.
Timurdogan
,
A.
Yaacobi
,
E. S.
Hosseini
, and
M. R.
Watts
, “
Large-scale nanophotonic phased array
,”
Nature
493
(
7431
),
195
199
(
2013
).
50.
T. J.
Seok
,
N.
Quack
,
S.
Han
,
R. S.
Muller
, and
M. C.
Wu
, “
Large-scale broadband digital silicon photonic switches with vertical adiabatic couplers
,”
Optica
3
(
1
),
64
(
2016
).
51.
M.
Raval
,
A.
Yaacobi
, and
M. R.
Watts
, “
Integrated visible light phased array system for autostereoscopic image projection
,”
Opt. Lett.
43
(
15
),
3678
(
2018
).
52.
K.
Kwon
,
T. J.
Seok
,
J.
Henriksson
,
J.
Luo
,
L.
Ochikubo
,
J.
Jacobs
,
R. S.
Muller
, and
M. C.
Wu
, “
128 × 128 silicon photonic MEMS switch with scalable row/column addressing
,” in
2018 Conference on Lasers and Electro-Optics (CLEO)
(
IEEE
,
2018
).
53.
K.
Komatsu
,
Y.
Kohno
,
Y.
Nakano
, and
T.
Tanemura
, “
Large-scale monolithic InP-based optical phased array
,”
IEEE Photonics Technol. Lett.
33
(
20
),
1123
1126
(
2021
).
54.
S.
Fathololoumi
,
D.
Hui
,
S.
Jadhav
,
J.
Chen
,
K.
Nguyen
,
M. N.
Sakib
,
Z.
Li
,
H.
Mahalingam
,
S.
Amiralizadeh
,
N. N.
Tang
,
H.
Potluri
,
M.
Montazeri
,
H.
Frish
,
R. A.
Defrees
,
C.
Seibert
,
A.
Krichevsky
,
J. K.
Doylend
,
J.
Heck
,
R.
Venables
,
A.
Dahal
,
A.
Awujoola
,
A.
Vardapetyan
,
G.
Kaur
,
M.
Cen
,
V.
Kulkarni
,
S. S.
Islam
,
R. L.
Spreitzer
,
S.
Garag
,
A. C.
Alduino
,
R.
Chiou
,
L.
Kamyab
,
S.
Gupta
,
B.
Xie
,
R. S.
Appleton
,
S.
Hollingsworth
,
S.
McCargar
,
Y.
Akulova
,
K. M.
Brown
,
R.
Jones
,
D.
Zhu
,
T.
Liljeberg
, and
L.
Liao
, “
1.6 Tbps silicon photonics integrated circuit and 800 Gbps photonic engine for switch co-packaging demonstration
,”
J. Lightwave Technol.
39
(
4
),
1155
1161
(
2021
).
55.
W.
Xie
,
T.
Komljenovic
,
J.
Huang
,
M.
Tran
,
M.
Davenport
,
A.
Torres
,
P.
Pintus
, and
J.
Bowers
, “
Heterogeneous silicon photonics sensing for autonomous cars [Invited]
,”
Opt. Express
27
(
3
),
3642
(
2019
).
56.
C.
Ramey
, in
2020 IEEE Hot Chips 32 Symposium (HCS)
(
IEEE
,
Palo Alto, CA
,
2020
), pp.
1
26
.
57.
C. V.
Poulton
,
M. J.
Byrd
,
P.
Russo
,
B.
Moss
,
O.
Shatrovoy
,
M.
Khandaker
, and
M. R.
Watts
, “
Coherent LiDAR with an 8192-element optical phased array and driving laser
,”
IEEE J. Sel. Top. Quantum Electron.
28
(
5: Lidars and Photonic Radars
),
6100508
(
2022
).
58.
S. J.
Ben Yoo
, “
Prospects and challenges of photonic switching in data centers and computing systems
,”
J. Lightwave Technol.
40
(
8
),
2214
2243
(
2022
).
59.
M.
Tan
,
J.
Xu
,
S.
Liu
,
J.
Feng
,
H.
Zhang
,
C.
Yao
,
S.
Chen
,
H.
Guo
,
G.
Han
,
Z.
Wen
,
B.
Chen
,
Y.
He
,
X.
Zheng
,
D.
Ming
,
Y.
Tu
,
Q.
Fu
,
N.
Qi
,
D.
Li
,
L.
Geng
,
S.
Wen
,
F.
Yang
,
H.
He
,
F.
Liu
,
H.
Xue
,
Y.
Wang
,
C.
Qiu
,
G.
Mi
,
Y.
Li
,
T.
Chang
,
M.
Lai
,
L.
Zhang
,
Q.
Hao
, and
M.
Qin
, “
Co-packaged optics (CPO): Status, challenges, and solutions
,”
Front. Optoelectron.
16
(
1
),
1
(
2023
).
60.
R.
Stabile
,
A.
Rohit
, and
K. A.
Williams
, “
Monolithically integrated 8 × 8 space and wavelength selective cross-connect
,”
J. Lightwave Technol.
32
(
2
),
201
207
(
2014
).
61.
K.
Tanizawa
,
K.
Suzuki
,
M.
Toyama
,
M.
Ohtsuka
,
N.
Yokoyama
,
K.
Matsumaro
,
M.
Seki
,
K.
Koshino
,
T.
Sugaya
,
S.
Suda
,
G.
Cong
,
T.
Kimura
,
K.
Ikeda
,
S.
Namiki
, and
H.
Kawashima
, “
Ultra-compact 32 × 32 strictly-non-blocking Si-wire optical switch with fan-out LGA interposer
,”
Opt. Express
23
(
13
),
17599
(
2015
).
62.
Q.
Cheng
,
S.
Rumley
,
M.
Bahadori
, and
K.
Bergman
, “
Photonic switching in high performance datacenters [Invited]
,”
Opt. Express
26
(
12
),
16022
(
2018
).
63.
A.
Reuther
,
P.
Michaleas
,
M.
Jones
,
V.
Gadepally
,
S.
Samsi
, and
J.
Kepner
, in
2022 IEEE High Performance Extreme Computing Conference (HPEC)
(
IEEE
,
Waltham, MA
,
2022
), pp.
1
10
.
64.
H.
Zhou
,
J.
Dong
,
J.
Cheng
,
W.
Dong
,
C.
Huang
,
Y.
Shen
,
Q.
Zhang
,
M.
Gu
,
C.
Qian
,
H.
Chen
,
Z.
Ruan
, and
X.
Zhang
, “
Photonic matrix multiplication lights up photonic accelerator and beyond
,”
Light: Sci. Appl.
11
(
1
),
30
(
2022
).
65.
M. A.
Nahmias
,
T. F.
de Lima
,
A. N.
Tait
,
H.-T.
Peng
,
B. J.
Shastri
, and
P. R.
Prucnal
, “
Photonic multiply-accumulate operations for neural networks
,”
IEEE J. Sel. Top. Quantum Electron.
26
(
1
),
7701518
(
2020
).
66.
A. R.
Totovic
,
G.
Dabos
,
N.
Passalis
,
A.
Tefas
, and
N.
Pleros
, “
Femtojoule per MAC neuromorphic photonics: An energy and technology roadmap
,”
IEEE J. Sel. Top. Quantum Electron.
26
(
5
),
8800115
(
2020
).
67.
B. J.
Shastri
,
A. N.
Tait
,
T.
Ferreira de Lima
,
W. H. P.
Pernice
,
H.
Bhaskaran
,
C. D.
Wright
, and
P. R.
Prucnal
, “
Photonics for artificial intelligence and neuromorphic computing
,”
Nat. Photonics
15
(
2
),
102
114
(
2021
).
68.
R.
Stabile
,
G.
Dabos
,
C.
Vagionas
,
B.
Shi
,
N.
Calabretta
, and
N.
Pleros
, “
Neuromorphic photonics: 2D or not 2D?
,”
J. Appl. Phys.
129
(
20
),
200901
(
2021
).
69.
N. C.
Harris
,
R.
Braid
,
D.
Bunandar
,
J.
Carr
,
B.
Dobbie
,
C.
Dorta-Quinones
,
J.
Elmhurst
,
M.
Forsythe
,
M.
Gould
,
S.
Gupta
,
S.
Kannan
,
T.
Kenney
,
G.
Kong
,
T.
Lazovich
,
S.
Mckenzie
,
C.
Ramey
,
C.
Ravi
,
M.
Scott
,
J.
Sweeney
,
O.
Yildirim
, and
K.
Zhang
, in
Optical Fiber Communication Conference (OFC) 2020
(
Optica Publishing Group
,
San Diego, California
,
2020
), p.
W3A.3
.
70.
B.
Peng
,
S.
Hua
,
Z.
Su
,
Y.
Xu
, and
Y.
Shen
, in
2022 IEEE Photonics Conference (IPC)
(
IEEE
,
Vancouver, BC, Canada
,
2022
), pp.
1
2
.
71.
J.
Launay
,
I.
Poli
,
K.
Müller
,
G.
Pariente
,
I.
Carron
,
L.
Daudet
,
F.
Krzakala
, and
S.
Gigan
, “
Hardware beyond backpropagation: A photonic co-processor for direct feedback alignment
,” arXiv:2012.06373v1.
72.
P.
Xu
and
Z.
Zhou
, “
Silicon-based optoelectronics for general-purpose matrix computation: A review
,”
Adv. Photonics
4
(
04
),
044001
(
2022
).
73.
N. C.
Harris
,
G. R.
Steinbrecher
,
M.
Prabhu
,
Y.
Lahini
,
J.
Mower
,
D.
Bunandar
,
C.
Chen
,
F. N. C.
Wong
,
T.
Baehr-Jones
,
M.
Hochberg
,
S.
Lloyd
, and
D.
Englund
, “
Quantum transport simulations in a programmable nanophotonic processor
,”
Nat. Photonics
11
(
7
),
447
452
(
2017
).
74.
J.
Wang
,
S.
Paesani
,
Y.
Ding
,
R.
Santagati
,
P.
Skrzypczyk
,
A.
Salavrakos
,
J.
Tura
,
R.
Augusiak
,
L.
Mančinska
,
D.
Bacco
,
D.
Bonneau
,
J. W.
Silverstone
,
Q.
Gong
,
A.
Acín
,
K.
Rottwitt
,
L. K.
Oxenløwe
,
J. L.
O’Brien
,
A.
Laing
, and
M. G.
Thompson
, “
Multidimensional quantum entanglement with large-scale integrated optics
,”
Science
360
(
6386
),
285
291
(
2018
).
75.
J.
Bao
,
Z.
Fu
,
T.
Pramanik
,
J.
Mao
,
Y.
Chi
,
Y.
Cao
,
C.
Zhai
,
Y.
Mao
,
T.
Dai
,
X.
Chen
,
X.
Jia
,
L.
Zhao
,
Y.
Zheng
,
B.
Tang
,
Z.
Li
,
J.
Luo
,
W.
Wang
,
Y.
Yang
,
Y.
Peng
,
D.
Liu
,
D.
Dai
,
Q.
He
,
A. L.
Muthali
,
L. K.
Oxenløwe
,
C.
Vigliar
,
S.
Paesani
,
H.
Hou
,
R.
Santagati
,
J. W.
Silverstone
,
A.
Laing
,
M. G.
Thompson
,
J. L.
O’Brien
,
Y.
Ding
,
Q.
Gong
, and
J.
Wang
, “
Very-large-scale integrated quantum graph photonics
,”
Nat. Photonics
17
,
573
(
2023
).
76.
W.
Guo
,
P. R. A.
Binetti
,
C.
Althouse
,
M. L.
Masanovic
,
H. P. M. M.
Ambrosius
,
L. A.
Johansson
, and
L. A.
Coldren
, “
Two-dimensional optical beam steering with InP-based photonic integrated circuits
,”
IEEE J. Sel. Top. Quantum Electron.
19
(
4
),
6100212
(
2013
).
77.
M.
Gagino
,
M. B. J.
van Rijn
,
E. A. J. M.
Bente
,
M. K.
Smit
, and
V.
Dolores-Calzadilla
, “
Broadband operation of an InP optical phased array
,”
IEEE Photonics Technol. Lett.
34
(
10
),
541
544
(
2022
).
78.
C.-P.
Hsu
,
B.
Li
,
B.
Solano-Rivas
,
A. R.
Gohil
,
P. H.
Chan
,
A. D.
Moore
, and
V.
Donzella
, “
A review and perspective on optical phased array for automotive LiDAR
,”
IEEE J. Sel. Top. Quantum Electron.
27
(
1
),
8300416
(
2021
).
79.
B.
Buscaino
,
E.
Chen
,
J. W.
Stewart
,
T.
Pham
, and
J. M.
Kahn
, “
External vs. Integrated light sources for intra-data center co-packaged optical interfaces
,”
J. Lightwave Technol.
39
(
7
),
1984
1996
(
2021
).
80.
W.
Bogaerts
,
D.
Pérez
,
J.
Capmany
,
D. A. B.
Miller
,
J.
Poon
,
D.
Englund
,
F.
Morichetti
, and
A.
Melloni
, “
Programmable photonic circuits
,”
Nature
586
(
7828
),
207
216
(
2020
).
81.
K.
Suzuki
,
R.
Konoike
,
J.
Hasegawa
,
S.
Suda
,
H.
Matsuura
,
K.
Ikeda
,
S.
Namiki
, and
H.
Kawashima
, “
Low-insertion-loss and power-efficient 32 × 32 silicon photonics switch with extremely high-Δ silica PLC connector
,”
J. Lightwave Technol.
37
(
1
),
116
122
(
2019
).
82.
L.
Qiao
,
W.
Tang
, and
T.
Chu
, “
32 × 32 silicon electro-optic switch with built-in monitors and balanced-status units
,”
Sci. Rep.
7
(
1
),
42306
(
2017
).
83.
D.
Celo
,
D. J.
Goodwill
,
J.
Jiang
,
P.
Dumais
,
C.
Zhang
,
F.
Zhao
,
X.
Tu
,
C.
Zhang
,
S.
Yan
,
J.
He
,
M.
Li
,
W.
Liu
,
Y.
Wei
,
D.
Geng
,
H.
Mehrvar
, and
E.
Bernier
, in
2016 21th OptoElectronics and Communications Conference (OECC) and 2016 International Conference on Photonics in Switching and Computing (PSC)
(
IEICE
,
2016
).
84.
B. G.
Lee
and
N.
Dupuis
, “
Silicon photonic switch fabrics: Technology and architecture
,”
J. Lightwave Technol.
37
(
1
),
6
20
(
2019
).
85.
R. W.
Keyes
, “
Optical logic-in the light of computer technology
,”
Optica Acta: Int. J. Opt.
32
(
5
),
525
535
(
1985
).
86.
A.
Jha
,
C.
Huang
, and
P. R.
Prucnal
, “
Reconfigurable all-optical nonlinear activation functions for neuromorphic photonics
,”
Opt. Lett.
45
(
17
),
4819
(
2020
).
87.
B.
Shi
,
N.
Calabretta
, and
R.
Stabile
, “
InP photonic integrated multi-layer neural networks: Architecture and performance analysis
,”
APL Photonics
7
(
1
),
010801
(
2022
).
88.
N.
Takahashi
,
W.
Fang
,
R.
Xue
,
S.
Okada
,
Y.
Ohiso
,
T.
Amemiya
, and
N.
Nishiyama
, “
Optical ReLU using membrane lasers for an all-optical neural network
,”
Opt. Lett.
47
(
21
),
5715
(
2022
).
89.
M. E.
Warren
, in
2019 Symposium on VLSI Circuits
(
IEEE
,
Kyoto, Japan
,
2019
), pp.
C254
C255
.
90.
T.
Fersch
,
R.
Weigel
, and
A.
Koelpin
, “
Three-dimensional imaging, visualization, and display
,” Proc. SPIE 10219, 102190T (
2017
).
91.
M.
Gagino
,
A.
Millan-Mejia
,
L.
Augustin
,
K.
Williams
,
E.
Bente
, and
V.
Dolores
, in
Proceedings of the 26th Annual Symposium of the IEEE Photonics Society Benelux Chapter
(
IEEE
,
Eindhoven
,
2022
).
92.
M.
Gagino
,
A.
Millan-Mejia
,
L.
Augustin
,
K.
Williams
,
E.
Bente
, and
V.
Dolores-Calzadilla
, “
Integrated optical phased array with on-chip amplification enabling programmable beam shapes
” (unpublished).
93.
K. A.
McKinzie
,
C.
Wang
,
A. A.
Noman
,
D. L.
Mathine
,
K.
Han
,
D. E.
Leaird
,
G. E.
Hoefler
,
V.
Lal
,
F.
Kish
,
M.
Qi
, and
A. M.
Weiner
, “
InP high power monolithically integrated widely tunable laser and SOA array for hybrid integration
,”
Opt. Express
29
(
3
),
3490
(
2021
).
94.
F. M.
Soares
,
J. H.
Baek
,
N. K.
Fontaine
,
X.
Zhou
,
Y.
Wang
,
R. P.
Scott
,
J. P.
Heritage
,
C.
Junesand
,
S.
Lourdudoss
,
K. Y.
Liou
,
R. A.
Hamm
,
W.
Wang
,
B.
Patel
,
S.
Vatanapradit
,
L. A.
Gruezke
,
W. T.
Tsang
, and
S. J. B.
Yoo
, in
Optical Fiber Communication Conference
(
OSA
,
San Diego, California
,
2010
), p.
OThS1
.
95.
IPSR-I, Integrated Photonic Systems Roadmap-International (IPSR-I),
2019
.
97.
https://www.lightelligence.ai/ for Lightelligence,
2023
.
98.
C. V.
Poulton
,
M. J.
Byrd
,
B.
Moss
,
E.
Timurdogan
,
R.
Millman
, and
M. R.
Watts
, in
Conference on Lasers and Electro-Optics
(
OSA
,
San Jose, CA
,
2020
), p.
JTh4A.3
.
99.
S.
Han
,
T. J.
Seok
,
N.
Quack
,
B.-W.
Yoo
, and
M. C.
Wu
, “
Large-scale silicon photonic switches with movable directional couplers
,”
Optica
2
(
4
),
370
(
2015
).
100.
R.
Stabile
,
A.
Albores-Mejia
, and
K. A.
Williams
, “
Monolithic active-passive 16 × 16 optoelectronic switch
,”
Opt. Lett.
37
(
22
),
4666
(
2012
).
101.
X.
Zhang
,
K.
Kwon
,
J.
Henriksson
,
J.
Luo
, and
M. C.
Wu
, “
A large-scale microelectromechanical-systems-based silicon photonics LiDAR
,”
Nature
603
(
7900
),
253
258
(
2022
).
102.
Y.
Kim
,
J.-H.
Han
,
D.
Ahn
, and
S.
Kim
, “
Heterogeneously-integrated optical phase shifters for next-generation modulators and switches on a silicon photonics platform: A review
,”
Micromachines
12
(
6
),
625
(
2021
).
103.
Broadband Optical Modulators
, edited by
A.
Chen
, and
E.
Murphy
, 0th ed. (
CRC Press
,
2016
), pp.
114
149
.
104.
K.
Liu
,
C. R.
Ye
,
S.
Khan
, and
V. J.
Sorger
, “
Review and perspective on ultrafast wavelength-size electro-optic modulators
,”
Laser Photonics Rev.
9
(
2
),
172
194
(
2015
).
105.
S.
Chung
,
M.
Nakai
, and
H.
Hashemi
, “
Low-power thermo-optic silicon modulator for large-scale photonic integrated systems
,”
Opt. Express
27
(
9
),
13430
(
2019
).
106.
H.
Qiu
,
Y.
Liu
,
C.
Luan
,
D.
Kong
,
X.
Guan
,
Y.
Ding
, and
H.
Hu
, “
Energy-efficient thermo-optic silicon phase shifter with well-balanced overall performance
,”
Opt. Lett.
45
(
17
),
4806
(
2020
).
107.
R.
Konoike
,
K.
Suzuki
,
S.
Namiki
,
H.
Kawashima
, and
K.
Ikeda
, “
Ultra-compact silicon photonics switch with high-density thermo-optic heaters
,”
Opt. Express
27
(
7
),
10332
(
2019
).
108.
M. R.
Watts
,
J.
Sun
,
C.
DeRose
,
D. C.
Trotter
,
R. W.
Young
, and
G. N.
Nielson
, “
Adiabatic thermo-optic Mach–Zehnder switch
,”
Opt. Lett.
38
(
5
),
733
(
2013
).
109.
G.
Gilardi
,
W.
Yao
,
H.
Rabbani Haghighi
,
X. J. M.
Leijtens
,
M. K.
Smit
, and
M. J.
Wale
, “
Deep trenches for thermal crosstalk reduction in InP-based photonic integrated circuits
,”
J. Lightwave Technol.
32
(
24
),
4864
4870
(
2014
).
110.
Y.
Zhang
,
A.
Samanta
,
K.
Shang
, and
S. J. B.
Yoo
, “
Scalable 3D silicon photonic electronic integrated circuits and their applications
,”
IEEE J. Sel. Top. Quantum Electron.
26
(
2
),
8201510
(
2020
).
111.
S.
Matsuo
,
T.
Aihara
,
T.
Hiraki
,
Y.
Maeda
,
T.
Kishi
,
T.
Fujii
,
K.
Takeda
, and
T.
Kakitsuka
, “
Heterogeneously integrated membrane III-V compound semiconductor devices with silicon photonics platform
,”
IEEE J. Sel. Top. Quantum Electron.
29
,
6100510
(
2022
).
112.
N.
Sekine
,
K.
Sumita
,
K.
Toprasertpong
,
S.
Takagi
, and
M.
Takenaka
, “
Monolithic integration of electro-absorption modulators and photodetectors on III-V CMOS photonics platform by quantum well intermixing
,”
Opt. Express
30
(
13
),
23318
(
2022
).
113.
Y.
Jiao
,
J.
van der Tol
,
V.
Pogoretskii
,
J.
van Engelen
,
A. A.
Kashi
,
S.
Reniers
,
Y.
Wang
,
X.
Zhao
,
W.
Yao
,
T.
Liu
,
F.
Pagliano
,
A.
Fiore
,
X.
Zhang
,
Z.
Cao
,
R. R.
Kumar
,
H. K.
Tsang
,
R.
van Veldhoven
,
T.
de Vries
,
E.-J.
Geluk
,
J.
Bolk
,
H.
Ambrosius
,
M.
Smit
, and
K.
Williams
, “
Indium phosphide membrane nanophotonic integrated circuits on silicon
,”
Phys. Status Solidi A
217
(
3
),
1900606
(
2020
).
114.
J. J. G. M.
van der Tol
,
Y.
Jiao
,
J. P.
Van Engelen
,
V.
Pogoretskiy
,
A. A.
Kashi
, and
K.
Williams
, “
InP membrane on silicon (IMOS) photonics
,”
IEEE J. Quantum Electron.
56
(
1
),
6300107
(
2020
).
115.
Y.
Jiao
,
N.
Nishiyama
,
J.
van der Tol
,
J.
van Engelen
,
V.
Pogoretskiy
,
S.
Reniers
,
A. A.
Kashi
,
Y.
Wang
,
V. D.
Calzadilla
,
M.
Spiegelberg
,
Z.
Cao
,
K.
Williams
,
T.
Amemiya
, and
S.
Arai
, “
InP membrane integrated photonics research
,”
Semicond. Sci. Technol.
36
(
1
),
013001
(
2020
).
116.
Z.
Gu
,
D.
Inoue
,
T.
Amemiya
,
N.
Nishiyama
, and
S.
Arai
, “
20 Gbps operation of membrane-based GaInAs/InP waveguide-type p–i–n photodiode bonded on Si substrate
,”
Appl. Phys. Express
11
(
2
),
022102
(
2018
).
117.
T.
Hiratani
,
D.
Inoue
,
T.
Tomiyasu
,
K.
Fukuda
,
T.
Amemiya
,
N.
Nishiyama
, and
S.
Arai
, “
High-efficiency operation of membrane distributed-reflector lasers on silicon substrate
,”
IEEE J. Sel. Top. Quantum Electron.
23
(
6
),
3700108
(
2017
).
118.
J.
van der Tol
,
R.
Zhang
,
J.
Pello
,
F.
Bordas
,
G.
Roelkens
,
H.
Ambrosius
,
P.
Thijs
,
F.
Karouta
, and
M.
Smit
, “
Photonic integration in indium-phosphide membranes on silicon
,”
IET Optoelectron.
5
(
5
),
218
225
(
2011
).
119.
J.
Lee
,
Y.
Maeda
,
Y.
Atsumi
,
Y.
Takino
,
N.
Nishiyama
, and
S.
Arai
, “
Low-loss GaInAsP wire waveguide on Si substrate with benzocyclobutene adhesive wafer bonding for membrane photonic circuits
,”
Jpn. J. Appl. Phys.
51
(
4R
),
042201
(
2012
).
120.
M.
Takenaka
,
M.
Yokoyama
,
M.
Sugiyama
,
Y.
Nakano
, and
S.
Takagi
, “
InGaAsP photonic wire based ultrasmall arrayed waveguide grating multiplexer on Si wafer
,”
Appl. Phys. Express
2
(
12
),
122201
(
2009
).
121.
J.
Van Engelen
,
S.
Reniers
,
J.
Bolk
,
K.
Williams
,
J.
Van Der Tol
, and
Y.
Jiao
, in
2019 Compound Semiconductor Week (CSW)
(
IEEE
,
Nara, Japan
,
2019
), pp.
1
2
.
122.
Y.
Jiao
,
J.
Liu
,
A. M.
Mejia
,
L.
Shen
, and
J.
van der Tol
, “
Ultra-sharp and highly tolerant waveguide bends for InP photonic membrane circuits
,”
IEEE Photonics Technol. Lett.
28
(
15
),
1637
1640
(
2016
).
123.
J.
Pello
,
J.
van der Tol
,
S.
Keyvaninia
,
R.
van Veldhoven
,
H.
Ambrosius
,
G.
Roelkens
, and
M.
Smit
, “
High-efficiency ultrasmall polarization converter in InP membrane
,”
Opt. Lett.
37
(
17
),
3711
(
2012
).
124.
S. F. G.
Reniers
,
K. A.
Williams
,
J. J. G. M.
van der Tol
, and
Y.
Jiao
, “
An accurate characterization method for integrated polarization converters
,”
IEEE J. Quantum Electron.
57
(
1
),
0600306
(
2021
).
125.
S. F. G.
Reniers
,
Y.
Wang
,
K. A.
Williams
,
J. J. G. M.
Van Der Tol
, and
Y.
Jiao
, “
Characterization of waveguide photonic crystal reflectors on indium phosphide membranes
,”
IEEE J. Quantum Electron.
55
(
6
),
6400107
(
2019
).
126.
Y.
Wang
,
V.
Dolores-Calzadilla
,
K. A.
Williams
,
M. K.
Smit
, and
Y.
Jiao
, “
Ultra-compact and efficient microheaters on a submicron-thick InP membrane
,”
J. Lightwave Technol.
41
(
6
),
1790
1800
(
2023
).
127.
T.
Hiraki
,
T.
Aihara
,
K.
Hasebe
,
K.
Takeda
,
T.
Fujii
,
T.
Kakitsuka
,
T.
Tsuchizawa
,
H.
Fukuda
, and
S.
Matsuo
, “
Heterogeneously integrated III–V/Si MOS capacitor Mach–Zehnder modulator
,”
Nat. Photonics
11
(
8
),
482
485
(
2017
).
128.
J.-H.
Han
,
F.
Boeuf
,
J.
Fujikata
,
S.
Takahashi
,
S.
Takagi
, and
M.
Takenaka
, “
Efficient low-loss InGaAsP/Si hybrid MOS optical modulator
,”
Nat. Photonics
11
(
8
),
486
490
(
2017
).
129.
T.
Piyapatarakul
,
H.
Tang
,
K.
Toprasertpong
,
S.
Takagi
, and
M.
Takenaka
, “
Efficient optical phase modulator based on an III–V metal-oxide-semiconductor structure with a doped graphene transparent electrode
,”
Jpn. J. Appl. Phys.
62
(
SC
),
SC1008
(
2023
).
130.
H.
Tang
,
Q.
Li
,
C. P.
Ho
,
J.
Fujikata
,
M.
Noguchi
,
S.
Takahashi
,
K.
Toprasertpong
,
S.
Takagi
, and
M.
Takenaka
, “
Modulation bandwidth improvement of III-V/Si hybrid MOS optical modulator by reducing parasitic capacitance
,”
Opt. Express
30
(
13
),
22848
(
2022
).
131.
S.
Ohno
,
Q.
Li
,
N.
Sekine
,
J.
Fujikata
,
M.
Noguchi
,
S.
Takahashi
,
K.
Toprasertpong
,
S.
Takagi
, and
M.
Takenaka
, “
Taperless Si hybrid optical phase shifter based on a metal-oxide-semiconductor capacitor using an ultrathin InP membrane
,”
Opt. Express
28
(
24
),
35663
(
2020
).
132.
B. R.
Bennett
,
R. A.
Soref
, and
J. A.
Del Alamo
, “
Carrier-induced change in refractive index of InP, GaAs and InGaAsP
,”
IEEE J. Quantum Electron.
26
(
1
),
113
122
(
1990
).
133.
J.-P.
Weber
, “
Optimization of the carrier-induced effective index change in InGaAsP waveguides-application to tunable Bragg filters
,”
IEEE J. Quantum Electron.
30
(
8
),
1801
1816
(
1994
).
134.
T.
Okumura
,
M.
Kurokawa
,
M.
Shirao
,
D.
Kondo
,
H.
Ito
,
N.
Nishiyama
,
T.
Maruyama
, and
S.
Arai
, “
Lateral current injection GaInAsP/InP laser on semi-insulating substrate for membrane-based photonic circuits
,”
Opt. Express
17
(
15
),
12564
(
2009
).
135.
W.
Fang
,
N.
Takahashi
,
Y.
Ohiso
,
T.
Amemiya
, and
N.
Nishiyama
, “
Reduced thermal resistance of membrane Fabry-Perot laser bonded on Si through room-temperature, surface-activated bonding assisted by a-Si nano-film
,”
IEEE J. Quantum Electron.
58
(
2
),
2000208
(
2022
).
136.
S.
Matsuo
,
A.
Shinya
,
T.
Kakitsuka
,
K.
Nozaki
,
T.
Segawa
,
T.
Sato
,
Y.
Kawaguchi
, and
M.
Notomi
, “
High-speed ultracompact buried heterostructure photonic-crystal laser with 13 fJ of energy consumed per bit transmitted
,”
Nat. Photonics
4
(
9
),
648
654
(
2010
).
137.
T.
Tsurugaya
,
T.
Hiraki
,
M.
Nakajima
,
T.
Aihara
,
N.-P.
Diamantopoulos
,
T.
Fujii
,
T.
Segawa
, and
S.
Matsuo
, “
Cross-gain modulation-based photonic reservoir computing using low-power-consumption membrane SOA on Si
,”
Opt. Express
30
(
13
),
22871
(
2022
).
138.
N.
Takahashi
,
W.
Fang
,
R.
Xue
,
S.
Katsumi
,
Y.
Ohiso
,
T.
Amemiya
, and
N.
Nishiyama
, in
2022 28th International Semiconductor Laser Conference (ISLC)
(
IEEE
,
Matsue, Japan
,
2022
), pp.
1
2
.
139.
N.
Takahashi
,
W.
Fang
,
R.
Xue
,
S.
Katsumi
,
Y.
Ohiso
,
T.
Amemiya
, and
N.
Nishiyama
, in
2022 IEICE Society Conference
(
IEICE
,
2022
), p.
ROMBUNNO.C
-
3
/4-24.
140.
T.
Hiraki
,
T.
Aihara
,
T.
Fujii
,
K.
Takeda
,
T.
Kakitsuka
,
T.
Tsuchizawa
, and
S.
Matsuo
, “
Membrane InGaAsP Mach–Zehnder modulator integrated with optical amplifier on Si platform
,”
J. Lightwave Technol.
38
(
11
),
3030
3036
(
2020
).
141.
Y.
Wang
,
Y.
Wei
,
V.
Dolores-Calzadilla
,
D.
Dai
,
K.
Williams
,
M.
Smit
, and
Y.
Jiao
, “
Efficiency-boosted semiconductor optical amplifiers via mode-division multiplexing
,”
Optica
10
(
9
),
1153
(
2023
).
142.
J.
de Graaf
,
X.
Zhao
,
D.
Konstantinou
,
M.
van den Hout
,
S.
Reniers
,
L.
Shen
,
S.
van der Heide
,
S.
Rommel
,
I. T.
Monroy
,
C.
Okonkwo
,
Z.
Cao
,
T.
Koonen
,
K.
Williams
, and
Y.
Jiao
, “
Beyond 110 GHz uni-traveling carrier photodiodes on an InP-membrane-on-silicon platform
,”
IEEE J. Sel. Top. Quantum Electron.
28
(
2
),
3802010
(
2022
).
143.
Y.
Wang
,
J. P.
van Engelen
,
S. F. G.
Reniers
,
M. B. J.
van Rijn
,
X.
Zhang
,
Z.
Cao
,
V.
Dolores-Calzadilla
,
K. A.
Williams
,
M. K.
Smit
, and
Y.
Jiao
, “
InP-based grating antennas for high-resolution optical beam steering
,”
IEEE J. Sel. Top. Quantum Electron.
27
(
1
),
6100107
(
2021
).
144.
A. A.
Kashi
,
J. J. G. M.
Van Der Tol
,
K. A.
Williams
, and
Y.
Jiao
, in
2019 24th OptoElectronics and Communications Conference (OECC) and 2019 International Conference on Photonics in Switching and Computing (PSC)
(
IEEE
,
Fukuoka, Japan
,
2019
), pp.
1
3
.
145.
A.
Meighan
,
L.
Augustin
,
M.
Wale
, and
K. A.
Williams
, in 2022 Conference on Lasers and Electro-Optics (CLEO) (
IEEE
,
San Jose, CA
,
2022
), p.
SF4M.6
.
146.
C.
Kieninger
,
Y.
Kutuvantavida
,
D. L.
Elder
,
S.
Wolf
,
H.
Zwickel
,
M.
Blaicher
,
J. N.
Kemal
,
M.
Lauermann
,
S.
Randel
,
W.
Freude
,
L. R.
Dalton
, and
C.
Koos
, “
Ultra-high electro-optic activity demonstrated in a silicon-organic hybrid modulator
,”
Optica
5
(
6
),
739
(
2018
).
147.
C.
Kieninger
,
C.
Füllner
,
H.
Zwickel
,
Y.
Kutuvantavida
,
J. N.
Kemal
,
C.
Eschenbaum
,
D. L.
Elder
,
L. R.
Dalton
,
W.
Freude
,
S.
Randel
, and
C.
Koos
, “
Silicon-organic hybrid (SOH) Mach-Zehnder modulators for 100 GBd PAM4 signaling with sub-1 dB phase-shifter loss
,”
Opt. Express
28
(
17
),
24693
(
2020
).
148.
A. A.
Kashi
, “
Electro-optic slot waveguide phase modulators on the InP membrane on silicon platform
,” Ph.D. thesis (
Eindhoven University of Technology
,
2022
).
149.
A. A.
Kashi
,
J. J. G. M.
van der Tol
,
K.
Williams
,
W.
Yao
,
M. S.
Lebby
,
C.
Pecinovsky
, and
Y.
Jiao
, “
Electro-optic slot waveguide phase modulator on the InP membrane on silicon platform
,”
IEEE J. Quantum Electron.
57
(
1
),
0600210
(
2020
).
150.
N.
Sekine
,
K.
Toprasertpong
,
S.
Takagi
, and
M.
Takenaka
, “
Numerical analyses of optical loss and modulation bandwidth of an InP organic hybrid optical modulator
,”
Opt. Express
28
(
20
),
29730
(
2020
).
151.
M.
Burla
,
C.
Hoessbacher
,
W.
Heni
,
C.
Haffner
,
Y.
Fedoryshyn
,
D.
Werner
,
T.
Watanabe
,
H.
Massler
,
D. L.
Elder
,
L. R.
Dalton
, and
J.
Leuthold
, “
500 GHz plasmonic Mach-Zehnder modulator enabling sub-THz microwave photonics
,”
APL Photonics
4
(
5
),
056106
(
2019
).
152.
S.
Ummethala
,
T.
Harter
,
K.
Koehnle
,
Z.
Li
,
S.
Muehlbrandt
,
Y.
Kutuvantavida
,
J.
Kemal
,
P.
Marin-Palomo
,
J.
Schaefer
,
A.
Tessmann
,
S. K.
Garlapati
,
A.
Bacher
,
L.
Hahn
,
M.
Walther
,
T.
Zwick
,
S.
Randel
,
W.
Freude
, and
C.
Koos
, “
THz-to-optical conversion in wireless communications using an ultra-broadband plasmonic modulator
,”
Nat. Photonics
13
(
8
),
519
524
(
2019
).
153.
W.
Heni
,
Y.
Fedoryshyn
,
B.
Baeuerle
,
A.
Josten
,
C. B.
Hoessbacher
,
A.
Messner
,
C.
Haffner
,
T.
Watanabe
,
Y.
Salamin
,
U.
Koch
,
D. L.
Elder
,
L. R.
Dalton
, and
J.
Leuthold
, “
Plasmonic IQ modulators with attojoule per bit electrical energy consumption
,”
Nat. Commun.
10
(
1
),
1694
(
2019
).
154.
C.
Haffner
,
W.
Heni
,
Y.
Fedoryshyn
,
A.
Josten
,
B.
Baeuerle
,
C.
Hoessbacher
,
Y.
Salamin
,
U.
Koch
,
N.
Dordevic
,
P.
Mousel
,
R.
Bonjour
,
A.
Emboras
,
D.
Hillerkuss
,
P.
Leuchtmann
,
D. L.
Elder
,
L. R.
Dalton
,
C.
Hafner
, and
J.
Leuthold
, “
Plasmonic organic hybrid modulators—Scaling highest speed photonics to the microscale
,”
Proc. IEEE
104
(
12
),
2362
2379
(
2016
).
155.
M. T.
Hill
and
M. C.
Gather
, “
Advances in small lasers
,”
Nat. Photonics
8
(
12
),
908
918
(
2014
).
156.
M. T.
Hill
,
Y.-S.
Oei
,
B.
Smalbrugge
,
Y.
Zhu
,
T.
de Vries
,
P. J.
van Veldhoven
,
F. W. M.
van Otten
,
T. J.
Eijkemans
,
J. P.
Turkiewicz
,
H.
de Waardt
,
E. J.
Geluk
,
S.-H.
Kwon
,
Y.-H.
Lee
,
R.
Nötzel
, and
M. K.
Smit
, “
Lasing in metallic-coated nanocavities
,”
Nat. Photonics
1
(
10
),
589
594
(
2007
).
157.
V.
Dolores-Calzadilla
,
B.
Romeira
,
F.
Pagliano
,
S.
Birindelli
,
A.
Higuera-Rodriguez
,
P. J.
van Veldhoven
,
M. K.
Smit
,
A.
Fiore
, and
D.
Heiss
, “
Waveguide-coupled nanopillar metal-cavity light-emitting diodes on silicon
,”
Nat. Commun.
8
(
1
),
14323
(
2017
).
158.
K.
Jeong
,
M.
Hwang
,
J.
Kim
,
J.
Park
,
J. M.
Lee
, and
H.
Park
, “
Recent progress in nanolaser technology
,”
Adv. Mater.
32
(
51
),
2001996
(
2020
).
159.
K.
Takeda
,
T.
Sato
,
A.
Shinya
,
K.
Nozaki
,
W.
Kobayashi
,
H.
Taniyama
,
M.
Notomi
,
K.
Hasebe
,
T.
Kakitsuka
, and
S.
Matsuo
, “
Few-fJ/bit data transmissions using directly modulated lambda-scale embedded active region photonic-crystal lasers
,”
Nat. Photonics
7
(
7
),
569
575
(
2013
).
160.
G.
Crosnier
,
D.
Sanchez
,
S.
Bouchoule
,
P.
Monnier
,
G.
Beaudoin
,
I.
Sagnes
,
R.
Raj
, and
F.
Raineri
, “
Hybrid indium phosphide-on-silicon nanolaser diode
,”
Nat. Photonics
11
(
5
),
297
300
(
2017
).
161.
K.-Y.
Jeong
,
Y.-S.
No
,
Y.
Hwang
,
K. S.
Kim
,
M.-K.
Seo
,
H.-G.
Park
, and
Y.-H.
Lee
, “
Electrically driven nanobeam laser
,”
Nat. Commun.
4
(
1
),
2822
(
2013
).
162.
S.
Ek
,
P.
Lunnemann
,
Y.
Chen
,
E.
Semenova
,
K.
Yvind
, and
J.
Mork
, “
Slow-light-enhanced gain in active photonic crystal waveguides
,”
Nat. Commun.
5
(
1
),
5039
(
2014
).
163.
Y.
Moriguchi
,
T.
Kihara
, and
K.
Shimomura
, “
High growth enhancement factor in arrayed waveguide by MOVPE selective area growth
,”
J. Cryst. Growth
248
,
395
399
(
2003
).
164.
A. R.
Clawson
, “
MOVPE growth of SiO2-masked InP structures at reduced pressures
,”
J. Cryst. Growth
77
,
334
339
(
1986
).
165.
T.
Tsuchiya
,
J.
Shimizu
,
M.
Shirai
, and
M.
Aoki
, “
Selective-area growth of high-crystalline-quality InGaAlAs by metal-organic vapor-phase epitaxy
,”
J. Cryst. Growth
248
,
384
389
(
2003
).
166.
F.
Lemaitre
,
S.
Kleijn
,
A. J.
Millan-Mejia
,
K.
Williams
, and
V.
Dolores-Calzadilla
, “
High density integration of semiconductor optical amplifiers in InP generic photonic integration technology
,”
IEEE J. Sel. Top. Quantum Electron.
28
,
6101306
(
2022
).
167.
Y.
Wang
,
J.
van Engelen
,
R.
van Veldhoven
,
T.
de Vries
,
V.
Dolores-Cazadilla
,
M.
Smit
,
K.
Williams
, and
Y.
Jiao
, “
Versatile butt-joint regrowth for dense photonic integration
,”
Opt. Mater. Express
11
(
8
),
2478
(
2021
).
168.
Y.
Ueda
,
Y.
Saito
,
J.
Ozaki
,
Y.
Ogiso
,
T.
Shindo
,
Y.
Hashizume
, and
M.
Ishikawa
, “
Partial regrowth of optical-gain section for improved wafer process flexibility of InP photonic integrated circuits
,”
J. Lightwave Technol.
40
(
8
),
2465
2473
(
2022
).
169.
M.
Eissa
,
T.
Kikuchi
,
Y.
Oiso
,
T.
Amemiya
, and
N.
Nishiyama
, “
High thermal performance hybrid GaInAsP/SOI ridge waveguide lasers with enhanced heat dissipation structure
,”
Jpn. J. Appl. Phys.
62
(
1
),
010905
(
2023
).
170.
W.
Fang
,
N.
Takahashi
,
T.
Horikawa
,
Y.
Ohiso
,
R.
Xue
,
S.
Katsumi
,
T.
Amemiya
, and
N.
Nishiyama
, “
High-temperature and high-efficiency operation of a membrane optical link with a buried-ridge-waveguide bonded on a Si substrate
,”
Opt. Express
30
(
19
),
34420
(
2022
).
171.
S. F. G.
Reniers
, “
Integration of a polarization converter on the active-passive IMOS platform
,” Ph.D. thesis (
Eindhoven University of Technology
,
2022
).
172.
Y.
Wang
,
J.
Van Engelen
,
V.
Dolores Calzadilla
,
K. A.
Williams
,
M. K.
Smit
, and
Y.
Jiao
, in
23rd European Conference on Integrated Optics
(
Milan
,
2022
), p.
W.P.2
.
173.
S.
Yamaoka
,
N.-P.
Diamantopoulos
,
H.
Nishi
,
R.
Nakao
,
T.
Fujii
,
K.
Takeda
,
T.
Hiraki
,
T.
Tsurugaya
,
S.
Kanazawa
,
H.
Tanobe
,
T.
Kakitsuka
,
T.
Tsuchizawa
,
F.
Koyama
, and
S.
Matsuo
, “
Directly modulated membrane lasers with 108 GHz bandwidth on a high-thermal-conductivity silicon carbide substrate
,”
Nat. Photonics
15
(
1
),
28
35
(
2021
).
174.
T.
Sanjoh
,
N.
Sekine
,
K.
Kato
,
S.
Takagi
, and
M.
Takenaka
, “
Thermal properties of III–V on a SiC platform for photonic integrated circuits
,”
Jpn. J. Appl. Phys.
58
(
SB
),
SBBE06
(
2019
).
175.
M.
Takenaka
and
S.
Takagi
, “
InP-based photonic integrated circuit platform on SiC wafer
,”
Opt. Express
25
(
24
),
29993
(
2017
).
176.
J.
Kim
,
L.
Zhu
,
H. M.
Torun
,
M.
Swaminathan
, and
S. K.
Lim
, “
A PPA study for heterogeneous 3-D IC options: Monolithic, hybrid bonding, and microbumping
,”
IEEE Trans. Very Large Scale Integr. Syst.
32
,
401
412
(
2023
).
177.
V.
Dolores-Calzadilla
,
W.
Yao
,
T.
de Vries
, and
K.
Williams
, in
2019 21st International Conference on Transparent Optical Networks (ICTON)
(
IEEE
,
Angers, France
,
2019
), pp.
1
4
.
178.
R.
Chen
,
M.
Lofrano
,
G.
Mirabelli
,
G.
Sisto
,
S.
Yang
,
A.
Jourdain
,
F.
Schleicher
,
A.
Veloso
,
O.
Zografos
,
P.
Weckx
,
G.
Hiblot
,
G. V. D.
Plas
,
G.
Hellings
,
J.
Ryckaert
, and
E.
Beyne
, in
2022 International Electron Devices Meeting (IEDM)
(
IEEE
,
San Francisco, CA
,
2022
), pp.
23.4.1
23.4.4
.
179.
F.
Zanetto
,
F.
Toso
,
V.
Grimaldi
,
A.
Martinez
,
F.
Morichetti
,
A.
Melloni
,
G.
Ferrari
, and
M.
Sampietro
, in
CLEO 2023
(
Optica Publishing Group
,
San Jose, CA
,
2023
), p.
SW3O.7
.
180.
J.-K.
Park
,
S.
Takagi
, and
M.
Takenaka
, “
InGaAsP Mach–Zehnder interferometer optical modulator monolithically integrated with InGaAs driver MOSFET on a III-V CMOS photonics platform
,”
Opt. Express
26
(
4
),
4842
(
2018
).
181.
R.
Baets
and
A.
Rahim
, “
Heterogeneous integration in silicon photonics: Opportunities and challenges: Opinion
,”
Opt. Mater. Express
13
,
3439
(
2023
).
182.
J. N.
Butt
,
N. F.
Tyndall
,
M. W.
Pruessner
,
K. J.
Walsh
,
B. L.
Miller
,
N. M.
Fahrenkopf
,
A. O.
Antohe
, and
T. H.
Stievater
, “
Optical and geometric parameter extraction across 300-mm photonic integrated circuit wafers
,”
APL Photonics
9
(
1
),
016104
(
2024
).
183.
F.
Ferraro
,
P.
De Heyn
,
M.
Kim
,
N.
Rajasekaran
,
M.
Berciano
,
G.
Muliuk
,
D.
Bode
,
G.
Lepage
,
S.
Janssen
,
R.
Magdziak
,
J.
De Coster
,
H.
Kobbi
,
S.
Lardenois
,
N.
Golshani
,
L.
Shiramin
,
C.
Marchese
,
S.
Rajmohan
,
S.
Nadarajan
,
N.
Singh
,
S.
Radhakrishnan
,
A.
Tsiara
,
P.
Xu
,
A.
Karagoz
,
D.
Yudistira
,
M.
Martire
,
A. H.
Shahar
,
M.
Chakrabarti
,
D.
Velenis
,
W.
Guo
,
A.
Miller
,
K.
Croes
,
S.
Balakrishnan
,
P.
Verheyen
,
Y.
Ban
,
J.
Van Campenhout
, and
P. P.
Absil
,
Proc. SPIE
12429
,
1242909
(
2023
).
184.
C.
Levy
,
Z.
Xuan
,
D.
Huang
,
R.
Kumar
,
J.
Sharma
,
T.
Kim
,
C.
Ma
,
G.-L.
Su
,
S.
Liu
,
J.
Kim
,
X.
Wu
,
G.
Balamurugan
,
H.
Rong
, and
J.
Jaussi
, in
2023 IEEE Custom Integrated Circuits Conference (CICC)
(
IEEE
,
San Antonio, TX
,
2023
), pp.
1
2
.
185.
B.
Ghyselen
,
C.
Navone
,
M.
Martinez
,
L.
Sanchez
,
C.
Lecouvey
,
B.
Montmayeul
,
F.
Servant
,
S.
Maitrejean
, and
I.
Radu
, “
Large-diameter III–V on Si substrates by the smart cut process: The 200 mm InP film on Si substrate example
,”
Phys. Status Solidi A
219
(
4
),
2100543
(
2022
).
186.
B.
Pan
,
J.
Bourderionnet
,
V.
Billault
,
A.
Brignon
,
S.
Dwivedi
,
M.
Dahlem
,
C.
Cummins
,
S. S.
Saseendran
,
N.
Pham
,
P.
Helin
,
N.
Vaissière
,
D.
Néel
,
J.
Ramirez
,
J.
Decobert
,
J.
Rimböck
,
R.
Loi
,
A.
Fecioru
,
E.
Soltanian
,
J.
Zhang
,
B.
Kuyken
, and
G.
Roelkens
, in
2023 Optical Fiber Communications Conference and Exhibition (OFC)
(
IEEE
,
San Diego, CA
,
2023
), pp.
1
3
.
187.
J.
Widiez
,
S.
Sollier
,
T.
Baron
,
M.
Martin
,
G.
Gaudin
,
F.
Mazen
,
F.
Madeira
,
S.
Favier
,
A.
Salaun
,
R.
Alcotte
,
E.
Beche
,
H.
Grampeix
,
C.
Veytizou
, and
J.-S.
Moulet
, “
300 mm InGaAs-on-insulator substrates fabricated using direct wafer bonding and the Smart Cut™ technology
,”
Jpn. J. Appl. Phys.
55
(
4S
),
04EB10
(
2016
).
188.
J.
Justice
,
C.
Bower
,
M.
Meitl
,
M. B.
Mooney
,
M. A.
Gubbins
, and
B.
Corbett
, “
Wafer-scale integration of group III–V lasers on silicon using transfer printing of epitaxial layers
,”
Nat. Photonics
6
(
9
),
610
614
(
2012
).
189.
https://www.inspire-h2020.eu/, for INSPIRE,
2023
.
190.
N.
Li
,
G.
Chen
,
D. K. T.
Ng
,
L. W.
Lim
,
J.
Xue
,
C. P.
Ho
,
Y. H.
Fu
, and
L. Y. T.
Lee
, “
Integrated lasers on silicon at communication wavelength: A progress review
,”
Adv. Opt. Mater.
10
(
23
),
2201008
(
2022
).
191.
S.
Lourdudoss
, “
Heteroepitaxy and selective area heteroepitaxy for silicon photonics
,”
Curr. Opin. Solid State Mater. Sci.
16
(
2
),
91
99
(
2012
).