The unique benefits of Fabry–Pérot resonators as frequency-stable reference cavities and as an efficient interface between atoms and photons make them an indispensable resource for emerging photonic technologies. To bring these performance benefits to next-generation communications, computation, and time-keeping systems, it will be necessary to develop strategies to integrate compact Fabry–Pérot resonators with photonic integrated circuits. In this paper, we demonstrate a novel reflection cancellation circuit that utilizes a numerically optimized multi-port polarization-splitting grating coupler to efficiently interface high-finesse Fabry–Pérot resonators with a silicon photonic circuit. This circuit interface produces a spatial separation of the incident and reflected waves, as required for on-chip Pound–Drever–Hall frequency locking, while also suppressing unwanted back reflections from the Fabry–Pérot resonator. Using inverse design principles, we design and fabricate a polarization-splitting grating coupler that achieves 55% coupling efficiency. This design realizes an insertion loss of 5.8 dB for the circuit interface and more than 9 dB of back reflection suppression, and we demonstrate the versatility of this system by using it to interface several reflective off-chip devices.
I. INTRODUCTION
High-finesse Fabry–Pérot cavities are unmatched in their ability to deliver high frequency stability, quality factors, and power handling, making them indispensable for a range of applications.1–6 To build next-generation quantum communications, computation, and time-keeping systems,7 it will be necessary to bring these performance advantages to compact, integrated platforms.8–10 Using new wafer-scale fabrication techniques, it is now possible to make arrays of high-finesse (>106) Fabry–Pérot resonators11,12 that have been used to create sub-Hz linewidth lasers13 and low-noise oscillators.14 However, to harness these performance advantages in next-generation integrated photonic circuits, we also require strategies to efficiently interface Fabry–Pérot cavities with photonic circuits.7
The optimal strategy for the integration of Fabry–Pérot resonators depends heavily on the intended use case. When a Fabry–Pérot resonator is used as a stable frequency reference for high-performance laser systems and optical clocks, the frequency of the cavity is typically measured using the Pound–Drever–Hall (PDH) locking technique; in this case, laser light reflected from the resonator must be separated from the incident wave and detected with high efficiency to obtain a low noise error signal for feedback stabilization of the laser frequency. Hence, implementation of on-chip PDH locking requires an integration strategy that maps incident and reflected waves to distinct ports of an optical system, permitting direct detection of the reflected wave.7 Ideally, this same photonic interface would also protect the laser from the frequency-destabilizing effects of back-scattered light by suppressing back reflections from the Fabry–Pérot resonator.15 An optical circulator is a natural solution to this problem, as it maps incident and reflected waves to distinct optical ports while offering some protection from back reflection. However, the fabrication of isolators and circulators on photonic chips poses a significant challenge due to the incompatibility of the requisite magneto-optic materials16–19 with CMOS foundries. To address this challenge, a variety of non-magnetic isolators20–22 and circulators23 have been demonstrated, which use time modulation to produce non-reciprocal response. However, since these non-magnetic isolators and circulators are complex and can consume a substantial amount of power, they are not suitable for all applications.
New strategies for passive reflection cancellation could eliminate the need for isolators and circulators in many instances, offering a path to simpler and more power-efficient integrated photonic circuits. One such system that is widely used in free-space optics, colloquially referred to as the poor man’s isolator, uses a quarter-wave plate and a polarizing beam splitter to separate the incident and reflected optical waves. This system, pictured in Fig. 1(a), is frequently used instead of an optical circulator to implement PDH locking since it offers lower losses and smaller back reflections. Hence, photonic circuit implementation of such systems could serve as a practical and efficient interface between Fabry–Pérot cavities and other free-space systems.
(a) Depiction of the traditional setup of a poor man’s isolator mechanism in free space, where PBS denotes a polarizing beam splitter. (b) Illustration of the circuit interface, which is modeled after the poor man’s isolator and incorporates a the Polarization Splitting Grating Coupler (PSGC). PIC: photonic integrated circuits. (c) Schematic of PSGC. Light input from arm 1 will be scattered into p-polarized light in free space, and that from arm 2 will be scattered into s-polarized light in free space. (d) Transfer matrix schematic of the system.
(a) Depiction of the traditional setup of a poor man’s isolator mechanism in free space, where PBS denotes a polarizing beam splitter. (b) Illustration of the circuit interface, which is modeled after the poor man’s isolator and incorporates a the Polarization Splitting Grating Coupler (PSGC). PIC: photonic integrated circuits. (c) Schematic of PSGC. Light input from arm 1 will be scattered into p-polarized light in free space, and that from arm 2 will be scattered into s-polarized light in free space. (d) Transfer matrix schematic of the system.
In this paper, we demonstrate a novel reflection cancellation circuit to efficiently interface high-finesse Fabry–Pérot resonators with a silicon photonic circuit. This system, whose operating principle is modeled after the poor man’s isolator, is comprised of an interferometer that interfaces to two separate ports of an optimized polarization splitting grating coupler (PSGC) device.24–27 Light entering port 1 of the interferometer is reflected from a fiber-coupled Fabry–Pérot resonator before exiting port 2 of the interferometer, yielding spatial separation of the incident and reflected waves as required for on-chip PDH locking. Using inverse design principles28,29 to optimize the 2D grating structure, we demonstrate a peak fiber-to-chip coupling efficiency of 55%, yielding 5.8 dB of loss in a double-pass configuration of the on-chip interface. Interferometric cancellation of reflections produced by this system also yields >9 dB of back-reflection suppression, which could help to protect an on-chip laser source from unwanted back reflections.
Since the degree of back-reflection cancellation was limited only by the imprecision of the splitting ratio of a directional coupler, much higher (>30 dB) back-reflection suppression ratios should be possible with further refinements.
II. SYSTEM CONCEPT
The reflection cancellation circuit that we use to interface a high-finesse Fabry–Pérot resonator with a silicon photonic circuit is illustrated in Fig. 1. The operating principle of the photonic circuit interface [Fig. 1(b)] closely mirrors the free-space implementation of the poor man’s isolator shown in Fig. 1(a). In the free-space implementation [Fig. 1(a)], p-polarized light entering port 1 passes through the Polarizing Beam Splitter (PBS) and is subsequently converted into right-handed circularly polarized light after it traverses the Quarter Wave Plate (QWP). Upon reflection from the Fabry–Pérot resonator, this right-handed circularly polarized wave is converted to a left-handed circularly polarized wave. After traversing the QWP a second time, the left-handed circular polarized wave is converted to an s-polarized wave and is subsequently reflected by the PBS to exit port 2 of the system. Hence, this system protects the laser source from back reflections while yielding spatial separation of the reflected wave as required for on-chip PDH locking. While we use a Fabry–Pérot resonator in this system demonstration, this scheme is applicable to any component with a polarization-independent reflection response.
The circuit implementation of this poor man’s isolator system, as shown in Fig. 1(b), is comprised of a balanced interferometer that incorporates an optimized polarization-splitting grating coupler (PSGC) device. In close analogy to the free-space polarizing beamsplitter, the PSGC maps orthogonally polarized waves into separate output waveguide arms. The 1(2) input arm of the PSGC couples to p-polarized (s-polarized) free-space beams that are emitted perpendicular to the grating coupler [Fig. 1(c)]. Light entering port 1 of this interferometer is split between two waveguides by a 50/50 directional coupler before coupling to the PSGC. Since the directional coupler induces a π/2 phase difference between the two waveguides (each having identical path lengths), right-handed circularly polarized light is emitted from the PSGC. Upon reflection from the Fabry–Pérot resonator (which is assumed to have a polarization-independent reflection response), the incident right-handed circular polarization is converted into a left-handed circular polarized wave before entering the PSGC for a second time. This left-handed circular polarized wave is projected into orthogonal linear polarizations by the PSGC, meaning that the waves exiting the PSGC now have a −π/2 phase difference. This phase difference causes these two reflected waves to combine within the 50/50 directional coupler, such that all of the reflected light exits port 2 of the interferometer. Hence, this circuit interface yields spatial separation of the incident and reflected waves (as required for on-chip PDH locking) while also producing interferometric cancellation of unwanted back-reflections from port 1.
Here, μ and are the splitting coefficients of the directional coupler, ϕ is the phase imbalance between two waveguide segments, α is the coupling coefficient for PSGC, and are the complex reflection coefficients for the external device (e.g., Fabry–Pérot resonator) for s- and p-polarized light.
Using this model, we make some basic observations about this reflection cancellation scheme. Assuming that light is only injected into port 1 (i.e., a2 = 0), we find reflected wave amplitudes and , from the above transfer matrix model. From these expressions, we see that it is possible to null b1 even in cases where . However, through experimental studies, we are interested in the case when the reflection response is identical for both polarizations. Assuming that in the case of 50% power splitting ratio , we see that it is possible to null b1 while directing all of the output light b2 in the case when ϕ = 0. Note, however, that the back-reflection suppression ratio, , is sensitive to the splitting coefficient μ. For example, if μ deviates from by 14% due to fabrication errors, the back-reflection suppression ratio will decrease to 10 dB from perfect cancellation. Hence, tight control of the power splitting ratio is necessary to obtain a high degree of back-reflection cancellation.
III. RESULTS
To realize this circuit interface, we fabricate a silicon photonic circuit from a Silicon-On-Insulator (SOI) wafer having a 250 nm thick silicon layer and a three micron silica layer under cladding. We use e-beam lithography and a reactive-ion etch (etch depth of 80 nm) to define both waveguide and grating structures, as shown in Fig. 2(a). To accurately define the desired structure during e-beam exposure, we implemented proximity effect correction,30 and through dose tests using hydrogen silsesquioxane (HSQ), an e-beam dose of 1050 μC/cm2 yielded the optimal performance. For details of the fabrication process, see Ref. 31. The PSGC device is a key component of this system, as the efficiency of circuit interfaces hinges on the performance of this grating coupler.
(a) Side view: The layered structure of the PSGC is presented, with a single mode optical fiber positioned perpendicularly to the PSGC. Top view: SEM image of the PSGC. The pattern is symmetrical over the white line. (b) FDTD simulation showcases the scattered field 3 µm above the Si device layer, prompted by an incident waveguide mode from the bottom port. (c) Empirical measurement of the coupling efficiency and crosstalk of the PSGC. Efficiency is characterized as the transmission from arm 1 to the fiber, while crosstalk is defined as the transfer from arm 1 to arm 2. (d) Zoom in of the crosstalk data presented in (c). (e) Scatter plot indicating the performance among ten distinct PSGCs fabricated on the same chip.
(a) Side view: The layered structure of the PSGC is presented, with a single mode optical fiber positioned perpendicularly to the PSGC. Top view: SEM image of the PSGC. The pattern is symmetrical over the white line. (b) FDTD simulation showcases the scattered field 3 µm above the Si device layer, prompted by an incident waveguide mode from the bottom port. (c) Empirical measurement of the coupling efficiency and crosstalk of the PSGC. Efficiency is characterized as the transmission from arm 1 to the fiber, while crosstalk is defined as the transfer from arm 1 to arm 2. (d) Zoom in of the crosstalk data presented in (c). (e) Scatter plot indicating the performance among ten distinct PSGCs fabricated on the same chip.
To optimize the efficiency of the PSGC, we employ an inverse design algorithm28 using the LUMOPT package with Lumerical Finite-Difference Time-Domain (FDTD) software.32 Through the design of the grating coupler, the parameter space of numerical optimization is reduced by imposing a mirror symmetry plane, as indicated by the diagonal white line in Fig. 2(b). We modified the LUMOPT package in order to impose such a mirror symmetry. This symmetry plane ensures that the grating coupler produces the same scattering response when excited from either input port. The PSGC structure [shown in Figs. 2(a) and 2(b)] is designed for vertical coupling to SMF-28 optical fiber with a Gaussian beam waist radius of 5.2 µm. Figure 2(b) shows the Finite-Difference Time-Domain (FDTD) simulation of the Gaussian field profile produced by the PSGC device layer when illuminated by a TE-like guided optical mode.
To evaluate the optical performance of the fabricated PSGC structures, a cleaved optical fiber (SMF-28) is vertically aligned with the PSGC to enable fiber-to-chip coupling efficiency and cross-talk measurements. The optical measurements shown in Fig. 2(c) reveal a fiber-to-chip coupling efficiency of 55% (2.6 dB) at a wavelength of 1550 nm over a 23 nm bandwidth. The crosstalk, defined as the direct coupling from arm 1 to arm 2, displays a contrast exceeding 60 dB at 1550 nm. Figure 2(e) shows the measured peak efficiency and 3 dB bandwidth of ten gratings fabricated on the same chip, revealing high efficiency (>50%) and broad operational bandwidth (>20 nm) for the majority of fabricated gratings. Adding reflective elements underneath PSGC will further help to increase efficiency to nearly 100%, avoiding light scattered into the substrate.33
Next, we use this optimized PSGC device to demonstrate the proposed reflection cancellation circuit, and we use this system to interface an off-chip Fabry–Pérot resonator with our circuit. Figure 3(a) shows a schematic of the experimental apparatus that is used to assess the performance of the reflection cancellation circuit. The fiber circulator facilitates the measurement of system reflection, enabling the characterization of the back-reflection suppression ratio. Through these studies, we use a segment of SMF-28 fiber as a fiber umbilical to flexibly interface the grating coupler to different reflective devices. This fiber umbilical contains a polarization controller (PC2) that compensates for any polarization distortion occurring within the fiber. The state of the polarization controller is chosen to ensure that the fiber umbilical produces a Jones matrix of identity (i.e., does not alter the polarization state). Hence, the fiber umbilical is a convenient way to couple to different devices under test (DUT) to evaluate the performance of this circuit interface in various scenarios.
On-chip, poor man’s isolator demonstration. (a) Measurement setup for the characterization of the reflection cancellation circuit. DUT: device under test and PD: photo detector. (b) and (c) Measurement results with fiber mirror (FM) and fiber Bragg grating cavity (FBGC) as DUT. (d) μFP array. (e) Fiber GRIN lens collimator assembled to match μFP cavity mode. (f) Measurement results with fiber-GRIN-µFP as DUT.
On-chip, poor man’s isolator demonstration. (a) Measurement setup for the characterization of the reflection cancellation circuit. DUT: device under test and PD: photo detector. (b) and (c) Measurement results with fiber mirror (FM) and fiber Bragg grating cavity (FBGC) as DUT. (d) μFP array. (e) Fiber GRIN lens collimator assembled to match μFP cavity mode. (f) Measurement results with fiber-GRIN-µFP as DUT.
We begin by using a commercial fiber mirror (FM) as a reference device (Thorlabs P5-SMF28ER-P01-1) to examine the performance of the reflection cancellation circuit. The reflection and transmission responses produced by the fiber mirror are shown in Fig. 3(b). Power transmission from port 1 to port 2, denoted as |S12|2, reveals a signal attenuation of −5.8 dB. Since the light exiting port 2 passes through the grating coupler twice, with 2.6 dB of loss per pass, and the fiber mirror has a typical reflection loss of 0.6 dB, the total transmission loss of 5.8 dB is in good agreement with the anticipated transmission loss of 5.8 dB. Measurements of the reflection response from port 1, denoted as |S11|2, reveal a back-reflection of −14.8 dB from a fiber mirror with near-unity back-reflection efficiency. Since the reflection efficiency, |S11|2, is 9 dB lower than the transmission efficiency, these measurements reveal a back-reflection suppression ratio of 9 dB, validating the operating principle of this reflection cancellation circuit.
Replacing the fiber mirror with a fiber Bragg grating cavity (FBGc), we next examine how the reflection response of this Fabry–Pérot resonator is imprinted on the response of this multi-port system. This FBGc is a commercial fiber Bragg defect cavity (Teraxion C56514-0005) that consists of two fiber-Bragg grating mirrors that support a standing-wave mode. The cavity produces a single resonance at a 1550 nm center wavelength having a linewidth of 85 MHz and a Q-factor of 2.3 × 106. Figure 3(c) displays the reflection, |S11|2, and transmission, |S12|2, measurements produced when this FBGc is coupled to the circuit. We see that the reflection response of the resonator is clearly imprinted on the transmission response, as required for the PDH-locking of a laser to the cavity mode. A transmission efficiency of −5.8 dB is achieved, while the cancellation circuit reduces back-reflection to −15.8 dB, corresponding to a back-reflection suppression ratio of 10 dB.
Next, we couple this circuit to a compact, ultra-high finesse micro-Fabry–Pérot (μFP) resonator that could serve as a chip-integrated frequency reference for future compact optical clock technologies. This μFP cavity [see Fig. 3(d)] is one of an array of air-gap resonators that was created using a wafer-scale reflow fabrication process described in Ref. 11. Through independent cavity ring-down spectroscopy measurements, the μFP of interest was found to have an optical linewidth of 60 kHz and an optical Q-factor of 3.2 × 109. This resonator was designed to support a relatively large Gaussian-beam diameter of 240 µm to reduce the impact of thermal noise imparted by the mirror coating on the cavity mode. As a demonstration of the potential for integration of a μFP cavity with the chip, the 10.4-micron fiber mode was efficiently coupled to the 240 micron resonator mode using a compact (1 × 0.5 mm2) GRIN lens.
During transmission measurements [see Fig. 3(f)], the laser sweeps through the cavity resonance over a time interval that is much shorter than the cavity ringdown time, transforming the resonant response of the cavity into a ringdown response. This-type of ringdown response is due to the interference between energy transiently stored in the cavity and the transmitted laser light.34–37 The transmission response, |S12|2, reveals the ringing cavity response atop a transmission response showing a 7 dB average transmission loss, consistent with a small amount of excess loss produced by fiber-GRIN coupling to the resonator. Back-reflection, |S11|2, of −17 dB shown in Fig. 3(f) corresponds to a back-reflection suppression ratio of 10 dB, demonstrating the suppression of unwanted back-reflections using such reflection cancellation circuits. As discussed in Sec. IV, a higher level of integration could be achieved by eliminating the fiber umbilical and directly bonding the GRIN-cavity assembly to the grating coupler.
Building on these results, higher grating coupler efficiencies and lower optical losses could be realized by creating a highly reflective back-plane underneath PSGC. Moreover, further improvement of the back-reflection suppression ratio could be achieved by using tunable directional couplers and phase shifters, which are readily available in Si photonics foundry processes,38 to tune the parameters of the circuit to obtain a much higher (>30 dB) degree of reflection cancellation.
IV. DISCUSSION AND CONCLUSION
In conclusion, we have demonstrated a circuit interface to efficiently integrate off-chip components with photonic circuits. This circuit interface maps incident and reflected waves to distinct ports of an optical system, permitting direct detection of the reflected wave for PDH locking to the cavity mode.7 The PSGC, a key component of this system, was numerically optimized to realize a peak efficiency of 55% (2.6 dB), enabling an insertion loss as low as 5.8 dB and a back-reflection suppression ratio of >9 dB using this system. The demonstrated back reflection suppression ratio was limited by the imperfection of the splitting ratio of the 50/50 directional coupler. Hence, much higher (>30 dB) back-reflection suppression ratios should be possible with further refinements. For example, the incorporation of a tunable directional coupler and an active phase shifter would not only permit much higher back reflection suppression but would also use such circuit interfaces to efficiently couple to a range of off-chip photonic components.
Looking beyond Fabry–Pérot resonators, such reflection cancellation circuits can also serve as versatile interfaces for many other off-chip systems, such as cavity optomechanical systems, vapor cells, sensors, and quantum atomic systems. Such interfaces also possess the potential for integration within a visible light system, which offers notable advantages for atomic and molecular optics applications. This can be achieved by using a different waveguide material, such as silicon nitride, and redesigning the PSGC. Leveraging inverse design algorithms empowers us to impose constraints on the minimal feature, thus facilitating the design of structures that are both efficient and amenable to fabrication. Furthermore, the reduced index contrast of silicon nitride, compared with silicon, also helps alleviate the feature size concern for visible wavelengths.
Furthermore, we can adapt this system for devices exhibiting polarization-dependent reflection response by substituting the 50/50 directional coupler and balanced passive delay with a tunable coupler and tunable phase shifter. Even when the reflection response is not identical for both polarizations , provided , the reflected wave energy can be directed into port 2, thereby ensuring a null back reflection for port 1. This broadens the scope of its application, extending it to a more general case of diffuse scattering, as is often obtained in applications, such as LIDAR. Note that the cancellation process relies on the presence of two modes in free space, which, in the case above, correspond to two different polarizations. If either or were to be zero, it would result in vanishing |S12|2. While the reflection cancellation scheme that we have demonstrated utilizes two polarizations of light, this same concept can be implemented using only a single polarization, provided that two spatial modes of the same polarization are used to implement reflection cancellation.
While we utilized a fiber umbilical to couple off-chip components through this study, a higher degree of integration could be achieved by directly attaching components to the grating coupler. For example, by attaching a GRIN lens to the PSGC [Fig. 4(a)], a compact μFP of the type used here could be integrated into the system to enable compact new optical clock technologies.7 Moreover, with further computational power, it should be possible to design a PSGC with a larger beam spot size that can directly couple to μFP without the need for a GRIN lens [Fig. 4(b)].
Schematic of co-packaged μFP with PIC. (a) Small PSGC with a GRIN lens to help with mode matching. (b) Numerically optimized large PSGC to match μFP mode directly.
Schematic of co-packaged μFP with PIC. (a) Small PSGC with a GRIN lens to help with mode matching. (b) Numerically optimized large PSGC to match μFP mode directly.
Passive reflection cancellation schemes of the type demonstrated here could eliminate the need for isolators and circulators in many instances, offering a path to simpler and more power-efficient integrated photonic circuits. Hence, this work could pave the way for heterogeneous integration between integrated photonic circuits and high-finesse Fabry–Pérot resonators that are required for next-generation quantum communications, computation, and time-keeping systems.
ACKNOWLEDGMENTS
We thank Freek Ruesink and Shai Gertler for helpful technical discussions. This work was supported by the Defense Advanced Research Projects Agency (DARPA) under Award No. HR0011-22-2-0009, the U.S. Department of Energy (DoE) under Award No. DE-SC0019406, and the National Science Foundation (NSF) under Award No. 2137740. Any opinions, findings, and conclusions or recommendations expressed in this publication are those of the authors and do not necessarily reflect the views of DARPA, DoE, and NSF.
AUTHOR DECLARATIONS
Conflict of Interest
The authors have no conflicts to disclose.
Author Contributions
Haotian Cheng: Conceptualization (equal); Data curation (equal); Formal analysis (equal); Investigation (equal); Methodology (equal); Validation (equal); Visualization (equal); Writing – original draft (equal); Writing – review & editing (equal). Naijun Jin: Conceptualization (supporting). Zhaowei Dai: Conceptualization (supporting). Chao Xiang: Conceptualization (supporting). Joel Guo: Conceptualization (supporting). Yishu Zhou: Conceptualization (supporting). Scott A. Diddams: Conceptualization (supporting); Writing – review & editing (supporting). Franklyn Quinlan: Conceptualization (supporting); Writing – review & editing (supporting). John Bowers: Conceptualization (supporting); Writing – review & editing (supporting). Owen Miller: Conceptualization (supporting); Writing – review & editing (supporting). Peter Rakich: Conceptualization (supporting); Funding acquisition (lead); Project administration (lead); Resources (lead); Writing – original draft (supporting); Writing – review & editing (supporting).
DATA AVAILABILITY
The data that support the findings of this study are available from the corresponding author upon reasonable request.
REFERENCES
Certain equipment, instruments, software, or materials are identified in this paper in order to specify the experimental procedure adequately. Such identification is not intended to imply recommendation or endorsement of any product or service by NIST, nor is it intended to imply that the materials or equipment identified are necessarily the best available for the purpose.