Integrated microwave photonics true-time delay signal processor Open Access

The rapid growth of data volumes in communications, AI training, and cloud computing demands efficient data processing. These data are usually stored as digital electrical information and transmitted as wireless radio frequency (RF) signals. However, modern communication systems and computational electronics may struggle to handle the increasing workload, making it essential to explore alternative processing techniques. Microwave photonics (MWP) systems have emerged as promising solutions to these challenges. These systems harness the unique advantages of optics—such as flexibility, high bandwidth, and low power consumption—to process millimeter-wave signals directly in the optical domain.^1,2 These techniques fit perfectly with the recent revolution in fabrication methods for integrated photonic circuits (PICs), which allow the creation of large, complex systems with exceptional precision.^3–5 This breakthrough has sparked significant interest across a wide range of research areas, including emerging computational paradigms such as quantum^6,7 and neuromorphic computing,^8,9 advanced sensing and spectroscopy systems,^10,11 and the aforementioned optical signal processing technologies.^12,13

Integrated microwave photonic circuits offer flexible, broadband analog solutions that bridge the limitations of digital signal processors (DSPs), currently constrained to a few gigahertz. These circuits are designed to meet the growing demands of modern telecommunications, driven by advancements in Internet of Things, 5G, 6G, and cutting-edge radar systems.^14–16 Many key RF functions have been successfully demonstrated using on-chip photonic signal processors, such as spectral filters,¹⁷ RF phase shifters,^18,19 integrators, differentiators,²⁰ pulse shapers and microwave generation,^21,22 and beamformers,²³ all delivering exceptional performance. However, despite their exceptional performance, most of these circuits are still custom-designed for specific tasks. The future of this field lies in multifunctional integration, combining programmable functions onto a single chip to reduce fabrication costs and accelerate commercial implementation.^24,25

In this work, we propose a scalable design for a photonic signal processor chip based on optical true-time delay (TTD). This device aims to address three major applications of MWP: signal generation, filtering, and beamforming. Our goal is to achieve a simple, universal, and versatile design while maintaining high performance to enhance future telecommunication networks.

In Sec. II, we present the proposed architecture, detailing its general implementation. This section also introduces the fabricated silicon chip used for the practical implementation and provides an explanation of the measurement setup and procedures. Moving forward, in Sec. III, we introduce the first application of the architecture, an ultrafast RF arbitrary waveform generator. Then, in Sec. IV, we demonstrate the second application of the architecture: a programmable filter with variable bandwidth. This section showcases a wide range of filter implementations; all achieved using the same device. In Sec. V, we present the results of the architecture’s final functionality, the beamforming network. In Sec. VI, we analyze the system’s scalability, and finally, in Sec. VII, we summarize the findings and present our conclusions.

True-time delay is a widely used technique in microwave photonics for implementing beamforming networks that are free from beam squint. There are two main approaches to realizing TTD on integrated devices: microring resonators, which offer continuous delays but are sensitive to thermal fluctuations and fabrication errors, and switched delay lines, which are more robust and provide broader bandwidth, although they are limited to a discrete set of delay positions. For our design, we opted for the latter, aiming to maximize the number of achievable delay settings while ensuring high tolerance to deviations and imperfections. The architecture presented in this paper builds upon our recent work,²⁶ which was originally designed as a beamforming network. In that study, we introduced a novel beamformer that minimized the number of delays while maximizing resolution, significantly enhancing resource efficiency compared to previous beamforming networks based on switched true time delay lines. However, despite these advancements, the architecture did not fully meet the increasing demands for multifunctional integration and flexibility. To overcome these limitations, the design proposed in this work retains the high-resolution, ultra-broadband performance of the original beamformer while incorporating additional functionalities—such as filtering and arbitrary waveform generation (AWG)—that were not achievable in the previous design. This is accomplished by incorporating a combined output at the back-end of the structure, formed by multi-mode interferometers (MMIs).

At the front-end of the structure, there is a tunable splitter tree, which depends on the number of total lines, N. This setup allows for customized power distribution to each line, rather than a uniform distribution across all lines, without introducing additional losses. Afterward, connected to each output of the splitter tree, there is a delay line with M delay stages or bits, where the delay values increase exponentially in powers of 2 for each bit with respect to a fundamental delay, U. As a specific case of this architecture, the delay value also scales with the position of the line. For instance, the delay value for the second line is doubled compared to the first line, and for the Nth line, it is multiplied by N. This results in 2^M unique combinations of delays between lines at the output of the final MZI, with the total delay between antennas given by ΔT = BU, where B is the selected bit word ranging from 0 to (2^M − 1).

The final MZI manages the switch between the two distinct outputs of the architecture: the beamformer and the combined output. While the combined output simply transfers the original delays achieved in the device’s core to the common combiner formed by MMIs, the waveguide of the beamformer output introduces an additional delay depending on the line position, given by ɛ_n = (N − n)2^(M−1)U. This adjusts the range of delays between antennas while preserving all combinations, shifting the value of ΔT from [0, (2^M − 1)U] to [−2^M−1U, (2^M−1 − 1)U]. This adjustment allows the beamformer to aim without beam squint effects across both positive and negative angles, maintaining constant delays between antennas in both directions of the array while maximizing the number of delay stages to achieve the highest possible resolution.

For the experimental demonstration, we included four delay lines, each with two delay stages (2 bits of resolution), fed by a tunable splitter tree, with outputs connected using a fixed combiner consisting of three 2 × 1 MMIs. The fundamental delay, U, was designed to be 10 ps, slightly larger than the width of the pulse-shaped laser available in our laboratory, which was intended for measuring the AWG. This consideration is crucial to prevent the laser pulses from overlapping at the combiner. For this measurement, we used high-speed fiber-pulsed source that produced a train of Gaussian pulses with a width of 4.4 ps and a repetition frequency of 5 GHz. The repetition rate was chosen to be sufficiently low to ensure that there is no overlap between pulses at the chip’s output.

We designed a photonic integrated circuit that was manufactured by Advanced Micro Foundry on a Silicon on Insulator platform. The layout and a micrograph of the chip are presented in Fig. 2. The chip was produced using an SOI wafer with a 220 nm slab thickness, with 500 nm single-mode waveguides that were defined through deep ultraviolet lithography (193 nm). For the sections containing phase shifters, a thin heater layer of 120 nm TiN was deposited over the waveguide giving as a result MZIs with a measured power consumption of only 1.35 mW/π. The thermo-optic phase shifters were controlled electronically using Qontrol programmable power sources, managed via a software.

The optical input and output of the chip were achieved through vertical coupling using grating couplers, with coupling losses of 3 dB. These losses were normalized during the measurements, isolating propagation and insertion losses as the primary loss mechanisms within the chip. The propagation losses were ∼1 dB/cm, while the insertion losses for each MZI were around 0.4 dB.

Ultrafast optical and radio frequency waveforms with bandwidths reaching tens to hundreds of gigahertz have potential applications in numerous fields, including high-speed optical communications, radar, microwave imaging, and instrumentation test measurements.²⁹ However, generating high-frequency (e.g., 20–80 GHz) and ultrabroad-bandwidth arbitrary waveforms through electronic means is challenging due to the limitations of digital-to-analog converter technology and significant timing jitter.^30,31 Because of that, AWG has become a focal area in microwave photonics due to the ability of optical techniques to produce high-frequency and large-bandwidth signals. The most common methods for generating arbitrary waveforms in photonics rely on bulky frequency-to-time mapping techniques. This process involves adjusting a broadband source using a spectral filter and then passing the broadband signal through a dispersive element. In the dispersive element, different wavelengths are delayed relative to each other, resulting in their arrival at a photodetector at different times, thus creating the desired waveform.^21,32

Here, we demonstrate a compact device capable of generating arbitrary waveforms using a temporal pulse shaping system synthesized in the time domain. This approach eliminates the need for external dispersive elements while keeping control over both the shape and frequency of the generated waveform. This is achieved by generating delayed and scaled replicas of short input optical pulses in the optical domain, with each replica experiencing a different time delay. Through precise programming, we ensure that the four output pulses are evenly spaced in time with delays of U, 2U, or 3U, depending on the bit configuration shown in Table I. Finally, the delayed pulses from all the lines are combined at the common output, generating various RF wavepackets. The splitter tree enables the application of different weights, facilitating the creation of complex waveforms.

Figure 3 depicts the two measurement schemes used in this work. Figure 3(a) provides details of the AWG measurement setup. For the 4.4 ps pulse generation, we used a high-speed fiber laser (Calmar Optcom PSL-10-6T), while the time response was measured using the optical sampling module of our Digital Serial Analyzer Sampling Oscilloscope (DSA8200), which supports measurements up to 100 GHz. Time delay and transmission measurements for filter characterization in the following sections were performed using a Vector Network Analyzer (VNA) Agilent N4373C, paired with a Lightwave component module for measurements up to 50 GHz, as shown in Fig. 3(b). This module integrates an optical modulator and photodetector, enabling direct electrical-to-optical upconversion within a single device.

First, we characterized the processor by precisely controlling the optical coupling of all the MZIs in the design with respect to the applied electrical power. After completing the MZI characterization, we proceeded with delay measurements using the VNA to verify that all delays were accurately implemented. Figure 4(a) presents the results obtained from measuring the RF transmission, phase, and time responses. The time and delay measurements were highly satisfactory, aligning perfectly with the theoretical predictions. The RF transmission spectra exhibit some noise, which may be attributed to the finite extinction ratio of the MZIs, thermal crosstalk, and electrical variations caused by the use of multi-contact probes. However, these variations are relatively minor, remaining within 1 dB and are expected to improve significantly in fully packaged devices. On the other hand, the losses progressively increase from one line to the next due to propagation losses, which are inherent and unavoidable. This effect, however, was accounted for and mitigated using the tunable splitter tree, which compensates for the higher losses by distributing more optical power to the affected lines.

In our proof-of-concept design, the total number of delay combinations is four, as summarized in Table I. The first bit word is not relevant for this application, as the lack of delay between pulse replicas causes them to arrive simultaneously at the combiner, avoiding any waveform generation.

Figure 4(b) displays the measured optical waveform on our chip before photodetection. The separation between the peaks is inversely related to the resulting radio frequency signal generated on a high-speed photodetector. Using our fabricated device, we can produce optical replicas with three distinct separations, corresponding to generated RF center frequencies of 33, 50, and 100 GHz, depending on the selected bit word: (11), (10), and (01), respectively.

Microwave filters are crucial components in RF links and are among the applications that benefit most from photonic integration, as photonics enhances these systems through RF-to-optical frequency upconversion and flexible optical-domain filtering. Recent advancements in integrated optics present significant opportunities for innovative filter designs, including both infinite impulse response (IIR) and finite impulse response (FIR) filters, each offering distinct characteristics that make them well-suited for specific performance requirements and applications.³³ 

Thanks to the flexible splitter tree at the system’s front end, we can select between different feeding modes, simultaneously driving two, three, or all four lines, enabling a wide variety of filter shapes and bandwidth combinations. When using only two lines, up to 12 distinct intertap delays can be configured, ranging from U to 12U. This flexibility arises because the only constraint is the maximum achievable delay between the two taps, a far less restrictive condition than in larger filters with three or four taps. In those cases, maintaining a constant delay between repetitions becomes crucial, significantly limiting the number of possible combinations. For example, to achieve an intertap delay of 12U with two taps, we simply split the signal between a zero-delay line and the fourth line, which provides the maximum delay of 4U + 8U.

Consequently, for two taps, the free spectral range varies, resulting in a tunable notch filter with an FSR ranging from 100 GHz when ΔT = U to 8.3 GHz when ΔT = 12U. Figure 5 shows all the different filter combinations of two taps.

Similarly, by feeding three lines, we obtain an additional tap for the filter. In this configuration, there are only four possible delay combinations, ranging from ΔT = U to ΔT = 4U. As a result, the filter’s response transitions from a notch filter to a typical transverse filter, characterized by a variable bandwidth. In particular, we measured 3 dB bandwidths of 32.1, 14.8, 8.9, and 8.45 GHz, corresponding to FSRs of 100, 50, 33.3, and 25 GHz, respectively. The results from the measurements are shown in Fig. 6.

Finally, all lines can be used simultaneously, resulting in three possible intertap delays while maintaining uniform spacing, as shown in Table I. This results in narrower filter bandwidths while preserving the same FSR. Figure 7 depicts the results for the four-tap measured filters.

Table II presents a comparison between simulation and measurement for key multi-tap filter parameters. In particular, we analyze the average error and deviation for the notch positions, 3 dB bandwidth, and Main Lobe to Secondary Lobe Ratio (MLSLR) across all filters, categorized by their tap count. Notch deviations remain below 1 GHz, indicating a strong similarity between the measured and ideal filter responses, although higher-order filters exhibit more discrepancies. The 3 dB bandwidth relative error increases at lower tap due to inaccuracies in synthesizing narrower filters, but in all cases, the error remains below 10%. Furthermore, the deviation of less than 2 dB in the MLSR of the higher-order filters reinforces the notion of solid results.

In addition, the tunable splitter tree at the input of the architecture allows for flexible distribution of optical power across all the lines. This capability enables the implementation of window functions, a common tool in signal processing, within the synthesized filters. By applying them, we can enhance the MLSR of the filter, as illustrated in Fig. 8. However, this improvement comes with a slight trade-off, as it increases the bandwidth of the low-pass band.

It is straightforward to observe that for identical coupling configurations of the MZIs across different lines, the only distinction in their transfer functions lies in their FSR, associated with the value of the smallest delay in the line, given by FSR = 1/(NU). The common phase can be ignored because it will be absorbed by the photodetector, simplifying the analysis. The transfer function of the MZIs from Eq. (1) can be simplified to that of a tunable coupler using the relations, $sinΔϕm/2=1−κm$ and $cosΔϕm/2=κm$⁠, depending only on the coupling coefficient κ.

This concept is illustrated in the upper part of Fig. 9, which also demonstrates the implementation of one of these lattice filters in the fourth line of our device. In addition, the figure presents measurement results using the same set of coupling coefficients applied across all the lines, demonstrating that while the filter shape remains consistent, the FSR varies.

The final demonstrated application is the operation of the device as an optical beamforming network. This functionality was extensively covered in our previous work;²⁶ therefore, additional compensation delays were omitted in this design to optimize space in the proof-of-concept device. Instead, we prioritized demonstrating the other applications, as the added waveguide length used for beam reorientation does not introduce measurement challenges or affect the results. Thus, for beam reconstruction, we assume the presence of additional delays, as described in Sec. II.

Figure 10 shows the beampatterns for a range of frequencies from 7 to 16.5 GHz. Each one of the four subgraphs represents a different delay combination, with delays between lines ranging from −1U to 2U, using the first line as the time reference. These values are determined by the bit configuration shown in Table I, along with the additional delay applied to each line in the beamforming setup. The color scheme matches the delays displayed in Fig. 4(a), to which we have added the additional delay contribution. The blue beam patterns correspond to the maximum delay of 2U, resulting in the largest pointing angle. Next, the violet lines represent a delay of 1U, followed by the purple lines, which depict the broadside pointing angles when all lines share the same time delay. Finally, the red curves correspond to a time delay of −1U. Since the array consists of only four antennas, operating at lower frequencies is not recommended, as the beam width increases, reducing the array’s directivity. On the other hand, operating at frequencies higher than 16.5 GHz is also not recommended, as it may lead to the emergence of undesired radiation lobes at the largest pointing angles.

A key advantage of this architecture is its scalability; the number of possible filter configurations, beam steering angles, and synthesized RF frequencies with the AWG depends solely on the number of delay stages in the lines and grows exponentially as 2^M. This rapid increase is highly beneficial, as it allows a significant expansion in possible configurations across all applications with minimal additional resources in design and space for extra delay stages. However, scaling this system comes with challenges, with losses being the most limiting factor. These losses depend on the number of lines, the number of delay stages, and the length of the basic delay unit. To address this, we conducted a scalability study considering the maximum losses observed in the system, specifically, the losses experienced by light traveling through the Nth line while undergoing the maximum possible delay.

For this study, we assumed a design with a basic unit delay of 5 ps, which represents an intermediate point between the 10 ps used in this proof of concept and the sub-picosecond delays typically used in some beamformer designs. This choice aims to strike a balance between different applications of the architecture: those requiring shorter delays, such as high-frequency beamforming networks, and those operating with longer delays, such as the AWG, depending on the characteristics of the Gaussian pulse used. Regarding the fabrication platform, despite the advantages of SOI due to its CMOS compatibility, it still exhibits high propagation losses, which can be significant in large-scale designs. Therefore, we have considered propagation losses from alternative fabrication platforms, such as Si₃N₄, where losses below 0.001 dB/cm have been reported,³⁶ significantly lower than the 1 dB/cm typically found in SOI. However, extensive research efforts are currently focused on drastically reducing propagation losses in SOI delay lines, showing promising results that could make SOI a highly relevant option in the near future.³⁷ For this simulation, we have assumed an intermediate value of 0.03 dB/cm, based on the TriPleX fabrication platform, which is a well-established and mature technology.³⁸  Figure 11 presents the total losses results from this study.

The results show that losses increase rapidly as delay stages are added, due to the exponential growth of path lengths, especially as the number of lines in the system increases, leading to significant propagation losses. However, with 8 delay stages, the losses are around −15 dB, a very reasonable value for microwave links and comparable with similar studies in the literature. These losses can be mitigated through amplification, while maintaining a total of 256 delay combinations. This substantial number of combinations highlights that, despite some inherent losses, the benefits of the system outweigh the drawbacks. It is also important to note that this study does not incorporate the latest state-of-the-art parameters, which could further enhance these results and potentially enable a higher level of on-chip integration in the future.

In this paper, we have demonstrated a multifunctional and programmable architecture that operates as an arbitrary waveform generator, a tunable filter with adjustable bandwidth, and a broadband RF beamforming network. These functionalities were successfully demonstrated on a fabricated silicon chip, achieving RF signal generation with various waveforms up to 100 GHz, a reconfigurable filter capable of operating as either a notch or bandpass filter with a wide range of FSRs and bandwidths, and broadband optical beamforming from 7 to 16.5 GHz with a scanning range from −35° to 18°.

The results obtained are very satisfactory given the size of the test sample; however, the design is easily scalable by incorporating additional delay stages or lines, significantly expanding the range of achievable configurations across all functionalities while maintaining a small footprint. This opens the door to potential implementation in future base stations or wireless communication systems, contributing to the advancement of next-generation communications.

The authors acknowledge the financial support from Huawei under Contract No. YB20200065124.

The authors have no conflicts to disclose.

Pablo Martínez-Carrasco Romero: Conceptualization (lead); Formal analysis (lead); Investigation (lead); Methodology (lead); Software (lead); Writing – original draft (lead). Tan Huy-Ho: Project administration (equal); Supervision (equal); Validation (equal); Writing – review & editing (equal). José Capmany Francoy: Conceptualization (lead); Funding acquisition (lead); Methodology (lead); Project administration (equal); Supervision (lead); Validation (lead); Writing – review & editing (lead).

The data that support the findings of this study are available from the corresponding author upon reasonable request.