CMOS-compatible high-speed endless automatic polarization controller

Automatic polarization controllers find broad applications in various fields, including optical communication, quantum optics, optical sensing, and biomedicine. Currently, the predominant integrated automatic polarization controllers employ either lithium niobate or silicon platforms. Devices based on lithium niobate platforms exhibit excellent performance; however, their fabrication complexity hinders widespread commercial deployment. In contrast, silicon-based integrated automatic polarization controllers benefit from complementary metal–oxide–semiconductor compatibility and reduced fabrication costs. Nevertheless, these silicon automatic polarization controllers suffer from low tracking speeds, peaking at merely 1.256 krad/s. In this study, we demonstrated a silicon high-speed automatic polarization controller, incorporating innovative thermal tuning units combined with a sophisticated control algorithm. The response time of these thermal tuning units has been markedly decreased to 3.2 μ s. In addition, we have implemented a novel automatic polarization control algorithm, utilizing gradient descent techniques, on a field-programmable gate array control board. The synergy of the rapid thermal tuning unit and the advanced control algorithm has enabled us to attain an unprecedented polarization control speed of up to 20 krad/s, with this rate being solely limited by the capabilities of our characterization equipment. To our knowledge, this speed is the fastest yet reported for a silicon-based integrated automatic polarization control chip. The proposed device represents a significant breakthrough in the field of silicon-based automatic polarization controllers, paving the way for the future integration of additional polarization management devices. Such an advancement would mark a substantial leap in the realm of integrated photonics, bridging the gap between performance efficiency, cost-effectiveness, and technological integration.


I. INTRODUCTION
][3][4][5][6][7] Automatic polarization control (APC) devices, capable of swiftly and precisely managing the polarization state of light, have become indispensable in various domains.For instance, in optical fiber communication, APC devices are employed to track and stabilize the SOP of light.3][14] Traditionally, fiber-based APCs have relied on components such as fiber squeezers, 15 lithium niobate crystals, 16 and liquid crystals, 17,18 which are bulky and power-hungry.With the rapid evolution of integrated photonics, the shift toward integrated APCs has become increasingly pronounced.][25][26] TFLN-APCs leverage the ultrafast electro-optical response speed APL Photon.9, 066116 (2024); doi: 10.1063/5.0198227 9, 066116-1 © Author(s) 2024 ARTICLE pubs.aip.org/aip/app of the lithium niobate platform, achieving tracking speeds as high as 100 krad/s. 27Despite these advantages, the intricate fabrication process and substantial costs associated with TFLN-APCs pose significant barriers to their widespread adoption.Meanwhile, the DC bias effect of TFLN can affect the long-term stable operation ability of the device. 28Conversely, silicon-based APCs offer the benefits of lower cost and complementary metal-oxide-semiconductor (CMOS) compatibility. 29Unfortunately, their functionality is often hampered by limitations in thermal tuning speed, or the control algorithms employed, resulting in suboptimal tracking speeds, with the fastest reported tracking speed of 1.256 krad/s based on the experimental results. 30If one can enhance the polarization tracking speed of the silicon-based APC, thanks to its compatibility with CMOS technology and ease of integration with electrical control chips on a single chip, the silicon-based APC holds a more expansive developmental prospect compared to the TFLN-APC.Therefore, there exists a significant demand for a siliconbased APC that not only harnesses the intrinsic advantages of the silicon platform but also achieves rapid polarization tracking speed.
In this study, we present a high-speed, silicon-based APC that is fully compatible with CMOS technology.To enhance the polarization tracking speed of the APC, we implemented innovative designs in both the thermal tuning unit's speed and the automatic polarization control algorithm.First, we introduced a novel side-integrated metal heater structure that significantly improved the tuning speed by optimizing the relative position of the heater and the silicon waveguide.Second, we implemented a gradient descent automatic polarization control algorithm on a field-programmable gate array (FPGA), achieving endless automatic polarization control through circuit configuration optimization.As a result of these strategic advancements, our APC demonstrates the capability to stably perform polarization tracking at a scrambling rate of 20 krad/s.This rate is, to the best of our knowledge, the fastest yet recorded for a silicon-based integrated APC.This achievement not only represents a crucial leap in the technological capabilities of APCs but also signifies a crucial step forward in the journey toward the full integration of polarization management devices within silicon platforms.

II. OPERATION PRINCIPLE OF THE SILICON-BASED INTEGRATED APC
The architecture of on-chip integrated APCs primarily encompasses two fundamental components: a polarization separation rotator (PSR) and a series of cascaded Mach-Zehnder interferometers (MZIs) equipped with thermal phase shifters (TPSs).The PSR separates the transverse electric (TE) and transverse magnetic (TM) components of the input light and guides them into the corresponding silicon waveguide as TE mode transmission.Typically, a configuration comprising at least two cascaded MZIs suffices to fulfill the essential functionality of polarization control. 31,32he cascade MZIs consist of two TPSs and two 2 × 2 3 dB couplers.The Jones matrix of the cascade MZIs in the APC can be expressed as the following equation: where [Ex Ey] T is the Jones vector of the input light from PSR and φ 1 and φ 2 are the phase delays of the two TPSs.The result of the feedback port of MZI can be calculated as the following equation: when or According to Eq. ( 3), the handling of input light with an arbitrary SOP involves precise manipulation of the phase shifts in the two TPSs situated on the cascaded MZIs.This manipulation is aimed at achieving a condition where the optical power at the feedback end is nullified (EFB = 0), thereby ensuring that the entirety of the input optical power is directed to the output end (E OUT ).The optical power at the feedback port is monitored through a photodetector (PD), and the voltage applied to the TPSs is adjusted in real time to maintain EFB at its minimal state.Through this dynamic adjustment process, the APC ensures that the total power of the input light, irrespective of its SOP, is effectively transferred to the output port.In this way, the total power of the input light with an arbitrary SOP will be transferred to the output port, thereby accomplishing the polarization tracking and locking functions of APC.Despite the efficacy of the described APC mechanism, a notable limitation arises due to the constrained voltage variation range applicable to the TPSs.As the input SOP undergoes continuous alterations, the driving voltage applied to the TPSs may occasionally surpass its permissible limit.When this occurs, a reset process becomes imperative, leading to a temporary mismatch in the SOP and, consequently, an interruption in data transmission.
To mitigate this issue, our design incorporates additional cascaded MZIs equipped with TPSs.This expanded configuration enables alternating control and resetting of the TPSs that have reached their operational boundaries.By doing so, the system can maintain continuous polarization control, effectively circumventing the limitations imposed by voltage restrictions on TPSs.In our design, we utilize a four-stage cascaded MZIs setup, each stage featuring its own TPS.This arrangement significantly enhances the system's capability for endless polarization tracking. 33,34By distributing the polarization control and reset functions across multiple stages, the APC can continuously adapt to changes in the SOP without encountering the interruptions typically associated with TPS voltage limitations.This advancement marks a critical improvement in the design and functionality of APC systems, particularly in applications requiring uninterrupted polarization control.
Based on the analysis provided, the schematic image of the silicon-based integrated APC that we have developed is shown in Fig. 1(a).In our design, for more convenient fabrication and performance testing, a dual polarization grating coupler (2DGC) is employed at the input port, effectively substituting the PSR.The 2DGC is designed to receive light with an arbitrary SOP at the input port and to split this light into two independent TE mode paths, in accordance with the input SOP. 35More importantly, in our research, we have implemented an innovative side-integrated TPS structure, as shown in Fig. 1(b).This design diverges from conventional methodologies, where the heater is typically situated directly atop the silicon waveguide.In traditional structures, to mitigate the heater's optical field loss, a thick silica interlayer is often employed, albeit at the expense of reduced thermal tuning speed and efficiency. 36,37L Photon.9, 066116 (2024); doi: 10.1063/5.0198227 9, 066116-3 © Author(s) 2024

ARTICLE pubs.aip.org/aip/app
In our novel approach, we eliminated the silica interlayer and positioned the TPS laterally adjacent to the silicon waveguide.This strategic placement enables us to fine-tune the TPS's response speed and its excess absorption loss on the optical field by adjusting the gap between the TPS and the waveguide (denoted as Wgap).Utilizing the finite element method (FEM) for comprehensive simulation, we optimized the location of the microheater.Our calculations included the electric field distribution and thermal field distribution of the novel TPS structure, as shown in Figs.2(a) and 2(b).Consequently, we established an optimal Wgap of 0.5 μm, resulting in an optical field loss of ∼0.001 dB/μm and a measured TPS response time of 1.32 μs based on the simulation.In addition, the dimensions of the Ti microheater were set to 0.475 μm in width and 0.1 μm in thickness, achieving a balance that maximizes the TPS's response speed without exceeding our acceptable loss threshold, but this structure will lead to an increase in power consumption due to nonuniform heating.

III. DEVICE FABRICATION
The silicon APC was fabricated on a commercial silicon-oninsulator (SOI) chip with a top silicon layer of 250 nm, a buried oxide layer of 1 μm, and a 535 μm thick silicon substrate layer.Passive silicon waveguides were patterned using electron beam lithography (E-Beam Writer JBX-9500FSZ) and etched by an inductively coupled plasma silicon etching system (ICP).The silicon dioxide regions were grown by using plasma enhanced chemical vapor deposition (PECVD).After the surface was planarized using chemical mechanical polishing (CMP), the remaining silicon dioxide was thinned to zero thickness by ICP.Finally, the Au contact and Ti adhesion layers were defined through another electron beam lithography, metal deposition, and lift-off processes, consequently.

A. The characterization of the passive components
In order to verify the effectiveness of the structure we designed, we first fabricated specialized test structures for 2DGC and MZI with TPS.In terms of 2DGC, our primary concern lies with its insertion loss and polarization-dependent loss (PDL).The 2DGC's insertion loss constitutes a significant part of the APC's insertion loss, and 2DGC's PDL directly affects the stability of the APC output light power.Figure 3(a) shows a schematic diagram of the test structure for 2DGC.Broadband light around 1550 nm, after passing through a polarizer and polarization controller, is coupled vertically into 2DGC with a coupling angle of 14 ○ .This configuration allows for observing changes in output optical power from ports 1 and 2 corresponding to alterations in the input polarization state.When the ARTICLE pubs.aip.org/aip/appoptical power of port 1 is maximized, it indicates the predominant TE polarization of the input light, leading to its direct output from port 1.In contrast, maximized optical power at port 2 primarily suggests TM-polarized input light, converted to TE mode and output from port 2. We analyzed the transmission spectra from both ports when the optical power was maximized, as shown in Fig. 3(c).At 1532.5 nm, the transmission loss at both the ports is equal to −19.7 dB, showing minimal polarization-dependent loss (PDL).However, at 1550 nm, the PDL rises to 12.57 dB, indicating the need for further optimization in the PDL of 2DGC.
As shown in Fig. 3(b), the test structure for the MZI incorporates an additional geometry of 20 μm in the upper arm.Broadspectrum light near 1550 nm is inputted from test gate 1, and the resulting cyclical MZI response spectrum is captured at output 1 ′ .To assess the accuracy and efficacy of our MZI design, we compared the test values of the free spectral range (FSR) of the MZI response spectrum to both theoretical and simulation values.This comparison serves as a crucial metric for verifying whether the actual performance of our MZI structure aligns with our initial expectations and design objectives.The theoretical value of MZI structure's FSR is calculated using the following formula: Among them, n eff is the effective refractive rate of the coupling area, L is the length of the coupling area, and the theoretically calculated value of the FSR of the MZI structure and the finite difference time domain method (FDTD) simulation value are 26.2 and 28.67 nm, respectively.In addition, the transmission spectrum of the tested MZI structures, as shown in Fig. 3(d), reveals that the test value of the FSR is 27.26 nm.This empirical value closely aligns with both the simulated and theoretical values, thereby confirming that the design of the MZI structure meets our specified requirements.Moreover, using the test structure, we successfully characterized the half-wave voltage (Vπ) for the TPS, as shown in Fig. 3(e).This was achieved by incrementally increasing the power applied to the TPS and observing the resultant shifts in the transmission spectrum of the device.Based on our measurements, we determined that the loaded power is ∼25.3 mW, and the corresponding Vπ is around 10.5 V.These values are critical for characterizing the performance and behavior of the TPS.By measuring these parameters, we can clearly understand the modulation efficiency of TPS and evaluate the energy consumption required for our automatic polarization control circuit.

B. Dynamic characterization of the silicon APC
Next, we proceeded to perform dynamic response testing on the newly developed TPS to obtain the response time of TPS, which is an important factor determining the tracking speed of APC.The experiment setup for this dynamic test is shown in Fig. 4 introduced into port 1 of the test device.To dynamically test the TPS, we employed an arbitrary waveform generator (AWG) to apply a steep square-wave signal at a fixed frequency of 50 kHz onto the TPS contact pads.The amplitude of this signal was varied within the range of 0 to Vπ.This variation in the signal amplitude was designed to induce periodic changes in the light intensity at the output of the testing device.To measure the dynamic response of the TPS, we converted the light intensity change signal from plot 1 ′ into an electrical signal using a high-speed PD.This signal was then relayed to an oscilloscope for real-time monitoring.By analyzing the variations in light intensity at plot 1 ′ , we determined the response time of the TPS. Figure 4(c) shows that under a 50 kHz square-wave signal, the TPS's fall response time (from 100% to 10%) is 4.7 μs and the rise response time (from 0% to 90%) is 3.2 μs.These findings are in close agreement with our prior simulation results.Notably, the response speed of our novel TPS structure shows a significant improvement, approximately one order of magnitude faster than traditional metal microheaters.

C. Polarization tracking algorithm
Improving the polarization tracking speed of an APC extends beyond merely enhancing the thermal tuning speed of the TPS.The polarization control algorithm emerges as a vital factor influencing the APC's tracking speed.An efficient algorithm can substantially refine the iteration process within an FPGA, thereby reducing the duration needed to align with the targeted SOP.This reduction in iteration time and improved algorithmic efficiency are key to substantially increasing the polarization tracking speed of the APC.
The gradient descent algorithm, a well-established method in the realm of automatic polarization control, has been selected as our preferred approach for improving the tracking speed. 38As Fig. 5 shows, the timing logic of the algorithm we adopt is that four phase modulation units work in a linear direction sequentially, and within the working cycle of each phase modulation unit, there are four states, namely, as follows: 1. receiving the sampling result and adjusting the control voltage change by a fixed step size θ; 2. DAC output; 3. receiving the sampling results again and comparing them with the previous results to determine the direction of change; 4. DAC output.All the above-mentioned processes were carried out at each stage of the phase modulation unit (i.e., φ 1 , φ 2 , φ 3 , and φ 4 ).The redundant design was adopted to minimize the occurrence of reset phenomena.
Considering the adjustable step size automatic polarization control algorithm requiring ultra-high sensitivity PD to adopt corresponding step sizes based on different feedback light intensities, we have chosen this fixed step gradient descent algorithm, which typically enables us to achieve fast convergence within 30 iterations to ensure high-speed polarization tracking.Ultimately, we developed a reset-free polarization control algorithm for continuous polarization tracking.

D. Polarization tracking performance testing based on silicon-based APC
Next, we test the polarization tracking performance of the silicon APC based on the novel TPS and the optimized algorithm.The test setup, as shown in Fig. 6(a), involves a tunable laser emitting continuous light at 1550 nm.A polarization scrambler introduces disturbances to the input SOP of the light, testing the APC's polarization tracking capability.An erbium-doped fiber amplifier (EDFA) amplifies the scrambled light, compensating for the device's insertion loss.The optical power of the output waveguide is detected by a PD and converted into an electrical signal, which is fed into an FPGA.This FPGA, programmed with a gradient descent automatic polarization control algorithm, adjusts the voltage on the four TPSs to minimize the feedback optical power and maximize output light power.
We employed two commercial polarization scrambling devices to evaluate our APC's polarization tracking performance.The first device offers a variable polarization scrambling speed of up to 20 krad/s, while the second provides a fixed speed of 70 krad/s.We used a polarization analyzer to record the SOP of light before and after passing through APC, clearly demonstrating the excellent polarization tracking performance of APC.In addition, we varied the polarization scrambling rate and recorded the normalized intensity of the feedback optical power over an hour using an oscilloscope.The relative intensity error (RIE) and its complementary cumulative distribution function [1-F(RIE)] were used to quantify the unlock degree of feedback light, as shown in Fig. 6(b).Each curve in the figure represents 1-F(RIE) of RIE under a specific SOP scrambling rate over 1 h.The leftmost and rightmost curves serve as reference measurements, with the former representing results without the scrambler and the latter showing results at a scrambling speed of 70 krad/s without APC.Figure 6(c) shows the relationship between the maximum and mean RIE and the polarization scrambling speed.At 20 krad/s, the RIE remains below 0.21 for 99% of the time, with a maximum of 0.45.However, at 70 krad/s, the worst that RIE reaches is 0.92, indicating a complete loss of lock by the APC.An RIE greater than 0.5 suggests that the APC is unlocked, and our results indicate that the APC can stably handle a maximum polarization scrambling speed of ∼20 krad/s.Upon further analytical testing, we found that our device can operate at a polarization scrambling speed of 20 krad/s with a relatively stable performance for up to 10 h.To our knowledge, this is the highest tracking speed achieved on an integrated silicon platform to date.

V. DISCUSSION
In this section, we conducted a comparative analysis of key parameters from various reported integrated APCs, as summarized in Table I.The data presented were either directly sourced from the referenced literature or calculated using the parameters provided therein.
It is evident that APCs based on lithium niobate platforms typically exhibit superior response speeds in their phase modulation units compared to those based on silicon, owing to their inherent material advantages.However, our novel TPS structure has significantly enhanced the response speed, outperforming other silicon-based APCs by an order of magnitude.This advancement effectively narrows the performance gap with lithium niobate-based APCs.In terms of APC tracking speed, our silicon-based APC not only leads among its silicon counterparts but also surpasses some lithium niobate-based APCs.
Another critical parameter is Vπ, indicative of the APC's power consumption level.For our proposed APC, there is substantial scope for optimization in this aspect.By refining the TPS design to reduce the resistance, we aim to further reduce power consumption while retaining the same response speed, thereby enhancing thermal tuning efficiency.
However, our analysis also reveals the potential for further improvement in our APC.Notably, more than 1% of the time, the RIE value exceeds 0.1 even without polarization scrambling.This suggests that factors other than polarization scrambling, possibly including the influence of the 2DGC and its PDL, are affecting the APC performance.The presence of relatively large PDL in 2DGC causes fluctuations in the total optical intensity at the output, and  In order to avoid the unexpected large PDL introduced by the fabrication errors of 2DGC, we plan to implement a butting coupling method with a low loss spot size converter between the silicon waveguide and single-mode fiber.This method, combined with PSR, aims to replace the 2DGC, potentially reducing the device's PDL and significantly reducing insertion losses.Moreover, we intend to optimize the structural parameters of the thermal phase modulation unit to decrease TPS power consumption.This will also reduce the FPGA's voltage requirements, contributing to further advancements in the polarization tracking speed of the APC.It should be noted that the half-wave voltage (Vπ) of the proposed APC is relatively high, which is mainly attributed to the high resistance of the TPS.To lower Vπ, one can either increase the width and the thickness of the thermal phase modulation electrode or induce thermal tuning scheme with higher efficiency such as graphene. 40urthermore, in order to pursue higher polarization tracking speed, we can optimize the device from three aspects: the speed of the phase modulation unit, the automatic polarization control algorithm, and the loop delay of the device.First, various methods, such as the waveguide doping 41 and the graphene microheater, 40 can significantly improve the response speed of TPS.In terms of algorithmic strategy, we intend to further optimize the convergence speed and achieve a higher polarization tracking speed by employing more advanced automatic polarization control algorithms with adjustable step sizes.Finally, we can reduce the loop delay of the device by integrating the APC and control circuit on a single chip. 30

VI. CONCLUSION
In conclusion, we designed and demonstrated an ultrafast silicon APC device utilizing an innovative thermal phase tuning unit and advanced control algorithms.This novel design, which situates the TPS laterally adjacent to the waveguide, significantly enhances the response speed of the thermal tuning unit.As a result, we achieved an ultra-short response time of 3.2 μs.Based on this new TPS structure, we have successfully demonstrated a high-speed APC capable of achieving continuous polarization tracking at speeds up to 20 krad/s, thanks to the novel TPS and the gradient descent automatic polarization control algorithm.Our findings highlight the significant potential for further development of silicon-based APCs, broadening the scope for silicon-based high-speed polarization control devices.This research not only contributes to the expanding market for such devices but also lays the groundwork for future advancements in high-speed, on-chip integrated polarization management technologies.

FIG. 1 .FIG. 2 .
FIG. 1. Silicon-based automatic polarization controller.(a) Schematic image of APC.2DGC receives light with an arbitrary SOP and guides it into the corresponding Si waveguide as TE mode transmission.φ 1 , φ 2 , φ 3 , and φ 4 represent the four innovative side-integrated TPSs loaded on a four-stage cascaded MZIs setup.(b) Schematic diagram of the TPS.Wgap represents the gap between the titanium (Ti) microheater and the Si waveguide.

FIG. 3 . 4 ©
FIG. 3. Characterization of the passive components.(a) Schematic diagram of the test structure for 2DGC.(b) Structural diagram of the test device for the MZI.We have introduced an additional 20 μm geometric difference in the upper arm of the MZI structure.(c) Transmission spectra from both ports of 2DGC.(d) Transmission spectrum of the test MZI structure, showing that the test value of the FSR is 27.26 nm.(e) The resultant shifts in the transmission spectrum of the test MZI structure by incrementally increasing the power applied to the TPS, indicating a half-wave power of ∼25.3 mW.

FIG. 4 . 5 ©
FIG. 4. Dynamic response of the silicon APC.(a) Experimental setup to test TPS's response speed.(b) Optical microscopy and SEM images of our test device.(c) The normalized transmission of the MZI as a function of time under a 50 kHz square-wave signal, indicating that the TPS's fall response time is 4.7 μs and the rise response time is 3.2 μs.

FIG. 5 .
FIG. 5.Flow diagrams illustrating the gradient descent minimization method for the automatic polarization control algorithm.

APL Photon. 9 ,FIG. 6 .
FIG. 6. Characterization of the APC.(a) Experimental setup to test the system's response to a discontinuous change in input SOP.Randomly scrambled SOP of the input light is stabilized to the target SOP by the APC.(b) Complementary cumulative distribution function (CCDF) of the relative intensity error, each measured at a sampling rate of 10 kHz over 1 h.(c) Mean error and maximum error of APC operation under different polarization scrambling speeds; we set the maximum error unlocking threshold to 0.5, and currently, the maximum polarization tracking speed of APC is 20 krad/s.

TABLE I .
Comparison of the key parameters of the reported integrated APC.