Skyrmion devices for memory and logic applications

In 1962, the British scientist Tony Skyrme proposed a model in nuclear physics to develop a nonlinear field theory for interacting pions and introduced the concept of skyrmions to describe localized, particle-like configurations in the fields of pions.¹ Skyrmions had been named after him. Thereafter, skyrmions were theoretically predicted in various materials, such as liquid crystals (in 1989),² non-centrosymmetric magnetic materials (1989),³ quantum Hall magnets (1993),⁴ and Bose–Einstein condensates (1998).⁵ In 1996, Aifer et al. provided experimental evidence for the presence of skyrmion excitations in quantum wells by interband optical transmission.⁶ In 2009, Mühlbauer et al. observed a skyrmion lattice in a chiral magnet MnSi using neutron scattering.⁷ In 2010, Yu et al. reported the real-space observation of the skyrmion lattice in magnetic thin films of Fe_0.5Co_0.5Si using Lorentz transmission electron microscopy.⁸ Since then, researchers have experimentally observed skyrmions in several material systems, such as magnetic,^7,8 optical (2019),⁹ and ferroelectric (2019)¹⁰ materials, which prompted further research on skyrmions. Among them, magnetic skyrmions are early focused and widely investigated.

Magnetic skyrmions are nanosized noncollinear spin structures with particle-like topological states.^11–17 Their main characteristics and potential advantages include (1) particle-like states, which have the ultimate size as small as a few nanometers¹⁶ and can move with a low depinning current density (as small as ∼10⁶ A/m² for the skyrmion lattice^19,20), and (2) nontrivial spin structures, enabling the magnetic skyrmions to develop novel spintronics. Therefore, magnetic skyrmions are regarded as small and energy-efficient information cells that have the potential to develop high-density, low-power, and multi-functional devices for memory and logic applications.

In this Perspective, we first briefly introduce the skyrmion structure and materials and then concentrate on skyrmion devices for memory and logic applications. The major challenges and prospects are presented for the implementation of skyrmion-based next-generation devices.

Several types of magnetic material systems can host skyrmions under different underlying physical mechanisms. During the early stages, skyrmions were observed in non-centrosymmetric chiral magnets or crystal films at a low temperature, such as MnSi,⁷ FeCoSi,^8,26 and FeGe,²⁷ in which the formation of a skyrmion lattice is caused by bulk DMI. Following this, more localized skyrmion clusters and isolated skyrmions were stabilized by interfacial DMI in asymmetric magnetic multilayers, such as Fe/Ir,¹⁸ Ta/CoFeB/TaO_x,²⁸ Ir/Co/Pt,²⁹ Pt/Co/MgO,³⁰ Pt/Co/Ta,³¹ Pt/CoFeB/MgO,³¹ Ir/Fe/Co/Pt,³² Ta/CoFeB/MgO,³³ IrMn/CoFeB/MgO,³⁴ Pt/Co/IrMn,³⁵ and Pt/Co/NiFe/IrMn.³⁶ In addition to the above metallic ferromagnetic materials, skyrmions have also been observed in a multiferroic material Cu₂OSeO₃,³⁷ a β-Mn-type Co–Zn–Mn alloy,³⁸ a frustrated kagome magnet Fe₃Sn₂,³⁹ and a compensated ferrimagnet Pt/Gd₄₄Co₅₆/TaO_x.⁴⁰ In general, magnetic skyrmions have progressed from bulk materials to thin films, from lattices to single skyrmions, from low temperature to room temperature (RT), from the external field-assisted stability to the absence of an external field, and from micrometer to nanometer size. The development of smaller, more stable, and more controllable skyrmions at RT is currently being attempted.

The variety in material systems provides a higher number of platforms for the study of skyrmions. Among them, it has been proved that magnetic multilayers can stabilize nanosized skyrmions at RT under low or even zero magnetic fields.^36,41 Furthermore, these magnetic multilayers can be prepared by a mature growth process that is compatible with CMOS technology. Therefore, this material system offers a promising opportunity for further development of skyrmion-based functional devices.

Beyond the research on skyrmion-hosting materials, skyrmion dynamics have been widely investigated, such as creation, deletion, current-induced motion, and detection. Based on this, skyrmion devices were proposed and studied. In these devices, skyrmions are regarded as the major carriers of information and binary data can be encoded with and without the presence of a skyrmion in the ferromagnetic space, thus implementing memory and logic applications, as depicted in Secs. III and IV.

Racetrack memory (RM) is the most widely studied potential application of skyrmions.^42,43 As shown in Fig. 2, RM comprises magnetic nanowires/nanotracks, write ports, read ports, and shift ports: (1) Nanotracks are divided into a series of storage bits along their lengths, and binary data are continuously stored in these bits, represented by two different magnetization states (i.e., with or without a skyrmion). (2) Write ports are used to switch the stored magnetization state usually by applying a write current. (3) Read ports are used to read the stored magnetization state by detecting the magnetoresistance (MR). (4) Shift ports are used to move the selected storage bits to write/read ports for write/read operations, similar to racing cars traveling on the track.

The way to realize the operations of writing, reading, and shifting the skyrmion in RM has been widely studied. An isolated skyrmion can be created and deleted with local current injection into the ferromagnetic layer via spin transfer torque (STT),^44,45 spin orbit torque (SOT),^28,46 or heating,⁴⁷ as well as with a local electric field.^48,49 Theoretically, reading skyrmions can be realized by tunneling/giant MR (T/GMR) through the magnetic tunnel junction (MTJ) or spin valve structures, which requires further experimental exploration. In the experiments, skyrmions are electrically read out by spin mixing MR,⁵⁰ nonlinear TMR,⁵¹ and topological Hall MR⁵² using specific instruments at low temperatures. For shifting skyrmions, the SOT induced by the in-plane current along the nanotrack is a commonly used effective method since SOT shares the same material system (i.e., magnetic multilayer consisting of a ferromagnetic/heavy metal) as interfacial DMI-stabilized skyrmions. Jiang et al.²⁸ and Yu et al.⁵³ experimentally investigated the current-induced motion of micrometer skyrmions with low velocity at a low current density of ∼10⁹ A/m² in Ta/CoFeB/TaO_x. Woo et al. experimentally showed that the velocity of 100-nm skyrmions exceeds 100 m/s at a current density of ∼10¹¹ A/m² in Pt/CoFeB/MgO.³¹ Legrand et al. experimentally demonstrated the current-induced motion of sub-100 nm skyrmions in Pt/Co/Ir.⁵⁴ 

Compared to hard disk drives (HDDs), RMs have similar write/read operations but different structures and addressing modes. While the HDD depends on the rotation of the magnetic disk and the movement of the write/read head, RM uses shift ports with fixed magnetic nanowires and write/read ports. In contrast, RM has potential advantages, including more reliable mechanical stability, faster addressing time (∼10–100 ns, while the addressing time of the HDD is in ∼ ms and that of FLASH is in ∼ μs), and higher storage density by setting the nanowire array. Compared to the first proposed RM based on shifting the DWs, the skyrmion-based RM is superior with respect to the pinning issue. The DW motion is easily pinned by edge defects or roughness, whereas the skyrmion can move along edge notches with small size owing to its particle-like characteristic.

However, there are some challenges in skyrmion RM. When a skyrmion is driven by a current, it exhibits a transverse motion with an angle between its trajectory and the direction of the current, known as the SkHE.^23–25 This angle is called the skyrmion Hall angle, which is generally proportional to the current amplitude.²⁵ The SkHE is attributed to the Magnus force, which occurs because of the coupling between the conduction electron spin and the local magnetization. Considering the topology of skyrmions, the Magnus force is equivalent to the Lorentz force for electric charge. The SkHE leads to the deflection of the skyrmion motion along the nanotrack, hampering the read and shift process. Although there is a repulsion interaction from the track edge to counter the Magnus force, the skyrmion is expelled from the edge at a sufficiently strong driving current, resulting in operational errors and data loss. In other words, the SkHE limits the driving current threshold, thereby limiting the skyrmion motion at high speeds. Some approaches have been proposed to eliminate the SkHE in RM. A typical method is to use bilayer-skyrmions with antiferromagnetic (AFM) exchange coupling^55,56 or AFM/ferrimagnetic skyrmions,^57–60 as shown in Fig. 3(a). Magnus forces acting on two skyrmions with opposite topological numbers are canceled. Thus, the skyrmions can move along the nanotrack without deflection. Another solution is to modify the magnetic structure at the track edge to increase the edge repulsive force,^61–63 e.g., by adding a boundary layer with in-plane anisotropy outside one side of the nanotrack with perpendicular magnetic anisotropy,⁶¹ as shown in Fig. 3(b). The SkHE can also be eliminated in hybrid DMI systems.⁶⁴ 

Another challenge is the synchronization of the skyrmion motion to ensure data integrity. To solve this problem, the basic idea is to set pinning sites for skyrmions. For example, by constructing artificial notches at the track edge,⁶⁵ skyrmions are confined in the regions (i.e., bit zones) between notches, and they can bypass the notches simultaneously when subjected to the driving current pulse during the shifting process. However, in this scheme, skyrmions may also risk annihilation by getting in contact with the notches. In addition, the pinning site can be achieved by engineering the local exchange bias⁶⁶ or by varying the local magnetic anisotropy induced by defects⁶⁷ or voltage control.⁶⁸ 

Magnetic random access memory (MRAM) based on the MTJ is a promising candidate for non-volatile memory.^69,70 The MTJ is a sandwich structure composed of a magnetic free layer (FL), barrier layer (BL), and magnetic pinning layer (PL). Generally, the FL has a uniform magnetization pointing up or down. The MTJ resistance can be altered by applying currents through the two-terminal MTJ via STT to completely flip the magnetization of the FL. With the magnetization directions of the FL and PL being parallel or antiparallel, the MTJ exhibits two resistance states R_P or R_AP, respectively, because of the TMR effect. If the non-uniform skyrmion state is introduced into the FL, the MTJ can obtain an additional resistance state R_SK. By controlling the creation and annihilation of the skyrmion in the FL, binary or multilevel memory cells can be realized.

In 2013, Sampaio et al.⁴⁵ demonstrated through micromagnetic simulations that a skyrmion can be nucleated in a ferromagnetic nanodisk by local current-induced STT, which actually indicates the basic write operation in skyrmion-based MTJs. In 2018, Zhang et al.⁷¹ further showed the process of skyrmion creation and deletion via STT with the assistance of stray fields from the PL in a complete MTJ structure [Fig. 4(a)]. In 2020, Luo et al.⁷² proposed and studied thermally assisted skyrmion memory based on the MTJ with thermal barrier layers, in which unidirectional current-induced STT and Joule heating were applied to induce magnetization switching between the uniform ferromagnetic and skyrmion states in the FL [Fig. 4(b)]. In addition, in the write operations carried out by applying dissipating currents, the application of a voltage or electric field reduces the operating power. In 2018, Hu et al.⁷³ showed, using phase-field simulations, that a skyrmion can be repeatedly created and deleted in the ferromagnetic layer of multiferroic heterostructures by voltage-induced strain [Fig. 4(c)]. In 2020, Wang et al.⁷⁴ experimentally demonstrated electric-field-induced skyrmion creation and annihilation in a [Pt/Co/Ta]/Ta/PMN-PT nanodisk array [Fig. 4(d)].

Although MTJs with skyrmions could pave the way for a compact memory cell, there are some disadvantages when compared to advanced STT-MRAM. The sensing margin is degraded owing to the poor TMR ratio at the same MTJ structure. In addition, the retention of the skyrmion state in a compact cell is limited since the skyrmion risks touching the FL boundary and getting destroyed under thermal fluctuation at room temperature.⁷² However, it is beneficial to study the skyrmion-based MTJs as elements (like reading) for other types of memory and logic as well as oscillator applications.

Memristors are resistive switching devices with continuously tunable resistance by controlling the current or voltage.⁷⁵ The common types of memristors are mainly based on resistive RAM (RRAM) and phase change memory (PCM). In addition, spin-based memristors are generally realized based on the DW motion.⁷⁶ In the memory mentioned above, the skyrmion is regarded as a rigid quasi-particle and its presence or absence is encoded into binary data. Furthermore, by considering its noncollinear spin structure, skyrmion dynamics can be converted into analog signals and thereby used for designing memristive devices.

In 2017, Huang et al.⁷⁷ proposed a synaptic device with memristive behavior based on a skyrmion racetrack. The readout resistance of the device can be continuously modulated by the current-induced motion of the skyrmion cluster to change the number of skyrmions in the detection region. In 2020, Song et al.⁷⁸ experimentally demonstrated this proposal using a Pt/GdFeCo/MgO Hall bar device. The Hall resistance decreased and increased as the number of skyrmions increased and decreased, respectively [Fig. 5(a)]. In 2019, Luo et al.⁷⁹ proposed another type of memristive device based on the MTJ and a multiferroic heterostructure with a skyrmion included in the ferromagnetic FL. The MTJ resistance is continuously modulated by the voltage-controlled size change in the skyrmion [Fig. 5(b)].

Compared to conventional memristors, such as RRAM and PCM, skyrmion-based memristive devices have reduced current/voltage consumption, present a good linear resistance distribution with the number or size of skyrmions, exhibit relatively small device-to-device and cycle-to-cycle variations, and offer significant endurance and retention.⁷⁸ However, skyrmion-based memristive devices have a relatively large bit-cell area to ensure multilevel states and show a small on/off ratio, similar to binary memory applications.

In 2015, Zhang et al.⁸⁰ proved that the duplication and merging of skyrmions can be realized based on the reversible conversion between the skyrmion and the DW on Y-type nanotracks. Furthermore, by tuning the nanotrack width in the skyrmion–DW conversion region on Y-type nanotracks with two inputs and one output, skyrmion-based AND and OR gates were implemented [Fig. 6(a)]. A skyrmion-based NOT gate was implemented through the conversion between the skyrmion and the anti-skyrmion on a nanotrack with left input and right output wide regions connected by a narrow nanowire. In 2016, Xing et al.⁸¹ studied the collision between a skyrmion and the DW under different drive currents on a skyrmion nanotrack with a designed junction to trap a DW pair. Based on the skyrmion–DW collision dynamics on such a nanotrack, a logic NOT gate was realized. The NAND and NOR gates were constructed by connecting two NOT gates in parallel and in series, respectively [Fig. 6(b)]. In 2017, He et al.⁸² further studied the collision between multiple skyrmions and a DW pair. The results indicate that the pinning or depinning of DWs in the trapped region depends on the number of skyrmions and the drive current density, based on which a three-input skyrmion majority gate can be realized by tuning the drive current density.

All the logic devices mentioned above involve interactions between skyrmions and the DW, which would lead to the complexity of logic implementation. In 2018, Luo et al.⁸³ proposed skyrmion logic devices with only skyrmions as the information carriers on the nanotrack [Figs. 7(a)-7(d)]. The logic AND and OR gates are implemented based on the SkHE, skyrmion–edge repulsions, and skyrmion–skyrmion collisions on the h-type nanotracks. Furthermore, AND and OR, two logic functions, can be simultaneously implemented by separating the outputs on one H-type nanotrack, that is, two nanotracks connected in parallel with a bridge, which greatly enhances the single-device functionality. Note that, in the above cases, when a skyrmion reaches the output region, the output is denoted as “1”; otherwise, it is denoted as “0.” The logic NOT gate can be simply realized by switching the PL magnetization of the output MTJ, where the PL is connected to an AFM layer. The switching can be induced by applying an in-plane current in the AFM layer via SOT with the assistance of an exchange bias. After this switching operation, the output representation is reversed: when a skyrmion reaches the output region, the output is denoted as “0”; otherwise, it is denoted as “1.” Accordingly, the logic functions AND and OR are switched to NAND and NOR, respectively. In 2019, Chauwin et al.⁸⁴ proposed a NOT gate structure with an additional control input and output port [Fig. 7(e)]. This logic gate can also perform the COPY and FAN-OUT functions.

A more complex combinational logic can be further constructed by cascading logic gates. There are two main cascading schemes: one involves realizing cascading with CMOS circuits and the other involves directly cascading skyrmion nanotracks.

In 2019, Mankalale et al.⁸⁵ analyzed skyrmion detection using an MTJ stack and the cascading of two logic gates with the assistance of CMOS transistors. The output data of skyrmion logic devices are encoded by magnetoresistance, and not the voltage signal, as in CMOS logic counterparts. Thus, a read current from a transistor is needed through the output MTJ of the prior logic gate to obtain the output voltage (V_out). V_out is then transferred to the post-logic gate, and its strength determines whether a skyrmion is input at the next stage, realizing cascading.

On the other hand, in 2019, Chauwin et al.⁸⁴ demonstrated a full adder and a Fredkin gate using directly cascaded logic gates and also addressed the clocked synchronization mechanism with notch structures to ensure signal integrity (Fig. 8). This proves the feasibility of using skyrmion logic devices to construct large-scale computing systems that can efficiently perform complex functions.

To allow varying operations to be performed efficiently with a minimal number of devices, creating reconfigurable devices that are adaptable to different logic functions or operations is an ingenious way to achieve more powerful logic circuits. In 2018, Luo et al.⁸³ proposed reconfigurable skyrmion logic gates by adding voltage control terminals to H-type nanotracks (Fig. 9). The on/off states of two transmission control voltages (V_K1 and V_K2) are used to select the output channel via the voltage-controlled magnetic anisotropy (VCMA) effect, determining the execution of logic AND (NAND) or OR (NOR). The output control voltage (V_M) is used to switch the PL magnetization of the output MTJ to realize switching between logic AND (OR) and NAND (NOR).

Parallel computing platforms are increasingly forming the basis for the development of high-performance systems, primarily aimed at solving intensive computing problems. In 2019, Zhang et al.⁸⁶ proposed another type of reconfigurable skyrmion logic gates based on voltage terminals distributed with an inclined angle on a nanotrack. The authors also addressed the division mechanism with fishtail-shaped hollows to change the skyrmion number. Combining the above solutions, a parallel computing scheme with four logic operations for two inputs is proposed and demonstrated.

In contrast to combination logic, sequential logic is a type of logic circuit whose output depends on the sequence of past inputs in addition to the present input signals. Typical sequential logic devices include latches, flip-flops, and registers. In 2020, Luo et al.⁸⁷ proposed skyrmion-based sequential elements. A skyrmion latch is implemented in a single device in which the skyrmion position (corresponding to the output) is controlled by the input current-induced SOT on a nanotrack with gradient anisotropy [Fig. 10(a)]. The VCMA-associated enable signal determines the propagation and blocking of skyrmion motion, thus implementing the latch function. Furthermore, a master–slave skyrmion flip-flop can be simply realized by cascading two skyrmion latches [Fig. 10(b)].

For skyrmion logic devices based on skyrmion motion, the logic switching delay (t_d) is determined by the skyrmion velocity (v) and the distance between the input and the output. In the existing skyrmion logic gates measuring hundreds of nanometers, t_d is approximately a few nanoseconds at v ∼ 100 m/s.⁸⁴ Note that the skyrmion velocity is proportional to the drive current density. Thus, there exists a trade-off between the switching speed and power consumption. Smaller drive current can be adopted for low power consumption, while a larger one should be used for high switching speed. On the other hand, the skyrmion size is one of the main factors to downscale the logic devices, which is determined by magnetic parameters such as anisotropy and DMI constant, and can be sub-10 nm theoretically.⁸³ From the materials of view, the magnetic parameters can be optimized to obtain good performance of devices and systems, where a switching delay of 100 ps with an operation energy of a few fJ has been realized.⁸⁵ If the skyrmion velocity can increase to hundreds or even thousands in tens-of-nm devices, t_d can be further reduced to ∼10 ps.

Furthermore, the method of directly cascading skyrmion nanotracks for combination logic can effectively avoid the complexity of metal connections within the back-end-of-line layers used in conventional CMOS circuits. In addition, some logic functions (e.g., latches) can be implemented based on simple skyrmion device structures, while in the CMOS counterpart, they are constructed from several logic gates and many transistors.⁸⁷ This is expected to significantly simplify the circuit-level design and be beneficial for reducing the chip footprint.

Overall, electrical signals can effectively manipulate the skyrmion dynamics, including creation/deletion, motion, and morphology, enabling the implementation of several types of skyrmion devices for memory and logic applications. In addition, there are interactions between the skyrmion and other magnetic structures (such as DWs and boundary magnetic moments) that make the design of skyrmion devices more flexible. Programmable operation can be realized by virtue of current-induced STT/SOT and voltage-induced VCMA effects. Parallel and reversible computing can be achieved in nanotrack structures with bifurcation, crossover, and interconnection. Moreover, skyrmion-based memristive or synaptic devices and logic gates can be further used for developing neuromorphic computing^77–79 and stochastic/probabilistic computing,⁸⁸ respectively. In particular, both memory and logic functions can be realized by skyrmion motions in magnetic racetracks, which makes it possible to further explore skyrmion-based logic-in-memory architectures.

At present, the size of skyrmion devices is mainly at the micrometer or 100 nm scale in the experiments. Scaling down the devices to tens of nanometers is a future research option, so as to evaluate their potential for high-density and large-capacity applications. In addition, the thermal stability of nanosized skyrmions and the reliability of nanosized devices need to be validated and studied. On the other hand, the skyrmion velocity is a critical merit. Further speed improvement is a future research direction for high-speed racetrack memory and logic applications. In addition, while there are some experimental studies on memory applications, all studies for logic applications are theoretical because the device structures are complicated and more precise and reliable control of skyrmion motions is required. The realization of logic devices in experiments requires further exploration.

In summary, due to scientific insight and potential applications, skyrmions have rapidly drawn attention since 2009 and have become an area of significant interest in the past decade. Although research on skyrmions remains in the stage of prototype device fabrication and verification, this Perspective has shown enormous potential for future applications based on skyrmions.

L.Y. acknowledges support from the National Natural Science Foundation of China (NSFC Grant Nos. 62074063, 61821003, and 61674062), the National Key Research and Development Program of China (Grant No. 2020AAA0109000), the Research Project of Wuhan Science and Technology Bureau (Grant No. 2019010701011394), and the Fundamental Research Funds for the Central Universities (Grant No. HUST: 2018KFYXKJC019).