Negative capacitance in ferroelectric materials has been suggested as a solution to reduce the power dissipation of electronics beyond fundamental limits. The discovery of ferroelectricity and negative capacitance in the widely used class of HfO2-based materials has since sparked large research efforts to utilize these effects in ultra-low power transistors. While significant progress has been made in the basic understanding of ferroelectric negative capacitance in recent years, the development of practical devices has seen limited success so far. Here, we present a unique view of the field of negative capacitance electronics from the ferroelectric materials perspective. Starting from the basic principles of ferroelectric negative capacitance, we discuss the desirable characteristics of a negative capacitance material, concluding that HfO2-based ferroelectrics are currently most promising for applications in electronics. However, we emphasize that material non-idealities can complicate and in some cases even inhibit the design and fabrication of practical negative capacitance devices using HfO2-based ferroelectrics. Finally, we review the recent progress on experimental devices and give an outlook on the future direction of the field. In particular, further investigations of the microscopic structure of HfO2-based ferroelectrics are needed to provide an insight into the origin of negative capacitance in this material system and to enable predictive device design.
I. INTRODUCTION
The energy efficiency of computation has seen a remarkable trend of exponential improvement over the past 70 years.1 Since the 1960s, this advancement was largely driven by the miniaturization of metal–oxide–semiconductor field-effect transistors (MOSFETs) whose lateral dimensions have reached below 100 nm in the year 2003, marking the beginning of the nanoelectronics era.2 Since then, further improvements have been enabled by materials innovations (e.g., strain engineering and gate oxides with high relative permittivity εr) and the adoption of new device concepts (FinFET and fully depleted silicon on insulator technology).3 However, in recent years, the energy efficiency improvements in nanoelectronics have begun to slow down as we are approaching practical as well as fundamental physical limits.4
In Fig. 1, two historic trends emphasize how close we are to some of these limits, as indicated by the scaling of the supply voltage Vdd and the equivalent gate oxide thickness (EOT) of MOSFETs over the past 50 years.2,5,6 Since originally SiO2 was used as the gate oxide, the EOT is defined as the SiO2 thickness that would be needed to achieve the same capacitance as a gate oxide with higher εr and thickness d. Thus, with a relative SiO2 permittivity of 3.9, the EOT can be calculated as EOT = 3.9/εrd. While lowering Vdd is the most effective way to improve the energy efficiency of integrated circuits, a reduction in the EOT is needed to increase the electrostatic coupling of the gate to the semiconductor channel in highly scaled devices. With a lower EOT, less voltage is needed to switch the device between “on” and “off” since the voltage drop across the gate oxide is reduced.
Historic trend of the supply voltage Vdd and equivalent oxide thickness (EOT) scaling in commercial metal–oxide–semiconductor field-effect transistor (MOSFET) technologies. The black dashed line indicates the EOT limit given by the necessary SiO2 interface between the Si channel and the high-k material, and the red dashed lines indicates the minimum supply voltage due to the Boltzmann limit. HKMG: high-k metal gate. NC: negative capacitance.
Historic trend of the supply voltage Vdd and equivalent oxide thickness (EOT) scaling in commercial metal–oxide–semiconductor field-effect transistor (MOSFET) technologies. The black dashed line indicates the EOT limit given by the necessary SiO2 interface between the Si channel and the high-k material, and the red dashed lines indicates the minimum supply voltage due to the Boltzmann limit. HKMG: high-k metal gate. NC: negative capacitance.
For many decades, SiO2 was used as the gate dielectric material in Si-based MOSFETs due to the high quality of the Si/SiO2 interface and its ease of fabrication. During this time, the EOT in Fig. 1 corresponds to the physical SiO2 thickness. Below a physical oxide thickness of roughly 3 nm, quantum-mechanical tunneling of electrons through the gate dielectric became so large that it started to significantly contribute to the overall power dissipation.7 Therefore, at the turn of the century, nitrided SiO2 (SiON) gate dielectrics were applied to increase εr to around 5 and reduce the EOT below 2 nm. However, soon after its introduction, SiON had to be replaced by dielectrics with even higher εr to continue further EOT scaling.5
The result was the adoption of the so-called high-k metal gate (HKMG) technology (k is often used synonymous with εr) based on amorphous HfO2 dielectrics with εr ≈ 17 in 2007,8 enabling an EOT scaling down to 0.8 nm in recent products.9 Nevertheless, due to the inherent presence of a thin SiO2 interface layer between the high-k dielectric and the Si channel, EOT scaling below 0.5 nm is practically impossible without strongly degrading device performance and reliability.10 However, even if one could reduce the EOT to zero, there is a more fundamental limit, which prevents a further reduction of Vdd, which is needed to further improve the energy efficiency of integrated circuits.
In any logic MOSFET, a large-enough ratio between the drain current Id in the on-state and in the off-state must be ensured to achieve acceptable performance (high Ion) and static power consumption (low Ioff) at the same time; see Fig. 2. As it turns out, due to the Boltzmann distribution of electron energies in the source, there is a fundamental lower limit of 60 mV/dec at room temperature for how much gate voltage Vg is needed to change the drain current Id by a factor of 10.11 Due to this “Boltzmann limit,” the supply voltage cannot be reduced below roughly 0.5 V in conventional MOSFETs, which is not far from 0.7 V used in current technologies; see Fig. 1. The inverse of the subthreshold slope S can be written as12
where kB is the Boltzmann constant, T is the temperature, q is the elementary charge, s is the surface potential, and Cs and Cins are the semiconductor and gate insulator capacitance, respectively [see Fig. 2(a)]. One potential solution to overcome the Boltzmann limit is the use of band-to-band tunneling devices.13,14 However, such devices typically have a low ION and will not be discussed here. Normally, in Eq. (1), both Cs and Cins are positive quantities, and thus, the capacitive voltage divider dVg/Ψs = (1 + Cs/Cins) will always be larger than 1. In 2008, it was first proposed by Salahuddin and Datta that if Cins < 0 in a MOSFET [see Eq. (1)], one could overcome the Boltzmann limit, which would enable a further reduction of Vdd and, thus, MOSFET power dissipation; see Fig. 2(b).15 In this case, the negative capacitance (NC) would lead to an internal amplification of the surface potential s with respect to the applied gate voltage Vg, i.e., ds/dVg > 1. Therefore, in a such a negative capacitance field-effect transistor (NCFET), one could overcome both the impending EOT and the Boltzmann limits to further improve the energy efficiency of electronics.
(a) Schematic MOSFET structure where, Cins, d, and εr are the capacitance, thickness, and relative permittivity of the gate insulator, respectively. Cs is the semiconductor capacitance, Ψs is the surface potential, and Vg and Vd are the gate and drain voltage, respectively. (b) Schematic MOSFET transfer characteristics for a positive and negative insulator capacitance. Vdd is the supply voltage, and Ion and Ioff are the drain currents in the “on” and “off” state, respectively. S is the subthreshold slope.
(a) Schematic MOSFET structure where, Cins, d, and εr are the capacitance, thickness, and relative permittivity of the gate insulator, respectively. Cs is the semiconductor capacitance, Ψs is the surface potential, and Vg and Vd are the gate and drain voltage, respectively. (b) Schematic MOSFET transfer characteristics for a positive and negative insulator capacitance. Vdd is the supply voltage, and Ion and Ioff are the drain currents in the “on” and “off” state, respectively. S is the subthreshold slope.
II. WHAT IS NEGATIVE CAPACITANCE?
The general definition of the capacitance of a two terminal device is
where Q is the charge on the terminals and V is the voltage between them. Therefore, the capacitance is negative when an increase in charge (dQ > 0) leads to a decrease in voltage (dV < 0) and vice versa. For a parallel plate capacitor with a dielectric material between the plates, one can write
Here, ε0 is the vacuum permittivity, A is the area of the plates, D is the displacement field, and E is the electric field. Note that in a non-linear dielectric material, εr is a function of D and E. One can see that for a constant capacitor geometry, NC is synonymous with a negative permittivity ε0εr = dD/dE < 0. The displacement field in a dielectric is defined as
where P is the electric polarization, which is a function of E. In linear dielectrics, P is directly proportional to E, resulting in D = ε0εrE. Therefore, εr is always positive and constant with E in a linear dielectric.
III. FERROELECTRIC NEGATIVE CAPACITANCE
There is a special class of materials, called ferroelectrics, which possess a polarization even when no electric field is applied. This so-called spontaneous polarization PS stems from a non-centrosymmetric crystal structure and can be reversed by the application of an electric field, which is larger than the coercive field.16 This normally leads to a polarization hysteresis, which makes ferroelectrics ideally suited for non-volatile memory devices.17 Since all ferroelectrics are also pyroelectric and piezoelectric, these materials are used, e.g., in ultrasonic transducers and infrared detectors.16 Furthermore, the permittivity of a ferroelectric depends on the applied electric field, making ferroelectrics useful for tunable capacitors in microwave electronics.18 As we will see, under certain conditions, the ferroelectric permittivity can even become negative. Above the Curie-temperature, the ferroelectric transitions into a paraelectric state in which the spontaneous polarization is zero.16
Besides the spontaneous polarization, a ferroelectric also has a linear dielectric response, which we will neglect here since we are mainly interested in the qualitative ferroelectric behavior that leads to NC (i.e., Ps ≈ P). The ferroelectric permittivity can then be approximated as
where Ef is the electric field in the ferroelectric. Therefore, when the polarization in a ferroelectric changes opposite to the electric field, its non-linear permittivity and, thus, capacitance will be negative. Landauer first predicted in 1976 that the instability of the ferroelectric polarization can lead to a negative capacitance.19 His reasoning was based on a simple thermodynamic Landau model, where the ferroelectric free energy can be written as
Here, below the Curie-temperature, α < 0 and β > 0 are the Landau coefficients assuming a second-order phase transition for simplicity, which is plotted for Ef = 0 in Fig. 3(a). The two energy minima correspond to the stable spontaneous polarization states, while the maximum at Ps = 0 is an unstable state. Minimizing Gf with respect to Ps yields the expression for the electric field,
which has an “S”-shape, as shown in Fig. 3(b). By differentiating Ef with respect to Ps, one, then, obtains the inverse of the permittivity as
(a) Ferroelectric free energy-polarization (Gf–Ps) landscape at the zero electric field (Ef = 0). (b) Polarization-electric field dependence derived from (a). For low Ps, the relative permittivity εf is negative. (c) Inverse of εf as a function of polarization derived from (a) and (b). The state of negative permittivity is thermodynamically unstable.
(a) Ferroelectric free energy-polarization (Gf–Ps) landscape at the zero electric field (Ef = 0). (b) Polarization-electric field dependence derived from (a). For low Ps, the relative permittivity εf is negative. (c) Inverse of εf as a function of polarization derived from (a) and (b). The state of negative permittivity is thermodynamically unstable.
Since α < 0, one can see that for low values of Ps, the permittivity must be negative, leading to a negative slope in the “S”-shaped Ps–Ef graph as well as a negative curvature for the free energy landscape Gf–Ps; see Fig. 3. While this simple energy landscape model neglects the important effects of domain nucleation and growth, it is still useful to illustrate many of the basic physics of ferroelectric NC.
From Fig. 3(a), it is immediately clear that the region of negative permittivity (i.e., NC) is thermodynamically unstable since it corresponds to a maximum of the free energy if we just consider the ferroelectric by itself. The question is: Can we access this NC region and if yes, how?
There are two different ways to tackle this problem: (1) If we switch the ferroelectric polarization from one stable state to the other one by applying an electric field, we should be able to measure a transient NC for a limited time during switching.20 (2) We integrate the ferroelectric into a larger structure such that the NC state becomes thermodynamically stable when the total free energy of the system is minimized.15
A. Transient negative capacitance
Let us first consider an ideal metal–ferroelectric–metal (MFM) capacitor that is switching from the negative polarization state to the positive one; see Fig. 4(a). In Figs. 4(b)-4(f), the ferroelectric energy landscapes are sketched for different times during the switching process. Initially, when the external voltage V = 0, the energy landscape is symmetric and the polarization is negative. A positive voltage will now tilt the energy landscape to the right such that the left energy minimum is lifted and the barrier is reduced; see Fig. 4(c). If the applied voltage is larger than the critical voltage (V > Vc), the barrier vanishes and the polarization will traverse through the NC region until it reaches the right energy minimum; see Fig. 4(d). Upon reducing V below Vc, the polarization will stay in the right minimum due to the re-emergence of the energy barrier; see Figs. 4(e) and 4(f).
Schematic switching of a metal–ferroelectric–metal capacitor. (a) Experimental setup with applied voltage V. (b) Initial free energy landscape at V = 0, assuming a negative spontaneous polarization Ps. (c) Applying a voltage smaller than the coercive voltage Vc. (d) Ps switches from negative to positive when V > Vc. (e) Ps stays positive when the voltage is reduced to zero (f).
Schematic switching of a metal–ferroelectric–metal capacitor. (a) Experimental setup with applied voltage V. (b) Initial free energy landscape at V = 0, assuming a negative spontaneous polarization Ps. (c) Applying a voltage smaller than the coercive voltage Vc. (d) Ps switches from negative to positive when V > Vc. (e) Ps stays positive when the voltage is reduced to zero (f).
It is clear that in such an experiment, the polarization will always increase with time (dPs/dt > 0). Therefore, in the transient NC case, the voltage and, thus, the field in the ferroelectric must decrease with time (dEf/dt < 0) during switching. How can this be achieved from a measurement perspective? Let us consider the free charge per unit area on the capacitor electrode Q, which is identical to the displacement field in the ferroelectric, i.e.,
When Ef = 0, Q is perfectly screening the spontaneous polarization in the ferroelectric. Rearranging this expression and taking the derivative with respect to the time, then, yields the following:
Since Ps is increasing with time, one can see that the electric field Ef will decrease if Ps changes faster than the free charge Q in the metal, which leads to a transient NC effect, i.e., dPs/dEf < 0.21,22 Note that any microscopic switching mechanism will lead to transient NC as long as Ps changes faster than Q.23,24 However, due to the instability of the NC region, the MFM capacitor will always end up in a state of positive capacitance after the ferroelectric has switched. One way to experimentally observe such a transient NC is to force a voltage across the series connection of an MFM capacitor and a second circuit element such as a resistor,20 a dielectric capacitor,25 or even the gate of a MOSFET.26 The additional circuit element will slow down the supply of free screening charge Q from the external circuit to the MFM capacitor and at the same time allow for the ferroelectric voltage to decrease with time, while the applied voltage is continuously increasing. Recently, it was shown that even without a second circuit element, transient NC can be measured if the applied voltage is first increased and subsequently reduced during ferroelectric switching.27
However, the use of transient NC in applications has two major disadvantages: (1) Since most ferroelectrics switch via irreversible domain nucleation and growth mechanisms, transient NC is typically associated with a large polarization hysteresis, which is detrimental for applications in energy efficient electronics, as it leads to power dissipation and necessitates an increase in the applied voltage levels.24 (2) Due to the well-known voltage–time trade-off,28 switching a ferroelectric completely from one stable polarization state to the other can either be fast (requiring a high voltage) or happen at low voltage (taking a long time), but not both at once. Therefore, transient NC effects are too slow to be useful for high-speed digital electronics operating at low voltages and GHz frequencies.29 Both of these drawbacks are a direct consequence of the instability of the NC region. However, if we would be able to stabilize the intrinsic NC state, we could theoretically overcome both of these limitations.15,30
B. Stabilized negative capacitance
Originally, Salahuddin and Datta suggested that the ferroelectric NC state around Ps = 0 could be stabilized by adding a positive capacitance in series to the ferroelectric capacitance.15 In this case, the total capacitance of the system would be positive, and there would be no polarization hysteresis. It has since been shown that such a stabilization is unlikely when using an MFM capacitor in series to a metal–dielectric–metal capacitor due to the effects of leakage currents and domain formation, which destabilize the NC state.31,32 Therefore, the ferroelectric should be in direct contact to the positive capacitance layer, without a metal layer in between.31,33
To understand the basics of NC stabilization, we will again employ the simplified free energy picture and apply it to a metal–dielectric–ferroelectric–metal capacitor structure. The free energy of the dielectric with relative permittivity εd and electric field Ed can be written as
Under the approximation that D ≈ Ps, we can, then, write the total free energy (per area) as
where tf and td are the ferroelectric and dielectric thickness, respectively. In this simplified picture, the ferroelectric NC state will be stabilized when the term in brackets in Eq. (12) becomes positive, i.e.,
because in this case, the curvature of Gt with respect to Ps (and, thus, the total capacitance) is always positive. However, even without the D ≈ Ps approximation, tF,crit is inversely proportional to the dielectric capacitance.31 Let us first consider the case where tf > tf,crit (e.g., if the dielectric layer is very thin), where the free energies for different voltages are shown in Figs. 5(a)-5(f), assuming that Ps initially is negative. Compared to the ideal MFM case in Fig. 4, the dielectric depolarizes the ferroelectric, thus reducing the spontaneous polarization and the energy barrier in Gt. When V = 0 in Fig. 5(b), the ferroelectric still has a positive capacitance. The unscreened polarization leads to a (positive) depolarization field in the ferroelectric and an opposite (negative) field in the dielectric. When V is increased above Vc [Fig. 5(d)], Ps switches to the positive direction, which leads to a strong decrease in the field in the ferroelectric due to the depolarization effect, resulting in a transient NC similar to Fig. 4. When V is reduced to zero afterward, Ps stays in the positive energy minimum; see Figs. 5(e) and 5(f).
Stabilization of negative capacitance (NC) in a ferroelectric/dielectric heterostructure with applied voltage V. (a) NC is unstable if the dielectric layer is too thin. Gt, Gf, and Gd are the total, ferroelectric, and dielectric free energy, respectively, for switching from negative polarization Ps by starting from (b) V = 0 and increasing V (c) over the critical voltage Vc (d). A subsequent reduction of V (e) leads to a positive Ps when V = 0 again (f). For a thicker dielectric (g), the NC state is stabilized by the energy of the dielectric at V = 0 (h). For small applied voltage, NC is still stable (i). Only above a critical voltage Vc, the ferroelectric capacitance becomes positive (j). However, upon reducing V (k), the ferroelectric returns to the stable NC state (l).
Stabilization of negative capacitance (NC) in a ferroelectric/dielectric heterostructure with applied voltage V. (a) NC is unstable if the dielectric layer is too thin. Gt, Gf, and Gd are the total, ferroelectric, and dielectric free energy, respectively, for switching from negative polarization Ps by starting from (b) V = 0 and increasing V (c) over the critical voltage Vc (d). A subsequent reduction of V (e) leads to a positive Ps when V = 0 again (f). For a thicker dielectric (g), the NC state is stabilized by the energy of the dielectric at V = 0 (h). For small applied voltage, NC is still stable (i). Only above a critical voltage Vc, the ferroelectric capacitance becomes positive (j). However, upon reducing V (k), the ferroelectric returns to the stable NC state (l).
The more interesting case is shown in Figs. 5(g)-5(l), where now tf ≤ tf,crit (e.g., if td is large). In this case, at V = 0, the NC state at Ps = 0 becomes stable since the total free energy of the stack is minimized [Fig. 5(h)]. Note that the maximum of Gf and the minimum of Gd and Gt now coincide. If a positive voltage is applied [Fig. 5(i)], Ps increases, but at the same time, Ef decreases due to the depolarization field caused by the dielectric, i.e., dPs/dEf < 0. Nevertheless, the total system remains stable since the curvature of Gt (and, thus, the total capacitance) is always positive. If V is increased above a critical voltage Vc [Fig. 5(j)], the ferroelectric will enter a positive capacitance state. Nevertheless, when the voltage is reduced to 0 afterward, the ferroelectric returns to its initial NC state [Figs. 5(k) and 5(l)]. There is no instability (i.e., no negative curvature of Gt) in the whole operating range, and thus, no hysteresis is expected. This is in strong contrast to the transient NC effect discussed before.
It is important to mention here that the present discussion has neglected the formation of ferroelectric domains, i.e., regions of different polarization orientation in the material, which form to reduce the depolarization energy of the system.31,34 However, as it turns out, a stabilized NC behavior without hysteresis can also emerge in multi-domain ferroelectrics with dielectric layers.35 To distinguish both effects, we will use the terms intrinsic NC for a homogeneously (de)polarized ferroelectric and extrinsic NC for effects due to the presence of ferroelectric domains. In the simplest case, in a ferroelectric/dielectric structure, to reduce the depolarization energy, the ferroelectric would break into an equal number of up- and down-pointing domains divided by 180° domain walls.36 Then, if an external electric field is applied, domains pointing in the same direction as the external field will expand, while antiparallel domains will become narrower due to lateral domain wall motion.37 This leads to an average depolarization field, which is opposite to the external electric field, thus leading to a negative contribution to the permittivity of the ferroelectric layer.38 If the lateral motion of domain walls is reversible, this extrinsic NC effect can be stable and, thus, hysteresis-free.39
The main difference between extrinsic NC and intrinsic NC is that the latter is a fundamental property of the ferroelectric material, while the former depends on the specific domain configuration and domain wall movement in the material.35 Since the ferroelectric domain structure is strongly affected by external effects such as the electrostatic boundary conditions, extrinsic NC properties of a ferroelectric can strongly change when the ferroelectric or dielectric layer thicknesses are adjusted. This critical difference between intrinsic and extrinsic effects is often neglected in the literature on ferroelectric NC. For a more in depth discussion of extrinsic NC effects, we refer the interested reader to two recent review articles.39,40
When moving from simplified capacitors, as shown in Fig. 5, to NCFET devices, further effects must be considered. First, the stabilizing positive capacitance of the semiconductor channel is highly non-linear going from depletion into the inversion regime. Therefore, the ferroelectric thickness range in which NC can be stabilized across the whole operating range is significantly reduced.41 As pointed out by Cao and Banerjee, using channel materials with a lower density of states could be beneficial for the NCFET device design.41 Second, the drain voltage can locally impact the NC stabilization, especially in short channel devices, where the channel potential is inhomogeneous.42 As a result, the ferroelectric polarization will also become inhomogeneous, and domains can form. Nevertheless, simulations indicate that hysteresis-free stabilized NC is still possible even at high drain voltages.42 Interestingly, increasing the drain voltage in an NCFET has been shown to lead to a reduction in the channel potential, resulting in negative drain-induced barrier lowering (beneficial for channel length scaling) and negative differential resistance in the output characteristics (which is of interest for analog applications).43–45
IV. FERROELECTRICS FOR NC DEVICES
Now that we have established the basic principles of ferroelectric NC, we will return to discuss its application in the future highly scaled energy efficient MOSFETs. Prospective ferroelectric materials for NC transistors need to fulfill a set of conditions to be useful for practical devices:
Robust ferroelectricity at 5 nm thickness and below
Compatibility with CMOS technology
Thermal stability on silicon
Conformal deposition on 3D substrates
Large electronic bandgap and conduction band offset to Si
A small ferroelectric thickness has two advantages: First, it helps to stabilize the NC state, which can be seen from Eq. (13). Second, it enables a reduction of the distance between neighoring NCFETs in state-of-the-art FinFET technology.46 This will be even more critical for future nanowire or nanosheet device geometries.47 Furthermore, these materials must be integrated into a silicon CMOS process flow, where they have to withstand temperatures of around 500 °C as well as hydrogen annealing.48 Also conformal and homogeneous deposition techniques for ultra-thin ferroelectric films must be available for 300 mm wafer processing. A high electronic bandgap and conduction band offset to Si are necessary to reduce gate leakage currents.49 Very few materials fulfill all these conditions. Additionally, they need to show NC.
Since the discovery of ferroelectricity in Rochelle salt in 1920,50 the list of known ferroelectric materials has been growing at an increasing rate.51,52 Ferroelectrics gained technological importance with the discovery of ferroelectricity in materials of perovskite structure, the first of which was BaTiO3.53 Other classes of ferroelectrics include polymer-based and triglycine sulfate based materials.54,55 A more detailed overview of different ferroelectric materials and their properties can be found elsewhere.51,56 Some of the important intrinsic ferroelectric properties for NC applications include the magnitude of spontaneous polarization Ps and coercive field Ec as well as the Curie-temperature Tc and the domain wall energy constants. While desirable values for Ps, Ec, and Tc depend on the specific device design, larger domain wall energy constants seem to be generally favorable for NC devices.31,57
The first experimental report of ferroelectric NC dates back to 2006, when Bratkovsky and Levanyuk calculated the electric field in thin layers of ferroelectric BaTiO3 by considering the finite screening length in the metal electrodes.58 They first observed the predicted negative slope in the P–Ef graph; see Fig. 3(b). Later, various NC effects were observed in ferroelectric P(VDF–TrFE)59,60 as well as ferroelectric perovskites such as lead zirconate titanate (PZT).61–63 From the application perspective, none of these materials are easily integrated with current semiconductor fabrication technologies. While polymer ferroelectrics such as P(VDF–TrFE) are incompatible with the high temperature processing used, perovskite ferroelectrics have severe integration issues, especially in 3D structures such as FinFETs, and they degrade under hydrogen annealing. The relatively low bandgap of perovskite ferroelectrics is another drawback.
A. Hafnium oxide based ferroelectrics
Fortunately, in 2011, it was reported that thin films of Si doped HfO2 exhibit ferroelectricity (recall that HfO2 was the standard high-k gate dielectric in MOSFETs since 2007).64 This surprising discovery has led to a strong interest in NC transistors. Ferroelectricity in HfO2 stems from the stabilization of a polar orthorhombic Pca21 phase in thin polycrystalline films65 with a relatively small grain size of around 5 nm–30 nm.66 This ferroelectric o-phase appears at the boundary between the well-known non-polar tetragonal P42/nmc t-phase and the monoclinic P21/c m-phase.67 It is currently believed that the t-phase can transform into the o-phase by the application of an electric field, leading to antiferroelectric-like characteristics.68,69 Many different dopants such as Si, Al, Y, Gd, and La promote the stabilization of the o-phase in HfO2.70–74 However, one of the most popular material systems is the solid solution of Hf1−xZrxO2 (HZO), which shows a broad window of ferroelectricity around 1:1 Hf:Zr ratio and a lower crystallization temperature (<500 °C) compared to most of the other dopants.75,76 It was further shown that epitaxial HZO films exhibit ferroelectricity stemming from a rhombohedral R3m phase.77 Recently, ferroelectricity was even observed in atomic layer deposited (ALD) Hf0.8Zr0.2O2 films as thin as 1 nm.78 All these characteristics combined with the established CMOS integration and mature ALD processes make HfO2-based ferroelectrics most promising for future NC device applications. However, the basic understanding of NC in these films is still in its infancy.
The first direct measurement of transient NC in Gd doped ferroelectric HfO2 was reported in 2016 by applying short voltage pulses to a series connection of an MFM capacitor and a resistor.79 Subsequently, similar transient NC effects were confirmed in ferroelectric HZO capacitors.80 The large hysteresis observed in these measurements was a direct consequence of using MFM capacitors, which can only show transient NC effects, as discussed in Sec. III A. Therefore, subsequent studies have focused on using stacked ferroelectric/dielectric capacitor structures to enable hysteresis-free operation and to potentially stabilize NC in HfO2-based ferroelectrics. Indeed, hysteresis-free NC was recently observed in stacked capacitors using ferroelectric Hf0.5Zr0.5O2 and dielectric Al2O3 or Ta2O5 layers, allowing the first pulsed electric measurement of the “S”-shaped P–Ef curve as well as the double-well energy landscape as predicted by Landau theory [see Figs. 3(a) and 3(b)].81,82 However, it was found that the NC effect in these ferroelectric/dielectric structures only occurs at voltages higher than 5 V.83 This was explained by the presence of a large density of negative charges (either trapped or fixed charges or a combination of both) at the ferroelectric/dielectric interface, which stabilizes the negative polarization state at V = 0. Such a large interface charge would be detrimental for low power NC transistors, where it can shift the NC region out of the desired operating voltage range. However, it was shown that NC in such ferroelectric/dielectric capacitors is promising for electrostatic supercapacitor applications.84
It is still unclear if these hysteresis-free NC effects in ferroelectric/dielectric capacitors are of intrinsic or extrinsic origin. However, first-principles calculations85 and piezo-response force microscopy86 results indicate that lateral domain wall motion (as expected for extrinsic NC) is very slow and energetically unfavorable in HfO2-based ferroelectrics. Nevertheless, the polarization kinetics have been found to be in good agreement with nucleation-limited switching dynamics.87–89 How the nucleation of domains in nanoscale grains of ferroelectric HfO2 can be reconciled with the observed hysteresis-free NC90 needs further investigation.91 Additionally, the report of vanishing or even negative energy of 180° domain walls in ferroelectric HfO2 is a reason for concern for NC devices since this would suggest that the stabilization of an intrinsic NC state at low voltage might be very challenging as even unit cell wide domains could form.85 More basic materials research on ferroelectric HfO2 is necessary to better understand its fundamental limitations with respect to NC applications.92
B. Realistic NC device considerations
While the general material properties of HfO2-based ferroelectrics seem suited for application in highly scaled NC transistors, there are multiple issues arising in practical devices. In this section, we want to emphasize the most important practical considerations of using HfO2-based ferroelectric in NC transistors, which are often overlooked, especially in publications on NC device simulation. Indeed, the vast majority of papers on NC transistors implicitly assume a homogeneous ferroelectric exhibiting intrinsic NC.41,93–95 This is in contrast to the well-known polycrystalline nature of HfO2-based ferroelectrics, with different grain orientations, non-ferroelectric phase fractions, and defects.96
Figure 6 illustrates how a realistic gate stack of an NC transistor using an HfO2-based ferroelectric might look like (this schematic compilation of imperfections is not exhaustive). The HfO2-based layer consists of multiple grains with defect-rich grain boundaries between them. While most grains might be in the ferroelectric o-phase, some non-ferroelectric grains in the m- or t-phase might still be present. Furthermore, the polar axis of the ferroelectric grains can be tilted and, thus, can have in-plane polarization contributions in addition to out-of-plane ones.97 Transmission electron microscopy indicates that even inside a single ferroelectric grain, there might be multiple domains separated by either 180° or 90° domain walls.98 The movement of such domain walls99,100 inside polycrystalline is not well understood so far. At the metal/ferroelectric and ferroelectric/dielectric interfaces, thin layers of the t-phase might be present.101 In addition, it is typically found that between HfO2 and TiN, a thin TiON layer forms during the annealing processes.102 From the ferroelectric interface to the SiO2 or SiON layer underneath, fixed interface charges and trapped charges can be present, which partly screen the ferroelectric polarization.103 Overall, the trapping and de-trapping of charges at this interface must be minimized for NC applications as it will strongly affect the electrostatics inside the ferroelectric stack.104 Note that this is one of the most serious practical concerns since the ferroelectric polarization can lead to a significant electric field in the dielectric layer.105 Furthermore, charges can be trapped or de-trapped from defects at grain boundaries or even inside the bulk of the film (for clarity not shown in Fig. 6).106
(a) Schematic gate stack of a negative capacitance transistor using an HfO2-based ferroelectric. (b) Magnification of the HfO2-based layer highlighting some potential non-idealities, which are often present in such films and are critical for negative capacitance devices.
(a) Schematic gate stack of a negative capacitance transistor using an HfO2-based ferroelectric. (b) Magnification of the HfO2-based layer highlighting some potential non-idealities, which are often present in such films and are critical for negative capacitance devices.
These potential complications could explain why simulations assuming a homogeneous ferroelectric layer with the out-of-plane polar axis, no defects, or charge trapping have so far failed to reproduce and predict experimental NC device characteristics.92 Such simplified simulations can even result in qualitatively wrong predictions, e.g., that an internal metal layer between the ferroelectric and SiO2 improves device behavior, when, in reality, it destabilizes the NC state when domain formation and leakage are considered.31,32 Therefore, more elaborate device simulations are needed to capture the critical effects of ferroelectric domains and charge trapping,33 which will help to better guide the device design.
V. PROGRESS ON NC DEVICES
In the following, we will review some of the most promising and recent experimental NC transistors results using HfO2-based ferroelectrics. While a large number of experimental results have been published in the last 5 years,107,108 few reports contain all necessary features of an NC transistor, which are as follows: (1) improved subthreshold swing or on-current compared to an appropriate reference device, (2) hysteresis-free operation, and (3) characteristics that are largely independent of measurement conditions (e.g., measurement speed and voltage sweep range). In particular, the third point is critical since the transient NC effects can under some conditions (typically DC measurements) lead to extraordinary small subthreshold swings and an apparent lack of hysteresis.109 However, when the measurement speed or voltage range is changed even slightly, significant hysteresis emerges.46 Therefore, such experimental results should be treated with caution. Furthermore, due to the previous discussion on transient NC, reports of connecting an MFM capacitor to the gate of a MOSFET cannot be considered promising for low power NC electronics due to the inherent instability of the NC state in such a structure and the voltage–time trade-off. Therefore, we will not review devices with the internal metal gate structure or any hysteresis in the transfer characteristics here.
One of the most prominent works claiming NC behavior in ferroelectric HZO without hysteresis in MoS2 transistors was published in 2018.110 However, hysteresis-free operation in these devices was only observed for DC measurements. Slightly increasing the measurement speed resulted in an emergence of hysteresis, which is not expected for stabilized NC in this frequency range. More consistent reports of hysteresis-free NC transistor behavior independent of the measurement speed were shown by Kwon et al. when using 1.8 nm thin HZO gate oxides.111 While the subthreshold swings were always above the 60 mV/dec Boltzmann limit, they showed improved characteristics compared to reference devices using pure HfO2 instead of HZO. Theoretical works have suggested that instead of achieving sub-60 mV/dec subthreshold swings, NC might be more useful in reducing the “voltage loss” due to short channel effects.41 Indeed, recent experimental results indicate that short channel devices show more pronounced improvements from using HZO compared to reference devices using HfO2.112–114 Some of the most promising results so far show a 10 times reduction in off-current111 or a two times increase in the on-current for short channel devices.115 While these results are encouraging, one has to keep in mind that they are reported compared to reference devices with HfO2 gate dielectric. Therefore, they present no direct proof of stabilized NC in the HZO transistors but at least an encouraging indication.
VI. OUTLOOK
As we have recently argued,92 to move the field of NC research forward, the gap between the fundamental understanding of NC in HfO2-based polycrystalline ferroelectrics and practical transistor engineering needs to be bridged. As long as no other material system fulfilling all requirements in Sec. IV is found, HfO2-based ferroelectrics seem to be the only contender for NC transistors going forward. Some properties of HfO2-based ferroelectrics are of special interest for NC device applications and should be focused on in the future. First, fabricating ultra-thin (<5 nm) HfO2-based ferroelectric films predominantly in the orthorhombic phase is still one of the biggest challenges for NC devices. While recent results on such ultra-thin films have shown ferroelectricity,78,116 spatial homogeneity of such layers is a prerequisite for nanoscale transistors and must be studied in more detail. The careful engineering of the ferroelectric interfaces and annealing conditions might be two of the most effective ways117–119 to improve their ferroelectricity. Furthermore, the role of charge trapping and leakage currents in such films might be critical for NC device operation. It would be interesting to investigate devices with thicker dielectric interface layers to minimize detrimental leakage effects and relax the constraints on the critical ferroelectric thickness for NC stabilization. While such an approach might not be suitable for ultra-low power logic, it could turn out useful for improving higher voltage devices.
Second, future research on NC in HfO2-based ferroelectrics should focus on the role of nanoscale ferroelectric domains and their interaction with the grain structure in polycrystalline films. To better understand the role of domain walls, characterization of epitaxial films99,120,121 and first-principles calculations85,100 might be most promising. Furthermore, advanced electron microscopy techniques122 might be able to resolve ferroelectric domain structures even in polycrystalline HfO2-based thin films. These techniques could also shed light on the impact of grain sizes and orientations of the different layers in the gate stack on device performance. More accurate multi-domain models would help to guide the device design.123 Further experiments on different ferroelectric/dielectric heterostructure capacitors could also give some new insights into the domain structure, which strongly depends on the electrostatic boundary conditions. In particular, the control of interfacial charges in such heterostructures will be critical for NC devices.
Finally, when considering the fabrication of NC transistors, more rigorous characterization methods should be used to provide convincing proofs of stabilized NC. If no subthreshold swing below the Boltzmann limit is observed, then electrical characteristics have to be compared to an appropriate reference device, which should have as few processing differences as possible, but must have a non-ferroelectric gate oxide. If an improvement compared to such a reference is reported, then it is necessary to show characteristics for different voltage sweep ranges and measurement speeds to exclude other effects such as charge trapping or transient NC from ferroelectric switching. To further our understanding of an optimal NC device design, we need to move away from simplified single-domain models (implying intrinsic NC) toward more realistic multi-domain models based on insights into the microscopic structure of HfO2-based ferroelectric thin films.
DATA AVAILABILITY
The data that support the findings of this study are available from the corresponding author upon reasonable request.